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-rw-r--r--include/asm-mips/byteorder.h18
-rw-r--r--include/asm-mips/compat.h8
-rw-r--r--include/asm-mips/io.h69
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h2
-rw-r--r--include/asm-mips/mach-generic/mangle-port.h36
-rw-r--r--include/asm-mips/mach-ip27/mangle-port.h9
-rw-r--r--include/asm-mips/mach-ip32/mangle-port.h9
-rw-r--r--include/asm-mips/mach-mips/cpu-feature-overrides.h4
-rw-r--r--include/asm-mips/mmu_context.h7
-rw-r--r--include/asm-mips/pgtable-32.h2
-rw-r--r--include/asm-mips/r4kcache.h1
-rw-r--r--include/asm-mips/signal.h20
-rw-r--r--include/asm-mips/sn/klconfig.h2
-rw-r--r--include/asm-mips/sn/mapped_kernel.h4
-rw-r--r--include/asm-mips/sn/sn0/hubio.h12
-rw-r--r--include/asm-mips/stackframe.h20
-rw-r--r--include/asm-mips/system.h8
-rw-r--r--include/asm-mips/termbits.h2
-rw-r--r--include/asm-mips/thread_info.h2
19 files changed, 132 insertions, 103 deletions
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index 584f8128fffd..aefc02f16fd8 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -39,6 +39,24 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
39} 39}
40#define __arch__swab32(x) ___arch__swab32(x) 40#define __arch__swab32(x) ___arch__swab32(x)
41 41
42#ifdef CONFIG_CPU_MIPS64_R2
43
44static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
45{
46 __asm__(
47 " dsbh %0, %1 \n"
48 " dshd %0, %0 \n"
49 " drotr %0, %0, 32 \n"
50 : "=r" (x)
51 : "r" (x));
52
53 return x;
54}
55
56#define __arch__swab64(x) ___arch__swab64(x)
57
58#endif /* CONFIG_CPU_MIPS64_R2 */
59
42#endif /* CONFIG_CPU_MIPSR2 */ 60#endif /* CONFIG_CPU_MIPSR2 */
43 61
44#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 62#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h
index 35d2604fe69c..0012bd804d2d 100644
--- a/include/asm-mips/compat.h
+++ b/include/asm-mips/compat.h
@@ -128,17 +128,17 @@ typedef u32 compat_sigset_word;
128 */ 128 */
129typedef u32 compat_uptr_t; 129typedef u32 compat_uptr_t;
130 130
131static inline void *compat_ptr(compat_uptr_t uptr) 131static inline void __user *compat_ptr(compat_uptr_t uptr)
132{ 132{
133 return (void *)(long)uptr; 133 return (void __user *)(long)uptr;
134} 134}
135 135
136static inline void *compat_alloc_user_space(long len) 136static inline void __user *compat_alloc_user_space(long len)
137{ 137{
138 struct pt_regs *regs = (struct pt_regs *) 138 struct pt_regs *regs = (struct pt_regs *)
139 ((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1; 139 ((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1;
140 140
141 return (void *) (regs->regs[29] - len); 141 return (void __user *) (regs->regs[29] - len);
142} 142}
143#if defined (__MIPSEL__) 143#if defined (__MIPSEL__)
144#define __COMPAT_ENDIAN_SWAP__ 1 144#define __COMPAT_ENDIAN_SWAP__ 1
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index ba1d7bbc15d2..546a17e56a9b 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -40,56 +40,13 @@
40 * hardware. An example use would be for flash memory that's used for 40 * hardware. An example use would be for flash memory that's used for
41 * execute in place. 41 * execute in place.
42 */ 42 */
43# define __raw_ioswabb(x) (x) 43# define __raw_ioswabb(a,x) (x)
44# define __raw_ioswabw(x) (x) 44# define __raw_ioswabw(a,x) (x)
45# define __raw_ioswabl(x) (x) 45# define __raw_ioswabl(a,x) (x)
46# define __raw_ioswabq(x) (x) 46# define __raw_ioswabq(a,x) (x)
47# define ____raw_ioswabq(x) (x) 47# define ____raw_ioswabq(a,x) (x)
48 48
49/* 49/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
50 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
51 * less sane hardware forces software to fiddle with this...
52 *
53 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
54 * you can't have the numerical value of data and byte addresses within
55 * multibyte quantities both preserved at the same time. Hence two
56 * variations of functions: non-prefixed ones that preserve the value
57 * and prefixed ones that preserve byte addresses. The latters are
58 * typically used for moving raw data between a peripheral and memory (cf.
59 * string I/O functions), hence the "__mem_" prefix.
60 */
61#if defined(CONFIG_SWAP_IO_SPACE)
62
63# define ioswabb(x) (x)
64# define __mem_ioswabb(x) (x)
65# ifdef CONFIG_SGI_IP22
66/*
67 * IP22 seems braindead enough to swap 16bits values in hardware, but
68 * not 32bits. Go figure... Can't tell without documentation.
69 */
70# define ioswabw(x) (x)
71# define __mem_ioswabw(x) le16_to_cpu(x)
72# else
73# define ioswabw(x) le16_to_cpu(x)
74# define __mem_ioswabw(x) (x)
75# endif
76# define ioswabl(x) le32_to_cpu(x)
77# define __mem_ioswabl(x) (x)
78# define ioswabq(x) le64_to_cpu(x)
79# define __mem_ioswabq(x) (x)
80
81#else
82
83# define ioswabb(x) (x)
84# define __mem_ioswabb(x) (x)
85# define ioswabw(x) (x)
86# define __mem_ioswabw(x) cpu_to_le16(x)
87# define ioswabl(x) (x)
88# define __mem_ioswabl(x) cpu_to_le32(x)
89# define ioswabq(x) (x)
90# define __mem_ioswabq(x) cpu_to_le32(x)
91
92#endif
93 50
94#define IO_SPACE_LIMIT 0xffff 51#define IO_SPACE_LIMIT 0xffff
95 52
@@ -346,7 +303,7 @@ static inline void pfx##write##bwlq(type val, \
346 \ 303 \
347 __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ 304 __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \
348 \ 305 \
349 __val = pfx##ioswab##bwlq(val); \ 306 __val = pfx##ioswab##bwlq(__mem, val); \
350 \ 307 \
351 if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ 308 if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \
352 *__mem = __val; \ 309 *__mem = __val; \
@@ -401,7 +358,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
401 BUG(); \ 358 BUG(); \
402 } \ 359 } \
403 \ 360 \
404 return pfx##ioswab##bwlq(__val); \ 361 return pfx##ioswab##bwlq(__mem, __val); \
405} 362}
406 363
407#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ 364#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \
@@ -411,10 +368,9 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \
411 volatile type *__addr; \ 368 volatile type *__addr; \
412 type __val; \ 369 type __val; \
413 \ 370 \
414 port = __swizzle_addr_##bwlq(port); \ 371 __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
415 __addr = (void *)(mips_io_port_base + port); \
416 \ 372 \
417 __val = pfx##ioswab##bwlq(val); \ 373 __val = pfx##ioswab##bwlq(__addr, val); \
418 \ 374 \
419 /* Really, we want this to be atomic */ \ 375 /* Really, we want this to be atomic */ \
420 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 376 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
@@ -428,15 +384,14 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
428 volatile type *__addr; \ 384 volatile type *__addr; \
429 type __val; \ 385 type __val; \
430 \ 386 \
431 port = __swizzle_addr_##bwlq(port); \ 387 __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
432 __addr = (void *)(mips_io_port_base + port); \
433 \ 388 \
434 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 389 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
435 \ 390 \
436 __val = *__addr; \ 391 __val = *__addr; \
437 slow; \ 392 slow; \
438 \ 393 \
439 return pfx##ioswab##bwlq(__val); \ 394 return pfx##ioswab##bwlq(__addr, __val); \
440} 395}
441 396
442#define __BUILD_MEMORY_PFX(bus, bwlq, type) \ 397#define __BUILD_MEMORY_PFX(bus, bwlq, type) \
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 78e1df2095fb..b3c5ecbec03c 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -113,4 +113,6 @@ do { \
113# define COBALT_KEY_SELECT (1 << 7) 113# define COBALT_KEY_SELECT (1 << 7)
114# define COBALT_KEY_MASK 0xfe 114# define COBALT_KEY_MASK 0xfe
115 115
116#define COBALT_UART ((volatile unsigned char *) CKSEG1ADDR(0x1c800000))
117
116#endif /* __ASM_COBALT_H */ 118#endif /* __ASM_COBALT_H */
diff --git a/include/asm-mips/mach-generic/mangle-port.h b/include/asm-mips/mach-generic/mangle-port.h
index 4a98d83b8ec7..6e1b0c075de7 100644
--- a/include/asm-mips/mach-generic/mangle-port.h
+++ b/include/asm-mips/mach-generic/mangle-port.h
@@ -13,4 +13,40 @@
13#define __swizzle_addr_l(port) (port) 13#define __swizzle_addr_l(port) (port)
14#define __swizzle_addr_q(port) (port) 14#define __swizzle_addr_q(port) (port)
15 15
16/*
17 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
18 * less sane hardware forces software to fiddle with this...
19 *
20 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
21 * you can't have the numerical value of data and byte addresses within
22 * multibyte quantities both preserved at the same time. Hence two
23 * variations of functions: non-prefixed ones that preserve the value
24 * and prefixed ones that preserve byte addresses. The latters are
25 * typically used for moving raw data between a peripheral and memory (cf.
26 * string I/O functions), hence the "__mem_" prefix.
27 */
28#if defined(CONFIG_SWAP_IO_SPACE)
29
30# define ioswabb(a,x) (x)
31# define __mem_ioswabb(a,x) (x)
32# define ioswabw(a,x) le16_to_cpu(x)
33# define __mem_ioswabw(a,x) (x)
34# define ioswabl(a,x) le32_to_cpu(x)
35# define __mem_ioswabl(a,x) (x)
36# define ioswabq(a,x) le64_to_cpu(x)
37# define __mem_ioswabq(a,x) (x)
38
39#else
40
41# define ioswabb(a,x) (x)
42# define __mem_ioswabb(a,x) (x)
43# define ioswabw(a,x) (x)
44# define __mem_ioswabw(a,x) cpu_to_le16(x)
45# define ioswabl(a,x) (x)
46# define __mem_ioswabl(a,x) cpu_to_le32(x)
47# define ioswabq(a,x) (x)
48# define __mem_ioswabq(a,x) cpu_to_le32(x)
49
50#endif
51
16#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */ 52#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip27/mangle-port.h b/include/asm-mips/mach-ip27/mangle-port.h
index f76c44880451..d615312a451a 100644
--- a/include/asm-mips/mach-ip27/mangle-port.h
+++ b/include/asm-mips/mach-ip27/mangle-port.h
@@ -13,4 +13,13 @@
13#define __swizzle_addr_l(port) (port) 13#define __swizzle_addr_l(port) (port)
14#define __swizzle_addr_q(port) (port) 14#define __swizzle_addr_q(port) (port)
15 15
16# define ioswabb(a,x) (x)
17# define __mem_ioswabb(a,x) (x)
18# define ioswabw(a,x) (x)
19# define __mem_ioswabw(a,x) cpu_to_le16(x)
20# define ioswabl(a,x) (x)
21# define __mem_ioswabl(a,x) cpu_to_le32(x)
22# define ioswabq(a,x) (x)
23# define __mem_ioswabq(a,x) cpu_to_le32(x)
24
16#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */ 25#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip32/mangle-port.h b/include/asm-mips/mach-ip32/mangle-port.h
index 6e25b52ed8f2..81320eb55324 100644
--- a/include/asm-mips/mach-ip32/mangle-port.h
+++ b/include/asm-mips/mach-ip32/mangle-port.h
@@ -14,4 +14,13 @@
14#define __swizzle_addr_l(port) (port) 14#define __swizzle_addr_l(port) (port)
15#define __swizzle_addr_q(port) (port) 15#define __swizzle_addr_q(port) (port)
16 16
17# define ioswabb(a,x) (x)
18# define __mem_ioswabb(a,x) (x)
19# define ioswabw(a,x) (x)
20# define __mem_ioswabw(a,x) cpu_to_le16(x)
21# define ioswabl(a,x) (x)
22# define __mem_ioswabl(a,x) cpu_to_le32(x)
23# define ioswabq(a,x) (x)
24# define __mem_ioswabq(a,x) cpu_to_le32(x)
25
17#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ 26#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 9f92aed17754..e06af6c86f86 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -29,7 +29,11 @@
29/* #define cpu_has_prefetch ? */ 29/* #define cpu_has_prefetch ? */
30#define cpu_has_mcheck 1 30#define cpu_has_mcheck 1
31/* #define cpu_has_ejtag ? */ 31/* #define cpu_has_ejtag ? */
32#ifdef CONFIG_CPU_HAS_LLSC
32#define cpu_has_llsc 1 33#define cpu_has_llsc 1
34#else
35#define cpu_has_llsc 0
36#endif
33/* #define cpu_has_vtag_icache ? */ 37/* #define cpu_has_vtag_icache ? */
34/* #define cpu_has_dc_aliases ? */ 38/* #define cpu_has_dc_aliases ? */
35/* #define cpu_has_ic_fills_f_dc ? */ 39/* #define cpu_has_ic_fills_f_dc ? */
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 19cdf7642e66..61cf22588137 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -33,12 +33,7 @@ extern unsigned long pgd_current[];
33 write_c0_context((unsigned long) smp_processor_id() << 25); \ 33 write_c0_context((unsigned long) smp_processor_id() << 25); \
34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
35#endif 35#endif
36#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 36#ifdef CONFIG_64BIT
37#define TLBMISS_HANDLER_SETUP() \
38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
40#endif
41#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
42#define TLBMISS_HANDLER_SETUP() \ 37#define TLBMISS_HANDLER_SETUP() \
43 write_c0_context((unsigned long) smp_processor_id() << 26); \ 38 write_c0_context((unsigned long) smp_processor_id() << 26); \
44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 0cff64ce0fb8..4d6bc45df594 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -206,7 +206,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
206 /* fixme */ 206 /* fixme */
207#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) 207#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
208#define pgoff_to_pte(off) \ 208#define pgoff_to_pte(off) \
209 ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)}) 209 ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)})
210 210
211#else 211#else
212#define pte_to_pgoff(_pte) \ 212#define pte_to_pgoff(_pte) \
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 0bcb79a58ee9..90c374700977 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -303,5 +303,6 @@ __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
303__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, ) 303__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
304/* blast_inv_dcache_range */ 304/* blast_inv_dcache_range */
305__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, ) 305__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
306__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, )
306 307
307#endif /* _ASM_R4KCACHE_H */ 308#endif /* _ASM_R4KCACHE_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 6fe903e09c62..d8349e4b55ee 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -147,16 +147,34 @@ struct k_sigaction {
147 147
148/* IRIX compatible stack_t */ 148/* IRIX compatible stack_t */
149typedef struct sigaltstack { 149typedef struct sigaltstack {
150 void *ss_sp; 150 void __user *ss_sp;
151 size_t ss_size; 151 size_t ss_size;
152 int ss_flags; 152 int ss_flags;
153} stack_t; 153} stack_t;
154 154
155#ifdef __KERNEL__ 155#ifdef __KERNEL__
156#include <asm/sigcontext.h> 156#include <asm/sigcontext.h>
157#include <asm/siginfo.h>
157 158
158#define ptrace_signal_deliver(regs, cookie) do { } while (0) 159#define ptrace_signal_deliver(regs, cookie) do { } while (0)
159 160
161struct pt_regs;
162extern void do_signal(struct pt_regs *regs);
163extern void do_signal32(struct pt_regs *regs);
164
165extern int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
166 int signr, sigset_t *set);
167extern int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
168 int signr, sigset_t *set, siginfo_t *info);
169
170extern int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
171 int signr, sigset_t *set);
172extern int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
173 int signr, sigset_t *set, siginfo_t *info);
174
175extern int setup_rt_frame_n32(struct k_sigaction * ka, struct pt_regs *regs,
176 int signr, sigset_t *set, siginfo_t *info);
177
160#endif /* __KERNEL__ */ 178#endif /* __KERNEL__ */
161 179
162#endif /* _ASM_SIGNAL_H */ 180#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index d028e28d6239..9709ff701d9b 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -99,7 +99,7 @@ typedef s32 klconf_off_t;
99#define ENABLE_BOARD 0x01 99#define ENABLE_BOARD 0x01
100#define FAILED_BOARD 0x02 100#define FAILED_BOARD 0x02
101#define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which 101#define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which
102 are discovered twice. Use one of them */ 102 are discovered twice. Use one of them */
103#define VISITED_BOARD 0x08 /* Used for compact hub numbering. */ 103#define VISITED_BOARD 0x08 /* Used for compact hub numbering. */
104#define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */ 104#define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */
105#define GLOBAL_MASTER_IO6 0x20 105#define GLOBAL_MASTER_IO6 0x20
diff --git a/include/asm-mips/sn/mapped_kernel.h b/include/asm-mips/sn/mapped_kernel.h
index 3a17846df849..59edb20f8ec5 100644
--- a/include/asm-mips/sn/mapped_kernel.h
+++ b/include/asm-mips/sn/mapped_kernel.h
@@ -23,11 +23,7 @@
23#include <linux/config.h> 23#include <linux/config.h>
24#include <asm/addrspace.h> 24#include <asm/addrspace.h>
25 25
26#ifdef CONFIG_BUILD_ELF64
27#define REP_BASE CAC_BASE 26#define REP_BASE CAC_BASE
28#else
29#define REP_BASE CKSEG0
30#endif
31 27
32#ifdef CONFIG_MAPPED_KERNEL 28#ifdef CONFIG_MAPPED_KERNEL
33 29
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
index 80cf6a52ed3b..f314da21b970 100644
--- a/include/asm-mips/sn/sn0/hubio.h
+++ b/include/asm-mips/sn/sn0/hubio.h
@@ -229,7 +229,7 @@ typedef union hubii_ilcsr_u {
229 icsr_llp_en: 1, /* LLP enable bit */ 229 icsr_llp_en: 1, /* LLP enable bit */
230 icsr_rsvd2: 1, /* reserver */ 230 icsr_rsvd2: 1, /* reserver */
231 icsr_wrm_reset: 1, /* Warm reset bit */ 231 icsr_wrm_reset: 1, /* Warm reset bit */
232 icsr_rsvd1: 2, /* Data ready offset */ 232 icsr_rsvd1: 2, /* Data ready offset */
233 icsr_null_to: 6; /* Null timeout */ 233 icsr_null_to: 6; /* Null timeout */
234 234
235 } icsr_fields_s; 235 } icsr_fields_s;
@@ -274,9 +274,9 @@ typedef union io_perf_sel {
274 u64 perf_sel_reg; 274 u64 perf_sel_reg;
275 struct { 275 struct {
276 u64 perf_rsvd : 48, 276 u64 perf_rsvd : 48,
277 perf_icct : 8, 277 perf_icct : 8,
278 perf_ippr1 : 4, 278 perf_ippr1 : 4,
279 perf_ippr0 : 4; 279 perf_ippr0 : 4;
280 } perf_sel_bits; 280 } perf_sel_bits;
281} io_perf_sel_t; 281} io_perf_sel_t;
282 282
@@ -287,8 +287,8 @@ typedef union io_perf_cnt {
287 u64 perf_cnt; 287 u64 perf_cnt;
288 struct { 288 struct {
289 u64 perf_rsvd1 : 32, 289 u64 perf_rsvd1 : 32,
290 perf_rsvd2 : 12, 290 perf_rsvd2 : 12,
291 perf_cnt : 20; 291 perf_cnt : 20;
292 } perf_cnt_bits; 292 } perf_cnt_bits;
293} io_perf_cnt_t; 293} io_perf_cnt_t;
294 294
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index a8919dcc93c8..2acf3e844f00 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -63,17 +63,7 @@
63 addu k1, k0 63 addu k1, k0
64 LONG_L k1, %lo(kernelsp)(k1) 64 LONG_L k1, %lo(kernelsp)(k1)
65#endif 65#endif
66#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 66#ifdef CONFIG_64BIT
67 MFC0 k1, CP0_CONTEXT
68 dsra k1, 23
69 lui k0, %hi(pgd_current)
70 addiu k0, %lo(pgd_current)
71 dsubu k1, k0
72 lui k0, %hi(kernelsp)
73 daddu k1, k0
74 LONG_L k1, %lo(kernelsp)(k1)
75#endif
76#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
77 MFC0 k1, CP0_CONTEXT 67 MFC0 k1, CP0_CONTEXT
78 lui k0, %highest(kernelsp) 68 lui k0, %highest(kernelsp)
79 dsrl k1, 23 69 dsrl k1, 23
@@ -91,11 +81,7 @@
91 mfc0 \temp, CP0_CONTEXT 81 mfc0 \temp, CP0_CONTEXT
92 srl \temp, 23 82 srl \temp, 23
93#endif 83#endif
94#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 84#ifdef CONFIG_64BIT
95 lw \temp, TI_CPU(gp)
96 dsll \temp, 3
97#endif
98#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
99 MFC0 \temp, CP0_CONTEXT 85 MFC0 \temp, CP0_CONTEXT
100 dsrl \temp, 23 86 dsrl \temp, 23
101#endif 87#endif
@@ -103,7 +89,7 @@
103 .endm 89 .endm
104#else 90#else
105 .macro get_saved_sp /* Uniprocessor variation */ 91 .macro get_saved_sp /* Uniprocessor variation */
106#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) 92#ifdef CONFIG_64BIT
107 lui k1, %highest(kernelsp) 93 lui k1, %highest(kernelsp)
108 daddiu k1, %higher(kernelsp) 94 daddiu k1, %higher(kernelsp)
109 dsll k1, k1, 16 95 dsll k1, k1, 16
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index ddae9bae31af..4097fac5ac3c 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -286,10 +286,10 @@ extern void __xchg_called_with_bad_pointer(void);
286static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) 286static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
287{ 287{
288 switch (size) { 288 switch (size) {
289 case 4: 289 case 4:
290 return __xchg_u32(ptr, x); 290 return __xchg_u32(ptr, x);
291 case 8: 291 case 8:
292 return __xchg_u64(ptr, x); 292 return __xchg_u64(ptr, x);
293 } 293 }
294 __xchg_called_with_bad_pointer(); 294 __xchg_called_with_bad_pointer();
295 return x; 295 return x;
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index c29c65b7818e..fa6d04dac56b 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -77,7 +77,7 @@ struct termios {
77#define IXANY 0004000 /* Any character will restart after stop. */ 77#define IXANY 0004000 /* Any character will restart after stop. */
78#define IXOFF 0010000 /* Enable start/stop input control. */ 78#define IXOFF 0010000 /* Enable start/stop input control. */
79#define IMAXBEL 0020000 /* Ring bell when input queue is full. */ 79#define IMAXBEL 0020000 /* Ring bell when input queue is full. */
80#define IUTF8 0040000 /* Input is UTF8 */ 80#define IUTF8 0040000 /* Input is UTF-8 */
81 81
82/* c_oflag bits */ 82/* c_oflag bits */
83#define OPOST 0000001 /* Perform output processing. */ 83#define OPOST 0000001 /* Perform output processing. */
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index fa193f861e71..f8d97dafd2f4 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -31,7 +31,7 @@ struct thread_info {
31 int preempt_count; /* 0 => preemptable, <0 => BUG */ 31 int preempt_count; /* 0 => preemptable, <0 => BUG */
32 32
33 mm_segment_t addr_limit; /* thread address space: 33 mm_segment_t addr_limit; /* thread address space:
34 0-0xBFFFFFFF for user-thead 34 0-0xBFFFFFFF for user-thead
35 0-0xFFFFFFFF for kernel-thread 35 0-0xFFFFFFFF for kernel-thread
36 */ 36 */
37 struct restart_block restart_block; 37 struct restart_block restart_block;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 12:25:00 -0500