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-rw-r--r--include/asm-mips/txx9/jmr3927.h2
-rw-r--r--include/asm-mips/txx9/tx3927.h12
2 files changed, 11 insertions, 3 deletions
diff --git a/include/asm-mips/txx9/jmr3927.h b/include/asm-mips/txx9/jmr3927.h
index d6eb1b6a54eb..a409c446bf18 100644
--- a/include/asm-mips/txx9/jmr3927.h
+++ b/include/asm-mips/txx9/jmr3927.h
@@ -149,8 +149,6 @@
149 149
150/* Clocks */ 150/* Clocks */
151#define JMR3927_CORECLK 132710400 /* 132.7MHz */ 151#define JMR3927_CORECLK 132710400 /* 132.7MHz */
152#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */
153#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */
154 152
155/* 153/*
156 * TX3927 Pin Configuration: 154 * TX3927 Pin Configuration:
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index 8d62b1ba2c14..0bac37f758ec 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -11,6 +11,7 @@
11#include <asm/txx9/txx927.h> 11#include <asm/txx9/txx927.h>
12 12
13#define TX3927_REG_BASE 0xfffe0000UL 13#define TX3927_REG_BASE 0xfffe0000UL
14#define TX3927_REG_SIZE 0x00010000
14#define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000) 15#define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000)
15#define TX3927_ROMC_REG (TX3927_REG_BASE + 0x9000) 16#define TX3927_ROMC_REG (TX3927_REG_BASE + 0x9000)
16#define TX3927_DMA_REG (TX3927_REG_BASE + 0xb000) 17#define TX3927_DMA_REG (TX3927_REG_BASE + 0xb000)
@@ -319,13 +320,22 @@ struct tx3927_ccfg_reg {
319#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG) 320#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG)
320#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG) 321#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG)
321#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG) 322#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG)
322#define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch))
323#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) 323#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
324#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG) 324#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
325 325
326#define TX3927_REV_PCODE() (tx3927_ccfgptr->crir >> 16)
327#define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000)
328#define TX3927_ROMC_SIZE(ch) \
329 (0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf))
330
331void tx3927_wdt_init(void);
332void tx3927_setup(void);
333void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr);
334void tx3927_setup_serial(unsigned int cts_mask);
326struct pci_controller; 335struct pci_controller;
327void __init tx3927_pcic_setup(struct pci_controller *channel, 336void __init tx3927_pcic_setup(struct pci_controller *channel,
328 unsigned long sdram_size, int extarb); 337 unsigned long sdram_size, int extarb);
329void tx3927_setup_pcierr_irq(void); 338void tx3927_setup_pcierr_irq(void);
339void tx3927_irq_init(void);
330 340
331#endif /* __ASM_TXX9_TX3927_H */ 341#endif /* __ASM_TXX9_TX3927_H */