6 files changed, 37 insertions, 38 deletions
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 7abdb926faf1..16c1c08d0a03 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -131,7 +131,7 @@
    || defined (CONFIG_CPU_R5000)                                       \
    || defined (CONFIG_CPU_NEVADA)                                      \
    || defined (CONFIG_CPU_TX49XX)                                      \
-    || defined (CONFIG_CPU_MIPS64_R1)
+    || defined (CONFIG_CPU_MIPS64)
 #define KUSIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
 #define KUSIZE_64       _LLCONST_(0x0000010000000000)   /* 2^^40 */
 #define K0SIZE          _LLCONST_(0x0000001000000000)   /* 2^^36 */
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 2ba20730a3e5..5496f9064a6a 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -12,6 +12,7 @@
 #include <linux/config.h>
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <asm/bug.h>
 #include <asm/byteorder.h>              /* sigh ... */
 #include <asm/cpu-features.h>
@@ -546,33 +547,27 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
        return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
 }
-#ifdef CONFIG_CPU_MIPS32_R1
 /*
- * Return the bit position (0..31) of the most significant 1 bit in a word
+ * Return the bit position (0..63) of the most significant 1 bit in a word
 * Returns -1 if no 1 bit exists
 */
-static __inline__ int __ilog2(unsigned long x)
+static inline int __ilog2(unsigned long x)
 {
        int lz;
-        __asm__ (
+        if (sizeof(x) == 4) {
-        "       .set    push                                            \n"
+                __asm__ (
-        "       .set    mips32                                          \n"
+                "       .set    push                                    \n"
-        "       clz     %0, %1                                          \n"
+                "       .set    mips32                                  \n"
-        "       .set    pop                                             \n"
+                "       clz     %0, %1                                  \n"
-        : "=r" (lz)
+                "       .set    pop                                     \n"
-        : "r" (x));
+                : "=r" (lz)
+                : "r" (x));
-        return 31 - lz;
+                return 31 - lz;
-}
+        }
-#elif defined(CONFIG_CPU_MIPS64_R1)
-/*
+        BUG_ON(sizeof(x) != 8);
- * Return the bit position (0..63) of the most significant 1 bit in a word
- * Returns -1 if no 1 bit exists
- */
-static __inline__ int __ilog2(unsigned long x)
-{
-        int lz;
        __asm__ (
        "       .set    push                                            \n"
@@ -584,7 +579,6 @@ static __inline__ int __ilog2(unsigned long x)
        return 63 - lz;
 }
-#endif
 /*
 * __ffs - find first bit in word.
@@ -595,7 +589,7 @@ static __inline__ int __ilog2(unsigned long x)
 */
 static inline unsigned long __ffs(unsigned long word)
 {
-#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1)
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
        return __ilog2(word & -word);
 #else
        int b = 0, s;
@@ -606,6 +600,8 @@ static inline unsigned long __ffs(unsigned long word)
        s =  4; if (word << 28 != 0) s = 0; b += s; word >>= s;
        s =  2; if (word << 30 != 0) s = 0; b += s; word >>= s;
        s =  1; if (word << 31 != 0) s = 0; b += s;
+        return b;
 #endif
 #ifdef CONFIG_64BIT
        s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
@@ -614,9 +610,10 @@ static inline unsigned long __ffs(unsigned long word)
        s =  4; if (word << 60 != 0) s = 0; b += s; word >>= s;
        s =  2; if (word << 62 != 0) s = 0; b += s; word >>= s;
        s =  1; if (word << 63 != 0) s = 0; b += s;
-#endif
        return b;
 #endif
+#endif
 }
 /*
@@ -655,10 +652,10 @@ static inline unsigned long ffz(unsigned long word)
 */
 static inline unsigned long flz(unsigned long word)
 {
-#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1)
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
        return __ilog2(~word);
 #else
-#if defined(CONFIG_32BIT)
+#ifdef CONFIG_32BIT
        int r = 31, s;
        word = ~word;
        s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
@@ -666,8 +663,10 @@ static inline unsigned long flz(unsigned long word)
        s = 4;  if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
        s = 2;  if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
        s = 1;  if ((word & 0x80000000)) s = 0; r -= s;
+        return r;
 #endif
-#if defined(CONFIG_64BIT)
+#ifdef CONFIG_64BIT
        int r = 63, s;
        word = ~word;
        s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
@@ -676,9 +675,10 @@ static inline unsigned long flz(unsigned long word)
        s = 4;  if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
        s = 2;  if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
        s = 1;  if ((word & 0x8000000000000000UL)) s = 0; r -= s;
-#endif
        return r;
 #endif
+#endif
 }
 /*
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 5250231e936e..7517189e469f 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -232,7 +232,7 @@ __asm__(
 #endif
-#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2)
+#ifdef CONFIG_CPU_MIPSR2
 #define instruction_hazard()                                            \
 do {                                                                    \
 __label__ __next;                                                       \
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h
index 0ba99f019be9..a5735761f5e5 100644
--- a/include/asm-mips/interrupt.h
+++ b/include/asm-mips/interrupt.h
@@ -19,7 +19,7 @@ __asm__ (
        "       .set    push                                            \n"
        "       .set    reorder                                         \n"
        "       .set    noat                                            \n"
-#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)
+#ifdef CONFIG_CPU_MIPSR2
        "       ei                                                      \n"
 #else
        "       mfc0    $1,$12                                          \n"
@@ -51,7 +51,7 @@ __asm__ (
        "       .macro  local_irq_disable\n"
        "       .set    push                                            \n"
        "       .set    noat                                            \n"
-#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)
+#ifdef CONFIG_CPU_MIPSR2
        "       di                                                      \n"
 #else
        "       mfc0    $1,$12                                          \n"
@@ -91,7 +91,7 @@ __asm__ (
        "       .set    push                                            \n"
        "       .set    reorder                                         \n"
        "       .set    noat                                            \n"
-#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)
+#ifdef CONFIG_CPU_MIPSR2
        "       di      \\result                                        \n"
 #else
        "       mfc0    \\result, $12                                   \n"
@@ -115,8 +115,7 @@ __asm__ (
        "       .macro  local_irq_restore flags                         \n"
        "       .set    noreorder                                       \n"
        "       .set    noat                                            \n"
-#if (defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)) && \
+#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
-    defined(CONFIG_IRQ_CPU)
        /*
         * Slow, but doesn't suffer from a relativly unlikely race
         * condition we're having since days 1.
@@ -125,7 +124,7 @@ __asm__ (
        "        di                                                     \n"
        "       ei                                                      \n"
        "1:                                                             \n"
-#elif defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)
+#elif defined(CONFIG_CPU_MIPSR2)
        /*
         * Fast, dangerous.  Life is fun, life is good.
         */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 5c5edbf93707..9f92aed17754 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -14,7 +14,7 @@
 /*
 * CPU feature overrides for MIPS boards
 */
-#ifdef CONFIG_CPU_MIPS32_R1
+#ifdef CONFIG_CPU_MIPS32
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
 #define cpu_has_4kcache         1
@@ -40,7 +40,7 @@
 #define cpu_icache_snoops_remote_store 1
 #endif
-#ifdef CONFIG_CPU_MIPS64_R1
+#ifdef CONFIG_CPU_MIPS64
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
 #define cpu_has_4kcache         1
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 0076a537cf0c..ee25a779bf49 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -76,7 +76,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
 * These are used to make use of C type-checking..
 */
 #ifdef CONFIG_64BIT_PHYS_ADDR
-  #ifdef CONFIG_CPU_MIPS32_R1
+  #ifdef CONFIG_CPU_MIPS32
    typedef struct { unsigned long pte_low, pte_high; } pte_t;
    #define pte_val(x)    ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
  #else

diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 7abdb926faf1..16c1c08d0a03 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h
@@ -131,7 +131,7 @@
131	\|\| defined (CONFIG_CPU_R5000) \	131	\|\| defined (CONFIG_CPU_R5000) \
132	\|\| defined (CONFIG_CPU_NEVADA) \	132	\|\| defined (CONFIG_CPU_NEVADA) \
133	\|\| defined (CONFIG_CPU_TX49XX) \	133	\|\| defined (CONFIG_CPU_TX49XX) \
134	\|\| defined (CONFIG_CPU_MIPS64_R1)	134	\|\| defined (CONFIG_CPU_MIPS64)
135	#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */	135	#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
136	#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */	136	#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
137	#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */	137	#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */


diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 2ba20730a3e5..5496f9064a6a 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h
@@ -12,6 +12,7 @@
12	#include <linux/config.h>	12	#include <linux/config.h>
13	#include <linux/compiler.h>	13	#include <linux/compiler.h>
14	#include <linux/types.h>	14	#include <linux/types.h>
		15	#include <asm/bug.h>
15	#include <asm/byteorder.h> /* sigh ... */	16	#include <asm/byteorder.h> /* sigh ... */
16	#include <asm/cpu-features.h>	17	#include <asm/cpu-features.h>
17		18
@@ -546,33 +547,27 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
546	return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));	547	return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
547	}	548	}
548		549
549	#ifdef CONFIG_CPU_MIPS32_R1
550	/*	550	/*
551	* Return the bit position (0..31) of the most significant 1 bit in a word	551	* Return the bit position (0..63) of the most significant 1 bit in a word
552	* Returns -1 if no 1 bit exists	552	* Returns -1 if no 1 bit exists
553	*/	553	*/
554	static __inline__ int __ilog2(unsigned long x)	554	static inline int __ilog2(unsigned long x)
555	{	555	{
556	int lz;	556	int lz;
557		557
558	__asm__ (	558	if (sizeof(x) == 4) {
559	" .set push \n"	559	__asm__ (
560	" .set mips32 \n"	560	" .set push \n"
561	" clz %0, %1 \n"	561	" .set mips32 \n"
562	" .set pop \n"	562	" clz %0, %1 \n"
563	: "=r" (lz)	563	" .set pop \n"
564	: "r" (x));	564	: "=r" (lz)
		565	: "r" (x));
565		566
566	return 31 - lz;	567	return 31 - lz;
567	}	568	}
568	#elif defined(CONFIG_CPU_MIPS64_R1)	569
569	/*	570	BUG_ON(sizeof(x) != 8);
570	* Return the bit position (0..63) of the most significant 1 bit in a word
571	* Returns -1 if no 1 bit exists
572	*/
573	static __inline__ int __ilog2(unsigned long x)
574	{
575	int lz;
576		571
577	__asm__ (	572	__asm__ (
578	" .set push \n"	573	" .set push \n"
@@ -584,7 +579,6 @@ static __inline__ int __ilog2(unsigned long x)
584		579
585	return 63 - lz;	580	return 63 - lz;
586	}	581	}
587	#endif
588		582
589	/*	583	/*
590	* __ffs - find first bit in word.	584	* __ffs - find first bit in word.
@@ -595,7 +589,7 @@ static __inline__ int __ilog2(unsigned long x)
595	*/	589	*/
596	static inline unsigned long __ffs(unsigned long word)	590	static inline unsigned long __ffs(unsigned long word)
597	{	591	{
598	#if defined(CONFIG_CPU_MIPS32_R1) \|\| defined(CONFIG_CPU_MIPS64_R1)	592	#if defined(CONFIG_CPU_MIPS32) \|\| defined(CONFIG_CPU_MIPS64)
599	return __ilog2(word & -word);	593	return __ilog2(word & -word);
600	#else	594	#else
601	int b = 0, s;	595	int b = 0, s;
@@ -606,6 +600,8 @@ static inline unsigned long __ffs(unsigned long word)
606	s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;	600	s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
607	s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;	601	s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
608	s = 1; if (word << 31 != 0) s = 0; b += s;	602	s = 1; if (word << 31 != 0) s = 0; b += s;
		603
		604	return b;
609	#endif	605	#endif
610	#ifdef CONFIG_64BIT	606	#ifdef CONFIG_64BIT
611	s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;	607	s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
@@ -614,9 +610,10 @@ static inline unsigned long __ffs(unsigned long word)
614	s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;	610	s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
615	s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;	611	s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
616	s = 1; if (word << 63 != 0) s = 0; b += s;	612	s = 1; if (word << 63 != 0) s = 0; b += s;
617	#endif	613
618	return b;	614	return b;
619	#endif	615	#endif
		616	#endif
620	}	617	}
621		618
622	/*	619	/*
@@ -655,10 +652,10 @@ static inline unsigned long ffz(unsigned long word)
655	*/	652	*/
656	static inline unsigned long flz(unsigned long word)	653	static inline unsigned long flz(unsigned long word)
657	{	654	{
658	#if defined(CONFIG_CPU_MIPS32_R1) \|\| defined(CONFIG_CPU_MIPS64_R1)	655	#if defined(CONFIG_CPU_MIPS32) \|\| defined(CONFIG_CPU_MIPS64)
659	return __ilog2(~word);	656	return __ilog2(~word);
660	#else	657	#else
661	#if defined(CONFIG_32BIT)	658	#ifdef CONFIG_32BIT
662	int r = 31, s;	659	int r = 31, s;
663	word = ~word;	660	word = ~word;
664	s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;	661	s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
@@ -666,8 +663,10 @@ static inline unsigned long flz(unsigned long word)
666	s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;	663	s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
667	s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;	664	s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
668	s = 1; if ((word & 0x80000000)) s = 0; r -= s;	665	s = 1; if ((word & 0x80000000)) s = 0; r -= s;
		666
		667	return r;
669	#endif	668	#endif
670	#if defined(CONFIG_64BIT)	669	#ifdef CONFIG_64BIT
671	int r = 63, s;	670	int r = 63, s;
672	word = ~word;	671	word = ~word;
673	s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;	672	s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
@@ -676,9 +675,10 @@ static inline unsigned long flz(unsigned long word)
676	s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;	675	s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
677	s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;	676	s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
678	s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;	677	s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;
679	#endif	678
680	return r;	679	return r;
681	#endif	680	#endif
		681	#endif
682	}	682	}
683		683
684	/*	684	/*


diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 5250231e936e..7517189e469f 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h
@@ -232,7 +232,7 @@ __asm__(
232		232
233	#endif	233	#endif
234		234
235	#if defined(CONFIG_CPU_MIPS32_R2) \|\| defined (CONFIG_CPU_MIPS64_R2)	235	#ifdef CONFIG_CPU_MIPSR2
236	#define instruction_hazard() \	236	#define instruction_hazard() \
237	do { \	237	do { \
238	__label__ __next; \	238	__label__ __next; \


diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index 0ba99f019be9..a5735761f5e5 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h
@@ -19,7 +19,7 @@ __asm__ (
19	" .set push \n"	19	" .set push \n"
20	" .set reorder \n"	20	" .set reorder \n"
21	" .set noat \n"	21	" .set noat \n"
22	#if defined(CONFIG_CPU_MIPS32_R2) \|\| defined(CONFIG_CPU_MIPS64_R2)	22	#ifdef CONFIG_CPU_MIPSR2
23	" ei \n"	23	" ei \n"
24	#else	24	#else
25	" mfc0 $1,$12 \n"	25	" mfc0 $1,$12 \n"
@@ -51,7 +51,7 @@ __asm__ (
51	" .macro local_irq_disable\n"	51	" .macro local_irq_disable\n"
52	" .set push \n"	52	" .set push \n"
53	" .set noat \n"	53	" .set noat \n"
54	#if defined(CONFIG_CPU_MIPS32_R2) \|\| defined(CONFIG_CPU_MIPS64_R2)	54	#ifdef CONFIG_CPU_MIPSR2
55	" di \n"	55	" di \n"
56	#else	56	#else
57	" mfc0 $1,$12 \n"	57	" mfc0 $1,$12 \n"
@@ -91,7 +91,7 @@ __asm__ (
91	" .set push \n"	91	" .set push \n"
92	" .set reorder \n"	92	" .set reorder \n"
93	" .set noat \n"	93	" .set noat \n"
94	#if defined(CONFIG_CPU_MIPS32_R2) \|\| defined(CONFIG_CPU_MIPS64_R2)	94	#ifdef CONFIG_CPU_MIPSR2
95	" di \\result \n"	95	" di \\result \n"
96	#else	96	#else
97	" mfc0 \\result, $12 \n"	97	" mfc0 \\result, $12 \n"
@@ -115,8 +115,7 @@ __asm__ (
115	" .macro local_irq_restore flags \n"	115	" .macro local_irq_restore flags \n"
116	" .set noreorder \n"	116	" .set noreorder \n"
117	" .set noat \n"	117	" .set noat \n"
118	#if (defined(CONFIG_CPU_MIPS32_R2) \|\| defined(CONFIG_CPU_MIPS64_R2)) && \	118	#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
119	defined(CONFIG_IRQ_CPU)
120	/*	119	/*
121	* Slow, but doesn't suffer from a relativly unlikely race	120	* Slow, but doesn't suffer from a relativly unlikely race
122	* condition we're having since days 1.	121	* condition we're having since days 1.
@@ -125,7 +124,7 @@ __asm__ (
125	" di \n"	124	" di \n"
126	" ei \n"	125	" ei \n"
127	"1: \n"	126	"1: \n"
128	#elif defined(CONFIG_CPU_MIPS32_R2) \|\| defined(CONFIG_CPU_MIPS64_R2)	127	#elif defined(CONFIG_CPU_MIPSR2)
129	/*	128	/*
130	* Fast, dangerous. Life is fun, life is good.	129	* Fast, dangerous. Life is fun, life is good.
131	*/	130	*/


diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 5c5edbf93707..9f92aed17754 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -14,7 +14,7 @@
14	/*	14	/*
15	* CPU feature overrides for MIPS boards	15	* CPU feature overrides for MIPS boards
16	*/	16	*/
17	#ifdef CONFIG_CPU_MIPS32_R1	17	#ifdef CONFIG_CPU_MIPS32
18	#define cpu_has_tlb 1	18	#define cpu_has_tlb 1
19	#define cpu_has_4kex 1	19	#define cpu_has_4kex 1
20	#define cpu_has_4kcache 1	20	#define cpu_has_4kcache 1
@@ -40,7 +40,7 @@
40	#define cpu_icache_snoops_remote_store 1	40	#define cpu_icache_snoops_remote_store 1
41	#endif	41	#endif
42		42
43	#ifdef CONFIG_CPU_MIPS64_R1	43	#ifdef CONFIG_CPU_MIPS64
44	#define cpu_has_tlb 1	44	#define cpu_has_tlb 1
45	#define cpu_has_4kex 1	45	#define cpu_has_4kex 1
46	#define cpu_has_4kcache 1	46	#define cpu_has_4kcache 1


diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 0076a537cf0c..ee25a779bf49 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h
@@ -76,7 +76,7 @@ static inline void copy_user_page(void vto, void vfrom, unsigned long vaddr,
76	* These are used to make use of C type-checking..	76	* These are used to make use of C type-checking..
77	*/	77	*/
78	#ifdef CONFIG_64BIT_PHYS_ADDR	78	#ifdef CONFIG_64BIT_PHYS_ADDR
79	#ifdef CONFIG_CPU_MIPS32_R1	79	#ifdef CONFIG_CPU_MIPS32
80	typedef struct { unsigned long pte_low, pte_high; } pte_t;	80	typedef struct { unsigned long pte_low, pte_high; } pte_t;
81	#define pte_val(x) ((x).pte_low \| ((unsigned long long)(x).pte_high << 32))	81	#define pte_val(x) ((x).pte_low \| ((unsigned long long)(x).pte_high << 32))
82	#else	82	#else