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-rw-r--r--include/asm-mips/bitops.h465
-rw-r--r--include/asm-mips/compat.h5
-rw-r--r--include/asm-mips/futex.h6
-rw-r--r--include/asm-mips/io.h13
-rw-r--r--include/asm-mips/linkage.h4
-rw-r--r--include/asm-mips/mc146818-time.h33
-rw-r--r--include/asm-mips/mmzone.h14
-rw-r--r--include/asm-mips/page.h3
-rw-r--r--include/asm-mips/poll.h1
-rw-r--r--include/asm-mips/serial.h85
-rw-r--r--include/asm-mips/termbits.h2
-rw-r--r--include/asm-mips/time.h12
-rw-r--r--include/asm-mips/types.h5
13 files changed, 47 insertions, 601 deletions
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 8e802059fe67..a1728f8c0705 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -105,22 +105,6 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
105} 105}
106 106
107/* 107/*
108 * __set_bit - Set a bit in memory
109 * @nr: the bit to set
110 * @addr: the address to start counting from
111 *
112 * Unlike set_bit(), this function is non-atomic and may be reordered.
113 * If it's called on the same region of memory simultaneously, the effect
114 * may be that only one operation succeeds.
115 */
116static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
117{
118 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
119
120 *m |= 1UL << (nr & SZLONG_MASK);
121}
122
123/*
124 * clear_bit - Clears a bit in memory 108 * clear_bit - Clears a bit in memory
125 * @nr: Bit to clear 109 * @nr: Bit to clear
126 * @addr: Address to start counting from 110 * @addr: Address to start counting from
@@ -169,22 +153,6 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
169} 153}
170 154
171/* 155/*
172 * __clear_bit - Clears a bit in memory
173 * @nr: Bit to clear
174 * @addr: Address to start counting from
175 *
176 * Unlike clear_bit(), this function is non-atomic and may be reordered.
177 * If it's called on the same region of memory simultaneously, the effect
178 * may be that only one operation succeeds.
179 */
180static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
181{
182 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
183
184 *m &= ~(1UL << (nr & SZLONG_MASK));
185}
186
187/*
188 * change_bit - Toggle a bit in memory 156 * change_bit - Toggle a bit in memory
189 * @nr: Bit to change 157 * @nr: Bit to change
190 * @addr: Address to start counting from 158 * @addr: Address to start counting from
@@ -235,22 +203,6 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
235} 203}
236 204
237/* 205/*
238 * __change_bit - Toggle a bit in memory
239 * @nr: the bit to change
240 * @addr: the address to start counting from
241 *
242 * Unlike change_bit(), this function is non-atomic and may be reordered.
243 * If it's called on the same region of memory simultaneously, the effect
244 * may be that only one operation succeeds.
245 */
246static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
247{
248 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
249
250 *m ^= 1UL << (nr & SZLONG_MASK);
251}
252
253/*
254 * test_and_set_bit - Set a bit and return its old value 206 * test_and_set_bit - Set a bit and return its old value
255 * @nr: Bit to set 207 * @nr: Bit to set
256 * @addr: Address to count from 208 * @addr: Address to count from
@@ -321,30 +273,6 @@ static inline int test_and_set_bit(unsigned long nr,
321} 273}
322 274
323/* 275/*
324 * __test_and_set_bit - Set a bit and return its old value
325 * @nr: Bit to set
326 * @addr: Address to count from
327 *
328 * This operation is non-atomic and can be reordered.
329 * If two examples of this operation race, one can appear to succeed
330 * but actually fail. You must protect multiple accesses with a lock.
331 */
332static inline int __test_and_set_bit(unsigned long nr,
333 volatile unsigned long *addr)
334{
335 volatile unsigned long *a = addr;
336 unsigned long mask;
337 int retval;
338
339 a += nr >> SZLONG_LOG;
340 mask = 1UL << (nr & SZLONG_MASK);
341 retval = (mask & *a) != 0;
342 *a |= mask;
343
344 return retval;
345}
346
347/*
348 * test_and_clear_bit - Clear a bit and return its old value 276 * test_and_clear_bit - Clear a bit and return its old value
349 * @nr: Bit to clear 277 * @nr: Bit to clear
350 * @addr: Address to count from 278 * @addr: Address to count from
@@ -417,30 +345,6 @@ static inline int test_and_clear_bit(unsigned long nr,
417} 345}
418 346
419/* 347/*
420 * __test_and_clear_bit - Clear a bit and return its old value
421 * @nr: Bit to clear
422 * @addr: Address to count from
423 *
424 * This operation is non-atomic and can be reordered.
425 * If two examples of this operation race, one can appear to succeed
426 * but actually fail. You must protect multiple accesses with a lock.
427 */
428static inline int __test_and_clear_bit(unsigned long nr,
429 volatile unsigned long * addr)
430{
431 volatile unsigned long *a = addr;
432 unsigned long mask;
433 int retval;
434
435 a += (nr >> SZLONG_LOG);
436 mask = 1UL << (nr & SZLONG_MASK);
437 retval = ((mask & *a) != 0);
438 *a &= ~mask;
439
440 return retval;
441}
442
443/*
444 * test_and_change_bit - Change a bit and return its old value 348 * test_and_change_bit - Change a bit and return its old value
445 * @nr: Bit to change 349 * @nr: Bit to change
446 * @addr: Address to count from 350 * @addr: Address to count from
@@ -509,43 +413,11 @@ static inline int test_and_change_bit(unsigned long nr,
509 } 413 }
510} 414}
511 415
512/*
513 * __test_and_change_bit - Change a bit and return its old value
514 * @nr: Bit to change
515 * @addr: Address to count from
516 *
517 * This operation is non-atomic and can be reordered.
518 * If two examples of this operation race, one can appear to succeed
519 * but actually fail. You must protect multiple accesses with a lock.
520 */
521static inline int __test_and_change_bit(unsigned long nr,
522 volatile unsigned long *addr)
523{
524 volatile unsigned long *a = addr;
525 unsigned long mask;
526 int retval;
527
528 a += (nr >> SZLONG_LOG);
529 mask = 1UL << (nr & SZLONG_MASK);
530 retval = ((mask & *a) != 0);
531 *a ^= mask;
532
533 return retval;
534}
535
536#undef __bi_flags 416#undef __bi_flags
537#undef __bi_local_irq_save 417#undef __bi_local_irq_save
538#undef __bi_local_irq_restore 418#undef __bi_local_irq_restore
539 419
540/* 420#include <asm-generic/bitops/non-atomic.h>
541 * test_bit - Determine whether a bit is set
542 * @nr: bit number to test
543 * @addr: Address to start counting from
544 */
545static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
546{
547 return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
548}
549 421
550/* 422/*
551 * Return the bit position (0..63) of the most significant 1 bit in a word 423 * Return the bit position (0..63) of the most significant 1 bit in a word
@@ -580,6 +452,8 @@ static inline int __ilog2(unsigned long x)
580 return 63 - lz; 452 return 63 - lz;
581} 453}
582 454
455#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
456
583/* 457/*
584 * __ffs - find first bit in word. 458 * __ffs - find first bit in word.
585 * @word: The word to search 459 * @word: The word to search
@@ -589,31 +463,7 @@ static inline int __ilog2(unsigned long x)
589 */ 463 */
590static inline unsigned long __ffs(unsigned long word) 464static inline unsigned long __ffs(unsigned long word)
591{ 465{
592#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
593 return __ilog2(word & -word); 466 return __ilog2(word & -word);
594#else
595 int b = 0, s;
596
597#ifdef CONFIG_32BIT
598 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
599 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
600 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
601 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
602 s = 1; if (word << 31 != 0) s = 0; b += s;
603
604 return b;
605#endif
606#ifdef CONFIG_64BIT
607 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
608 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
609 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
610 s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
611 s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
612 s = 1; if (word << 63 != 0) s = 0; b += s;
613
614 return b;
615#endif
616#endif
617} 467}
618 468
619/* 469/*
@@ -652,321 +502,38 @@ static inline unsigned long ffz(unsigned long word)
652 */ 502 */
653static inline unsigned long fls(unsigned long word) 503static inline unsigned long fls(unsigned long word)
654{ 504{
655#ifdef CONFIG_32BIT
656#ifdef CONFIG_CPU_MIPS32 505#ifdef CONFIG_CPU_MIPS32
657 __asm__ ("clz %0, %1" : "=r" (word) : "r" (word)); 506 __asm__ ("clz %0, %1" : "=r" (word) : "r" (word));
658 507
659 return 32 - word; 508 return 32 - word;
660#else
661 {
662 int r = 32, s;
663
664 if (word == 0)
665 return 0;
666
667 s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
668 s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s;
669 s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
670 s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
671 s = 1; if ((word & 0x80000000)) s = 0; r -= s;
672
673 return r;
674 }
675#endif 509#endif
676#endif /* CONFIG_32BIT */
677 510
678#ifdef CONFIG_64BIT
679#ifdef CONFIG_CPU_MIPS64 511#ifdef CONFIG_CPU_MIPS64
680
681 __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word)); 512 __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word));
682 513
683 return 64 - word; 514 return 64 - word;
684#else
685 {
686 int r = 64, s;
687
688 if (word == 0)
689 return 0;
690
691 s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
692 s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s;
693 s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s;
694 s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
695 s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
696 s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;
697
698 return r;
699 }
700#endif 515#endif
701#endif /* CONFIG_64BIT */
702} 516}
703 517
704#define fls64(x) generic_fls64(x) 518#else
705
706/*
707 * find_next_zero_bit - find the first zero bit in a memory region
708 * @addr: The address to base the search on
709 * @offset: The bitnumber to start searching at
710 * @size: The maximum size to search
711 */
712static inline unsigned long find_next_zero_bit(const unsigned long *addr,
713 unsigned long size, unsigned long offset)
714{
715 const unsigned long *p = addr + (offset >> SZLONG_LOG);
716 unsigned long result = offset & ~SZLONG_MASK;
717 unsigned long tmp;
718
719 if (offset >= size)
720 return size;
721 size -= result;
722 offset &= SZLONG_MASK;
723 if (offset) {
724 tmp = *(p++);
725 tmp |= ~0UL >> (_MIPS_SZLONG-offset);
726 if (size < _MIPS_SZLONG)
727 goto found_first;
728 if (~tmp)
729 goto found_middle;
730 size -= _MIPS_SZLONG;
731 result += _MIPS_SZLONG;
732 }
733 while (size & ~SZLONG_MASK) {
734 if (~(tmp = *(p++)))
735 goto found_middle;
736 result += _MIPS_SZLONG;
737 size -= _MIPS_SZLONG;
738 }
739 if (!size)
740 return result;
741 tmp = *p;
742
743found_first:
744 tmp |= ~0UL << size;
745 if (tmp == ~0UL) /* Are any bits zero? */
746 return result + size; /* Nope. */
747found_middle:
748 return result + ffz(tmp);
749}
750 519
751#define find_first_zero_bit(addr, size) \ 520#include <asm-generic/bitops/__ffs.h>
752 find_next_zero_bit((addr), (size), 0) 521#include <asm-generic/bitops/ffs.h>
522#include <asm-generic/bitops/ffz.h>
523#include <asm-generic/bitops/fls.h>
753 524
754/* 525#endif /*defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) */
755 * find_next_bit - find the next set bit in a memory region
756 * @addr: The address to base the search on
757 * @offset: The bitnumber to start searching at
758 * @size: The maximum size to search
759 */
760static inline unsigned long find_next_bit(const unsigned long *addr,
761 unsigned long size, unsigned long offset)
762{
763 const unsigned long *p = addr + (offset >> SZLONG_LOG);
764 unsigned long result = offset & ~SZLONG_MASK;
765 unsigned long tmp;
766
767 if (offset >= size)
768 return size;
769 size -= result;
770 offset &= SZLONG_MASK;
771 if (offset) {
772 tmp = *(p++);
773 tmp &= ~0UL << offset;
774 if (size < _MIPS_SZLONG)
775 goto found_first;
776 if (tmp)
777 goto found_middle;
778 size -= _MIPS_SZLONG;
779 result += _MIPS_SZLONG;
780 }
781 while (size & ~SZLONG_MASK) {
782 if ((tmp = *(p++)))
783 goto found_middle;
784 result += _MIPS_SZLONG;
785 size -= _MIPS_SZLONG;
786 }
787 if (!size)
788 return result;
789 tmp = *p;
790
791found_first:
792 tmp &= ~0UL >> (_MIPS_SZLONG - size);
793 if (tmp == 0UL) /* Are any bits set? */
794 return result + size; /* Nope. */
795found_middle:
796 return result + __ffs(tmp);
797}
798 526
799/* 527#include <asm-generic/bitops/fls64.h>
800 * find_first_bit - find the first set bit in a memory region 528#include <asm-generic/bitops/find.h>
801 * @addr: The address to start the search at
802 * @size: The maximum size to search
803 *
804 * Returns the bit-number of the first set bit, not the number of the byte
805 * containing a bit.
806 */
807#define find_first_bit(addr, size) \
808 find_next_bit((addr), (size), 0)
809 529
810#ifdef __KERNEL__ 530#ifdef __KERNEL__
811 531
812/* 532#include <asm-generic/bitops/sched.h>
813 * Every architecture must define this function. It's the fastest 533#include <asm-generic/bitops/hweight.h>
814 * way of searching a 140-bit bitmap where the first 100 bits are 534#include <asm-generic/bitops/ext2-non-atomic.h>
815 * unlikely to be set. It's guaranteed that at least one of the 140 535#include <asm-generic/bitops/ext2-atomic.h>
816 * bits is cleared. 536#include <asm-generic/bitops/minix.h>
817 */
818static inline int sched_find_first_bit(const unsigned long *b)
819{
820#ifdef CONFIG_32BIT
821 if (unlikely(b[0]))
822 return __ffs(b[0]);
823 if (unlikely(b[1]))
824 return __ffs(b[1]) + 32;
825 if (unlikely(b[2]))
826 return __ffs(b[2]) + 64;
827 if (b[3])
828 return __ffs(b[3]) + 96;
829 return __ffs(b[4]) + 128;
830#endif
831#ifdef CONFIG_64BIT
832 if (unlikely(b[0]))
833 return __ffs(b[0]);
834 if (unlikely(b[1]))
835 return __ffs(b[1]) + 64;
836 return __ffs(b[2]) + 128;
837#endif
838}
839
840/*
841 * hweightN - returns the hamming weight of a N-bit word
842 * @x: the word to weigh
843 *
844 * The Hamming Weight of a number is the total number of bits set in it.
845 */
846
847#define hweight64(x) generic_hweight64(x)
848#define hweight32(x) generic_hweight32(x)
849#define hweight16(x) generic_hweight16(x)
850#define hweight8(x) generic_hweight8(x)
851
852static inline int __test_and_set_le_bit(unsigned long nr, unsigned long *addr)
853{
854 unsigned char *ADDR = (unsigned char *) addr;
855 int mask, retval;
856
857 ADDR += nr >> 3;
858 mask = 1 << (nr & 0x07);
859 retval = (mask & *ADDR) != 0;
860 *ADDR |= mask;
861
862 return retval;
863}
864
865static inline int __test_and_clear_le_bit(unsigned long nr, unsigned long *addr)
866{
867 unsigned char *ADDR = (unsigned char *) addr;
868 int mask, retval;
869
870 ADDR += nr >> 3;
871 mask = 1 << (nr & 0x07);
872 retval = (mask & *ADDR) != 0;
873 *ADDR &= ~mask;
874
875 return retval;
876}
877
878static inline int test_le_bit(unsigned long nr, const unsigned long * addr)
879{
880 const unsigned char *ADDR = (const unsigned char *) addr;
881 int mask;
882
883 ADDR += nr >> 3;
884 mask = 1 << (nr & 0x07);
885
886 return ((mask & *ADDR) != 0);
887}
888
889static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
890 unsigned long size, unsigned long offset)
891{
892 unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
893 unsigned long result = offset & ~SZLONG_MASK;
894 unsigned long tmp;
895
896 if (offset >= size)
897 return size;
898 size -= result;
899 offset &= SZLONG_MASK;
900 if (offset) {
901 tmp = cpu_to_lelongp(p++);
902 tmp |= ~0UL >> (_MIPS_SZLONG-offset); /* bug or feature ? */
903 if (size < _MIPS_SZLONG)
904 goto found_first;
905 if (~tmp)
906 goto found_middle;
907 size -= _MIPS_SZLONG;
908 result += _MIPS_SZLONG;
909 }
910 while (size & ~SZLONG_MASK) {
911 if (~(tmp = cpu_to_lelongp(p++)))
912 goto found_middle;
913 result += _MIPS_SZLONG;
914 size -= _MIPS_SZLONG;
915 }
916 if (!size)
917 return result;
918 tmp = cpu_to_lelongp(p);
919
920found_first:
921 tmp |= ~0UL << size;
922 if (tmp == ~0UL) /* Are any bits zero? */
923 return result + size; /* Nope. */
924
925found_middle:
926 return result + ffz(tmp);
927}
928
929#define find_first_zero_le_bit(addr, size) \
930 find_next_zero_le_bit((addr), (size), 0)
931
932#define ext2_set_bit(nr,addr) \
933 __test_and_set_le_bit((nr),(unsigned long*)addr)
934#define ext2_clear_bit(nr, addr) \
935 __test_and_clear_le_bit((nr),(unsigned long*)addr)
936 #define ext2_set_bit_atomic(lock, nr, addr) \
937({ \
938 int ret; \
939 spin_lock(lock); \
940 ret = ext2_set_bit((nr), (addr)); \
941 spin_unlock(lock); \
942 ret; \
943})
944
945#define ext2_clear_bit_atomic(lock, nr, addr) \
946({ \
947 int ret; \
948 spin_lock(lock); \
949 ret = ext2_clear_bit((nr), (addr)); \
950 spin_unlock(lock); \
951 ret; \
952})
953#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
954#define ext2_find_first_zero_bit(addr, size) \
955 find_first_zero_le_bit((unsigned long*)addr, size)
956#define ext2_find_next_zero_bit(addr, size, off) \
957 find_next_zero_le_bit((unsigned long*)addr, size, off)
958
959/*
960 * Bitmap functions for the minix filesystem.
961 *
962 * FIXME: These assume that Minix uses the native byte/bitorder.
963 * This limits the Minix filesystem's value for data exchange very much.
964 */
965#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
966#define minix_set_bit(nr,addr) set_bit(nr,addr)
967#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
968#define minix_test_bit(nr,addr) test_bit(nr,addr)
969#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
970 537
971#endif /* __KERNEL__ */ 538#endif /* __KERNEL__ */
972 539
diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h
index 0012bd804d2d..986511db54a6 100644
--- a/include/asm-mips/compat.h
+++ b/include/asm-mips/compat.h
@@ -133,6 +133,11 @@ static inline void __user *compat_ptr(compat_uptr_t uptr)
133 return (void __user *)(long)uptr; 133 return (void __user *)(long)uptr;
134} 134}
135 135
136static inline compat_uptr_t ptr_to_compat(void __user *uptr)
137{
138 return (u32)(unsigned long)uptr;
139}
140
136static inline void __user *compat_alloc_user_space(long len) 141static inline void __user *compat_alloc_user_space(long len)
137{ 142{
138 struct pt_regs *regs = (struct pt_regs *) 143 struct pt_regs *regs = (struct pt_regs *)
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 2454c44a8f54..a554089991f2 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -99,5 +99,11 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
99 return ret; 99 return ret;
100} 100}
101 101
102static inline int
103futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
104{
105 return -ENOSYS;
106}
107
102#endif 108#endif
103#endif 109#endif
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 546a17e56a9b..6b17eb9d79a5 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -556,24 +556,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
556 */ 556 */
557#define __ISA_IO_base ((char *)(isa_slot_offset)) 557#define __ISA_IO_base ((char *)(isa_slot_offset))
558 558
559#define isa_readb(a) readb(__ISA_IO_base + (a))
560#define isa_readw(a) readw(__ISA_IO_base + (a))
561#define isa_readl(a) readl(__ISA_IO_base + (a))
562#define isa_readq(a) readq(__ISA_IO_base + (a))
563#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
564#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
565#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
566#define isa_writeq(q,a) writeq(q,__ISA_IO_base + (a))
567#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
568#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
569#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
570
571/* 559/*
572 * We don't have csum_partial_copy_fromio() yet, so we cheat here and 560 * We don't have csum_partial_copy_fromio() yet, so we cheat here and
573 * just copy it. The net code will then do the checksum later. 561 * just copy it. The net code will then do the checksum later.
574 */ 562 */
575#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len)) 563#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len))
576#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(b),(c),(d))
577 564
578/* 565/*
579 * check_signature - find BIOS signatures 566 * check_signature - find BIOS signatures
diff --git a/include/asm-mips/linkage.h b/include/asm-mips/linkage.h
index 291c2d01c44f..b6185d3cfe68 100644
--- a/include/asm-mips/linkage.h
+++ b/include/asm-mips/linkage.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_LINKAGE_H 1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H 2#define __ASM_LINKAGE_H
3 3
4/* Nothing to see here... */ 4#ifdef __ASSEMBLY__
5#include <asm/asm.h>
6#endif
5 7
6#endif 8#endif
diff --git a/include/asm-mips/mc146818-time.h b/include/asm-mips/mc146818-time.h
index 47214861093b..41ac8d363c67 100644
--- a/include/asm-mips/mc146818-time.h
+++ b/include/asm-mips/mc146818-time.h
@@ -86,43 +86,14 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime)
86 return retval; 86 return retval;
87} 87}
88 88
89/*
90 * Returns true if a clock update is in progress
91 */
92static inline unsigned char rtc_is_updating(void)
93{
94 unsigned char uip;
95 unsigned long flags;
96
97 spin_lock_irqsave(&rtc_lock, flags);
98 uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP);
99 spin_unlock_irqrestore(&rtc_lock, flags);
100 return uip;
101}
102
103static inline unsigned long mc146818_get_cmos_time(void) 89static inline unsigned long mc146818_get_cmos_time(void)
104{ 90{
105 unsigned int year, mon, day, hour, min, sec; 91 unsigned int year, mon, day, hour, min, sec;
106 int i;
107 unsigned long flags; 92 unsigned long flags;
108 93
109 /*
110 * The Linux interpretation of the CMOS clock register contents:
111 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
112 * RTC registers show the second which has precisely just started.
113 * Let's hope other operating systems interpret the RTC the same way.
114 */
115
116 /* read RTC exactly on falling edge of update flag */
117 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
118 if (rtc_is_updating())
119 break;
120 for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */
121 if (!rtc_is_updating())
122 break;
123
124 spin_lock_irqsave(&rtc_lock, flags); 94 spin_lock_irqsave(&rtc_lock, flags);
125 do { /* Isn't this overkill ? UIP above should guarantee consistency */ 95
96 do {
126 sec = CMOS_READ(RTC_SECONDS); 97 sec = CMOS_READ(RTC_SECONDS);
127 min = CMOS_READ(RTC_MINUTES); 98 min = CMOS_READ(RTC_MINUTES);
128 hour = CMOS_READ(RTC_HOURS); 99 hour = CMOS_READ(RTC_HOURS);
diff --git a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h
index 011caebac369..7bde4432092b 100644
--- a/include/asm-mips/mmzone.h
+++ b/include/asm-mips/mmzone.h
@@ -22,20 +22,6 @@
22 NODE_DATA(__n)->node_spanned_pages) : 0);\ 22 NODE_DATA(__n)->node_spanned_pages) : 0);\
23}) 23})
24 24
25#define pfn_to_page(pfn) \
26({ \
27 unsigned long __pfn = (pfn); \
28 pg_data_t *__pg = NODE_DATA(pfn_to_nid(__pfn)); \
29 __pg->node_mem_map + (__pfn - __pg->node_start_pfn); \
30})
31
32#define page_to_pfn(p) \
33({ \
34 struct page *__p = (p); \
35 struct zone *__z = page_zone(__p); \
36 ((__p - __z->zone_mem_map) + __z->zone_start_pfn); \
37})
38
39/* XXX: FIXME -- wli */ 25/* XXX: FIXME -- wli */
40#define kern_addr_valid(addr) (0) 26#define kern_addr_valid(addr) (0)
41 27
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index ee25a779bf49..a1eab136ff6c 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -140,8 +140,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
140#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 140#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
141 141
142#ifndef CONFIG_NEED_MULTIPLE_NODES 142#ifndef CONFIG_NEED_MULTIPLE_NODES
143#define pfn_to_page(pfn) (mem_map + (pfn))
144#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
145#define pfn_valid(pfn) ((pfn) < max_mapnr) 143#define pfn_valid(pfn) ((pfn) < max_mapnr)
146#endif 144#endif
147 145
@@ -160,6 +158,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
160#define WANT_PAGE_VIRTUAL 158#define WANT_PAGE_VIRTUAL
161#endif 159#endif
162 160
161#include <asm-generic/memory_model.h>
163#include <asm-generic/page.h> 162#include <asm-generic/page.h>
164 163
165#endif /* _ASM_PAGE_H */ 164#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mips/poll.h b/include/asm-mips/poll.h
index a000f1f789e3..70881f8c5c50 100644
--- a/include/asm-mips/poll.h
+++ b/include/asm-mips/poll.h
@@ -17,6 +17,7 @@
17/* These seem to be more or less nonstandard ... */ 17/* These seem to be more or less nonstandard ... */
18#define POLLMSG 0x0400 18#define POLLMSG 0x0400
19#define POLLREMOVE 0x1000 19#define POLLREMOVE 0x1000
20#define POLLRDHUP 0x2000
20 21
21struct pollfd { 22struct pollfd {
22 int fd; 23 int fd;
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index e796d75f027e..7b2366412203 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -103,88 +103,6 @@
103#define IVR_SERIAL_PORT_DEFNS 103#define IVR_SERIAL_PORT_DEFNS
104#endif 104#endif
105 105
106#ifdef CONFIG_SERIAL_AU1X00
107#include <asm/mach-au1x00/au1000.h>
108#ifdef CONFIG_SOC_AU1000
109#define AU1000_SERIAL_PORT_DEFNS \
110 { .baud_base = 0, .port = UART0_ADDR, \
111 .iomem_base = (unsigned char *)UART0_ADDR, \
112 .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \
113 .iomem_reg_shift = 2 }, \
114 { .baud_base = 0, .port = UART1_ADDR, \
115 .iomem_base = (unsigned char *)UART1_ADDR, \
116 .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \
117 .iomem_reg_shift = 2 }, \
118 { .baud_base = 0, .port = UART2_ADDR, \
119 .iomem_base = (unsigned char *)UART2_ADDR, \
120 .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \
121 .iomem_reg_shift = 2 }, \
122 { .baud_base = 0, .port = UART3_ADDR, \
123 .iomem_base = (unsigned char *)UART3_ADDR, \
124 .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \
125 .iomem_reg_shift = 2 },
126#endif
127
128#ifdef CONFIG_SOC_AU1500
129#define AU1000_SERIAL_PORT_DEFNS \
130 { .baud_base = 0, .port = UART0_ADDR, \
131 .iomem_base = (unsigned char *)UART0_ADDR, \
132 .irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \
133 .iomem_reg_shift = 2 }, \
134 { .baud_base = 0, .port = UART3_ADDR, \
135 .iomem_base = (unsigned char *)UART3_ADDR, \
136 .irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \
137 .iomem_reg_shift = 2 },
138#endif
139
140#ifdef CONFIG_SOC_AU1100
141#define AU1000_SERIAL_PORT_DEFNS \
142 { .baud_base = 0, .port = UART0_ADDR, \
143 .iomem_base = (unsigned char *)UART0_ADDR, \
144 .irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \
145 .iomem_reg_shift = 2 }, \
146 { .baud_base = 0, .port = UART1_ADDR, \
147 .iomem_base = (unsigned char *)UART1_ADDR, \
148 .irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \
149 .iomem_reg_shift = 2 }, \
150 { .baud_base = 0, .port = UART3_ADDR, \
151 .iomem_base = (unsigned char *)UART3_ADDR, \
152 .irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \
153 .iomem_reg_shift = 2 },
154#endif
155
156#ifdef CONFIG_SOC_AU1550
157#define AU1000_SERIAL_PORT_DEFNS \
158 { .baud_base = 0, .port = UART0_ADDR, \
159 .iomem_base = (unsigned char *)UART0_ADDR, \
160 .irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \
161 .iomem_reg_shift = 2 }, \
162 { .baud_base = 0, .port = UART1_ADDR, \
163 .iomem_base = (unsigned char *)UART1_ADDR, \
164 .irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \
165 .iomem_reg_shift = 2 }, \
166 { .baud_base = 0, .port = UART3_ADDR, \
167 .iomem_base = (unsigned char *)UART3_ADDR, \
168 .irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\
169 .iomem_reg_shift = 2 },
170#endif
171
172#ifdef CONFIG_SOC_AU1200
173#define AU1000_SERIAL_PORT_DEFNS \
174 { .baud_base = 0, .port = UART0_ADDR, \
175 .iomem_base = (unsigned char *)UART0_ADDR, \
176 .irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \
177 .iomem_reg_shift = 2 }, \
178 { .baud_base = 0, .port = UART1_ADDR, \
179 .iomem_base = (unsigned char *)UART1_ADDR, \
180 .irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \
181 .iomem_reg_shift = 2 },
182#endif
183
184#else
185#define AU1000_SERIAL_PORT_DEFNS
186#endif
187
188#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT 106#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
189#define STD_SERIAL_PORT_DEFNS \ 107#define STD_SERIAL_PORT_DEFNS \
190 /* UART CLK PORT IRQ FLAGS */ \ 108 /* UART CLK PORT IRQ FLAGS */ \
@@ -331,7 +249,6 @@
331 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ 249 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
332 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 250 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
333 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 251 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
334 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 252 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
335 AU1000_SERIAL_PORT_DEFNS
336 253
337#endif /* _ASM_SERIAL_H */ 254#endif /* _ASM_SERIAL_H */
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index c29c65b7818e..fa6d04dac56b 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -77,7 +77,7 @@ struct termios {
77#define IXANY 0004000 /* Any character will restart after stop. */ 77#define IXANY 0004000 /* Any character will restart after stop. */
78#define IXOFF 0010000 /* Enable start/stop input control. */ 78#define IXOFF 0010000 /* Enable start/stop input control. */
79#define IMAXBEL 0020000 /* Ring bell when input queue is full. */ 79#define IMAXBEL 0020000 /* Ring bell when input queue is full. */
80#define IUTF8 0040000 /* Input is UTF8 */ 80#define IUTF8 0040000 /* Input is UTF-8 */
81 81
82/* c_oflag bits */ 82/* c_oflag bits */
83#define OPOST 0000001 /* Perform output processing. */ 83#define OPOST 0000001 /* Perform output processing. */
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 9cc3564cc2c9..d897c8bb554d 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -26,14 +26,14 @@ extern spinlock_t rtc_lock;
26 26
27/* 27/*
28 * RTC ops. By default, they point to no-RTC functions. 28 * RTC ops. By default, they point to no-RTC functions.
29 * rtc_get_time - mktime(year, mon, day, hour, min, sec) in seconds. 29 * rtc_mips_get_time - mktime(year, mon, day, hour, min, sec) in seconds.
30 * rtc_set_time - reverse the above translation and set time to RTC. 30 * rtc_mips_set_time - reverse the above translation and set time to RTC.
31 * rtc_set_mmss - similar to rtc_set_time, but only min and sec need 31 * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
32 * to be set. Used by RTC sync-up. 32 * to be set. Used by RTC sync-up.
33 */ 33 */
34extern unsigned long (*rtc_get_time)(void); 34extern unsigned long (*rtc_mips_get_time)(void);
35extern int (*rtc_set_time)(unsigned long); 35extern int (*rtc_mips_set_time)(unsigned long);
36extern int (*rtc_set_mmss)(unsigned long); 36extern int (*rtc_mips_set_mmss)(unsigned long);
37 37
38/* 38/*
39 * Timer interrupt functions. 39 * Timer interrupt functions.
diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h
index 421b3aea14cc..cd2813d8e136 100644
--- a/include/asm-mips/types.h
+++ b/include/asm-mips/types.h
@@ -99,6 +99,11 @@ typedef u64 sector_t;
99#define HAVE_SECTOR_T 99#define HAVE_SECTOR_T
100#endif 100#endif
101 101
102#ifdef CONFIG_LSF
103typedef u64 blkcnt_t;
104#define HAVE_BLKCNT_T
105#endif
106
102#endif /* __ASSEMBLY__ */ 107#endif /* __ASSEMBLY__ */
103 108
104#endif /* __KERNEL__ */ 109#endif /* __KERNEL__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-27 11:27:11 -0400