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-rw-r--r--include/asm-mips/vr41xx/capcella.h43
-rw-r--r--include/asm-mips/vr41xx/giu.h78
-rw-r--r--include/asm-mips/vr41xx/irq.h101
-rw-r--r--include/asm-mips/vr41xx/mpc30x.h37
-rw-r--r--include/asm-mips/vr41xx/pci.h90
-rw-r--r--include/asm-mips/vr41xx/siu.h58
-rw-r--r--include/asm-mips/vr41xx/tb0219.h42
-rw-r--r--include/asm-mips/vr41xx/tb0226.h43
-rw-r--r--include/asm-mips/vr41xx/tb0287.h43
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h152
10 files changed, 0 insertions, 687 deletions
diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h
deleted file mode 100644
index e0ee05a3dfcc..000000000000
--- a/include/asm-mips/vr41xx/capcella.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * capcella.h, Include file for ZAO Networks Capcella.
3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ZAO_CAPCELLA_H
21#define __ZAO_CAPCELLA_H
22
23#include <asm/vr41xx/irq.h>
24
25/*
26 * General-Purpose I/O Pin Number
27 */
28#define PC104PLUS_INTA_PIN 2
29#define PC104PLUS_INTB_PIN 3
30#define PC104PLUS_INTC_PIN 4
31#define PC104PLUS_INTD_PIN 5
32
33/*
34 * Interrupt Number
35 */
36#define RTL8139_1_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
37#define RTL8139_2_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
38#define PC104PLUS_INTA_IRQ GIU_IRQ(PC104PLUS_INTA_PIN)
39#define PC104PLUS_INTB_IRQ GIU_IRQ(PC104PLUS_INTB_PIN)
40#define PC104PLUS_INTC_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
41#define PC104PLUS_INTD_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
42
43#endif /* __ZAO_CAPCELLA_H */
diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h
deleted file mode 100644
index 0bcdd3a5c256..000000000000
--- a/include/asm-mips/vr41xx/giu.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Include file for NEC VR4100 series General-purpose I/O Unit.
3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_GIU_H
21#define __NEC_VR41XX_GIU_H
22
23/*
24 * NEC VR4100 series GIU platform device IDs.
25 */
26enum {
27 GPIO_50PINS_PULLUPDOWN,
28 GPIO_36PINS,
29 GPIO_48PINS_EDGE_SELECT,
30};
31
32typedef enum {
33 IRQ_TRIGGER_LEVEL,
34 IRQ_TRIGGER_EDGE,
35 IRQ_TRIGGER_EDGE_FALLING,
36 IRQ_TRIGGER_EDGE_RISING,
37} irq_trigger_t;
38
39typedef enum {
40 IRQ_SIGNAL_THROUGH,
41 IRQ_SIGNAL_HOLD,
42} irq_signal_t;
43
44extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
45
46typedef enum {
47 IRQ_LEVEL_LOW,
48 IRQ_LEVEL_HIGH,
49} irq_level_t;
50
51extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
52
53typedef enum {
54 GPIO_DATA_LOW,
55 GPIO_DATA_HIGH,
56 GPIO_DATA_INVAL,
57} gpio_data_t;
58
59extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
60extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
61
62typedef enum {
63 GPIO_INPUT,
64 GPIO_OUTPUT,
65 GPIO_OUTPUT_DISABLE,
66} gpio_direction_t;
67
68extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
69
70typedef enum {
71 GPIO_PULL_DOWN,
72 GPIO_PULL_UP,
73 GPIO_PULL_DISABLE,
74} gpio_pull_t;
75
76extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
77
78#endif /* __NEC_VR41XX_GIU_H */
diff --git a/include/asm-mips/vr41xx/irq.h b/include/asm-mips/vr41xx/irq.h
deleted file mode 100644
index d315dfbc08f2..000000000000
--- a/include/asm-mips/vr41xx/irq.h
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * include/asm-mips/vr41xx/irq.h
3 *
4 * Interrupt numbers for NEC VR4100 series.
5 *
6 * Copyright (C) 1999 Michael Klar
7 * Copyright (C) 2001, 2002 Paul Mundt
8 * Copyright (C) 2002 MontaVista Software, Inc.
9 * Copyright (C) 2002 TimeSys Corp.
10 * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#ifndef __NEC_VR41XX_IRQ_H
18#define __NEC_VR41XX_IRQ_H
19
20/*
21 * CPU core Interrupt Numbers
22 */
23#define MIPS_CPU_IRQ_BASE 0
24#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
25#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
26#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
27#define INT0_IRQ MIPS_CPU_IRQ(2)
28#define INT1_IRQ MIPS_CPU_IRQ(3)
29#define INT2_IRQ MIPS_CPU_IRQ(4)
30#define INT3_IRQ MIPS_CPU_IRQ(5)
31#define INT4_IRQ MIPS_CPU_IRQ(6)
32#define TIMER_IRQ MIPS_CPU_IRQ(7)
33
34/*
35 * SYINT1 Interrupt Numbers
36 */
37#define SYSINT1_IRQ_BASE 8
38#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
39#define BATTRY_IRQ SYSINT1_IRQ(0)
40#define POWER_IRQ SYSINT1_IRQ(1)
41#define RTCLONG1_IRQ SYSINT1_IRQ(2)
42#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
43/* RFU */
44#define PIU_IRQ SYSINT1_IRQ(5)
45#define AIU_IRQ SYSINT1_IRQ(6)
46#define KIU_IRQ SYSINT1_IRQ(7)
47#define GIUINT_IRQ SYSINT1_IRQ(8)
48#define SIU_IRQ SYSINT1_IRQ(9)
49#define BUSERR_IRQ SYSINT1_IRQ(10)
50#define SOFTINT_IRQ SYSINT1_IRQ(11)
51#define CLKRUN_IRQ SYSINT1_IRQ(12)
52#define DOZEPIU_IRQ SYSINT1_IRQ(13)
53#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
54
55/*
56 * SYSINT2 Interrupt Numbers
57 */
58#define SYSINT2_IRQ_BASE 24
59#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
60#define RTCLONG2_IRQ SYSINT2_IRQ(0)
61#define LED_IRQ SYSINT2_IRQ(1)
62#define HSP_IRQ SYSINT2_IRQ(2)
63#define TCLOCK_IRQ SYSINT2_IRQ(3)
64#define FIR_IRQ SYSINT2_IRQ(4)
65#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
66#define DSIU_IRQ SYSINT2_IRQ(5)
67#define PCI_IRQ SYSINT2_IRQ(6)
68#define SCU_IRQ SYSINT2_IRQ(7)
69#define CSI_IRQ SYSINT2_IRQ(8)
70#define BCU_IRQ SYSINT2_IRQ(9)
71#define ETHERNET_IRQ SYSINT2_IRQ(10)
72#define SYSINT2_IRQ_LAST ETHERNET_IRQ
73
74/*
75 * GIU Interrupt Numbers
76 */
77#define GIU_IRQ_BASE 40
78#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
79#define GIU_IRQ_LAST GIU_IRQ(31)
80
81/*
82 * VRC4173 Interrupt Numbers
83 */
84#define VRC4173_IRQ_BASE 72
85#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
86#define VRC4173_USB_IRQ VRC4173_IRQ(0)
87#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
88#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
89#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
90#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
91#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
92#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
93#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
94#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
95#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
96#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
97/* RFU */
98#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
99#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
100
101#endif /* __NEC_VR41XX_IRQ_H */
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h
deleted file mode 100644
index 1d67df843dc3..000000000000
--- a/include/asm-mips/vr41xx/mpc30x.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * mpc30x.h, Include file for Victor MP-C303/304.
3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __VICTOR_MPC30X_H
21#define __VICTOR_MPC30X_H
22
23#include <asm/vr41xx/irq.h>
24
25/*
26 * General-Purpose I/O Pin Number
27 */
28#define VRC4173_PIN 1
29#define MQ200_PIN 4
30
31/*
32 * Interrupt Number
33 */
34#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
35#define MQ200_IRQ GIU_IRQ(MQ200_PIN)
36
37#endif /* __VICTOR_MPC30X_H */
diff --git a/include/asm-mips/vr41xx/pci.h b/include/asm-mips/vr41xx/pci.h
deleted file mode 100644
index 6fc01ce19777..000000000000
--- a/include/asm-mips/vr41xx/pci.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * Include file for NEC VR4100 series PCI Control Unit.
3 *
4 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_PCI_H
21#define __NEC_VR41XX_PCI_H
22
23#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
24
25struct pci_master_address_conversion {
26 uint32_t bus_base_address;
27 uint32_t address_mask;
28 uint32_t pci_base_address;
29};
30
31struct pci_target_address_conversion {
32 uint32_t address_mask;
33 uint32_t bus_base_address;
34};
35
36typedef enum {
37 CANNOT_LOCK_FROM_DEVICE,
38 CAN_LOCK_FROM_DEVICE,
39} pci_exclusive_access_t;
40
41struct pci_mailbox_address {
42 uint32_t base_address;
43};
44
45struct pci_target_address_window {
46 uint32_t base_address;
47};
48
49typedef enum {
50 PCI_ARBITRATION_MODE_FAIR,
51 PCI_ARBITRATION_MODE_ALTERNATE_0,
52 PCI_ARBITRATION_MODE_ALTERNATE_B,
53} pci_arbiter_priority_control_t;
54
55typedef enum {
56 PCI_TAKE_AWAY_GNT_DISABLE,
57 PCI_TAKE_AWAY_GNT_ENABLE,
58} pci_take_away_gnt_mode_t;
59
60struct pci_controller_unit_setup {
61 struct pci_master_address_conversion *master_memory1;
62 struct pci_master_address_conversion *master_memory2;
63
64 struct pci_target_address_conversion *target_memory1;
65 struct pci_target_address_conversion *target_memory2;
66
67 struct pci_master_address_conversion *master_io;
68
69 pci_exclusive_access_t exclusive_access;
70
71 uint32_t pci_clock_max;
72 uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
73
74 struct pci_mailbox_address *mailbox;
75 struct pci_target_address_window *target_window1;
76 struct pci_target_address_window *target_window2;
77
78 uint8_t master_latency_timer;
79 uint8_t retry_limit;
80
81 pci_arbiter_priority_control_t arbiter_priority_control;
82 pci_take_away_gnt_mode_t take_away_gnt_mode;
83
84 struct resource *mem_resource;
85 struct resource *io_resource;
86};
87
88extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
89
90#endif /* __NEC_VR41XX_PCI_H */
diff --git a/include/asm-mips/vr41xx/siu.h b/include/asm-mips/vr41xx/siu.h
deleted file mode 100644
index da9f6e373409..000000000000
--- a/include/asm-mips/vr41xx/siu.h
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * Include file for NEC VR4100 series Serial Interface Unit.
3 *
4 * Copyright (C) 2005-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_SIU_H
21#define __NEC_VR41XX_SIU_H
22
23#define SIU_PORTS_MAX 2
24
25typedef enum {
26 SIU_INTERFACE_RS232C,
27 SIU_INTERFACE_IRDA,
28} siu_interface_t;
29
30extern void vr41xx_select_siu_interface(siu_interface_t interface);
31
32typedef enum {
33 SIU_USE_IRDA,
34 FIR_USE_IRDA,
35} irda_use_t;
36
37extern void vr41xx_use_irda(irda_use_t use);
38
39typedef enum {
40 SHARP_IRDA,
41 TEMIC_IRDA,
42 HP_IRDA,
43} irda_module_t;
44
45typedef enum {
46 IRDA_TX_1_5MBPS,
47 IRDA_TX_4MBPS,
48} irda_speed_t;
49
50extern void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed);
51
52#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
53extern void vr41xx_siu_early_setup(struct uart_port *port);
54#else
55static inline void vr41xx_siu_early_setup(struct uart_port *port) {}
56#endif
57
58#endif /* __NEC_VR41XX_SIU_H */
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h
deleted file mode 100644
index dc981b4be0a4..000000000000
--- a/include/asm-mips/vr41xx/tb0219.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * tb0219.h, Include file for TANBAC TB0219.
3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * Modified for TANBAC TB0219:
7 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __TANBAC_TB0219_H
24#define __TANBAC_TB0219_H
25
26#include <asm/vr41xx/irq.h>
27
28/*
29 * General-Purpose I/O Pin Number
30 */
31#define TB0219_PCI_SLOT1_PIN 2
32#define TB0219_PCI_SLOT2_PIN 3
33#define TB0219_PCI_SLOT3_PIN 4
34
35/*
36 * Interrupt Number
37 */
38#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN)
39#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN)
40#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN)
41
42#endif /* __TANBAC_TB0219_H */
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h
deleted file mode 100644
index de527dcfa5f3..000000000000
--- a/include/asm-mips/vr41xx/tb0226.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * tb0226.h, Include file for TANBAC TB0226.
3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __TANBAC_TB0226_H
21#define __TANBAC_TB0226_H
22
23#include <asm/vr41xx/irq.h>
24
25/*
26 * General-Purpose I/O Pin Number
27 */
28#define GD82559_1_PIN 2
29#define GD82559_2_PIN 3
30#define UPD720100_INTA_PIN 4
31#define UPD720100_INTB_PIN 8
32#define UPD720100_INTC_PIN 13
33
34/*
35 * Interrupt Number
36 */
37#define GD82559_1_IRQ GIU_IRQ(GD82559_1_PIN)
38#define GD82559_2_IRQ GIU_IRQ(GD82559_2_PIN)
39#define UPD720100_INTA_IRQ GIU_IRQ(UPD720100_INTA_PIN)
40#define UPD720100_INTB_IRQ GIU_IRQ(UPD720100_INTB_PIN)
41#define UPD720100_INTC_IRQ GIU_IRQ(UPD720100_INTC_PIN)
42
43#endif /* __TANBAC_TB0226_H */
diff --git a/include/asm-mips/vr41xx/tb0287.h b/include/asm-mips/vr41xx/tb0287.h
deleted file mode 100644
index 61bead68abf0..000000000000
--- a/include/asm-mips/vr41xx/tb0287.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * tb0287.h, Include file for TANBAC TB0287 mini-ITX board.
3 *
4 * Copyright (C) 2005 Media Lab Inc. <ito@mlb.co.jp>
5 *
6 * This code is largely based on tb0219.h.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __TANBAC_TB0287_H
23#define __TANBAC_TB0287_H
24
25#include <asm/vr41xx/irq.h>
26
27/*
28 * General-Purpose I/O Pin Number
29 */
30#define TB0287_PCI_SLOT_PIN 2
31#define TB0287_SM501_PIN 3
32#define TB0287_SIL680A_PIN 8
33#define TB0287_RTL8110_PIN 13
34
35/*
36 * Interrupt Number
37 */
38#define TB0287_PCI_SLOT_IRQ GIU_IRQ(TB0287_PCI_SLOT_PIN)
39#define TB0287_SM501_IRQ GIU_IRQ(TB0287_SM501_PIN)
40#define TB0287_SIL680A_IRQ GIU_IRQ(TB0287_SIL680A_PIN)
41#define TB0287_RTL8110_IRQ GIU_IRQ(TB0287_RTL8110_PIN)
42
43#endif /* __TANBAC_TB0287_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
deleted file mode 100644
index 22be64971cc6..000000000000
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ /dev/null
@@ -1,152 +0,0 @@
1/*
2 * include/asm-mips/vr41xx/vr41xx.h
3 *
4 * Include file for NEC VR4100 series.
5 *
6 * Copyright (C) 1999 Michael Klar
7 * Copyright (C) 2001, 2002 Paul Mundt
8 * Copyright (C) 2002 MontaVista Software, Inc.
9 * Copyright (C) 2002 TimeSys Corp.
10 * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#ifndef __NEC_VR41XX_H
18#define __NEC_VR41XX_H
19
20#include <linux/interrupt.h>
21
22/*
23 * CPU Revision
24 */
25/* VR4122 0x00000c70-0x00000c72 */
26#define PRID_VR4122_REV1_0 0x00000c70
27#define PRID_VR4122_REV2_0 0x00000c70
28#define PRID_VR4122_REV2_1 0x00000c70
29#define PRID_VR4122_REV3_0 0x00000c71
30#define PRID_VR4122_REV3_1 0x00000c72
31
32/* VR4181A 0x00000c73-0x00000c7f */
33#define PRID_VR4181A_REV1_0 0x00000c73
34#define PRID_VR4181A_REV1_1 0x00000c74
35
36/* VR4131 0x00000c80-0x00000c83 */
37#define PRID_VR4131_REV1_2 0x00000c80
38#define PRID_VR4131_REV2_0 0x00000c81
39#define PRID_VR4131_REV2_1 0x00000c82
40#define PRID_VR4131_REV2_2 0x00000c83
41
42/* VR4133 0x00000c84- */
43#define PRID_VR4133 0x00000c84
44
45/*
46 * Bus Control Uint
47 */
48extern unsigned long vr41xx_calculate_clock_frequency(void);
49extern unsigned long vr41xx_get_vtclock_frequency(void);
50extern unsigned long vr41xx_get_tclock_frequency(void);
51
52/*
53 * Clock Mask Unit
54 */
55typedef enum {
56 PIU_CLOCK,
57 SIU_CLOCK,
58 AIU_CLOCK,
59 KIU_CLOCK,
60 FIR_CLOCK,
61 DSIU_CLOCK,
62 CSI_CLOCK,
63 PCIU_CLOCK,
64 HSP_CLOCK,
65 PCI_CLOCK,
66 CEU_CLOCK,
67 ETHER0_CLOCK,
68 ETHER1_CLOCK
69} vr41xx_clock_t;
70
71extern void vr41xx_supply_clock(vr41xx_clock_t clock);
72extern void vr41xx_mask_clock(vr41xx_clock_t clock);
73
74/*
75 * Interrupt Control Unit
76 */
77extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
78extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int));
79
80#define PIUINT_COMMAND 0x0040
81#define PIUINT_DATA 0x0020
82#define PIUINT_PAGE1 0x0010
83#define PIUINT_PAGE0 0x0008
84#define PIUINT_DATALOST 0x0004
85#define PIUINT_STATUSCHANGE 0x0001
86
87extern void vr41xx_enable_piuint(uint16_t mask);
88extern void vr41xx_disable_piuint(uint16_t mask);
89
90#define AIUINT_INPUT_DMAEND 0x0800
91#define AIUINT_INPUT_DMAHALT 0x0400
92#define AIUINT_INPUT_DATALOST 0x0200
93#define AIUINT_INPUT_DATA 0x0100
94#define AIUINT_OUTPUT_DMAEND 0x0008
95#define AIUINT_OUTPUT_DMAHALT 0x0004
96#define AIUINT_OUTPUT_NODATA 0x0002
97
98extern void vr41xx_enable_aiuint(uint16_t mask);
99extern void vr41xx_disable_aiuint(uint16_t mask);
100
101#define KIUINT_DATALOST 0x0004
102#define KIUINT_DATAREADY 0x0002
103#define KIUINT_SCAN 0x0001
104
105extern void vr41xx_enable_kiuint(uint16_t mask);
106extern void vr41xx_disable_kiuint(uint16_t mask);
107
108#define DSIUINT_CTS 0x0800
109#define DSIUINT_RXERR 0x0400
110#define DSIUINT_RX 0x0200
111#define DSIUINT_TX 0x0100
112#define DSIUINT_ALL 0x0f00
113
114extern void vr41xx_enable_dsiuint(uint16_t mask);
115extern void vr41xx_disable_dsiuint(uint16_t mask);
116
117#define FIRINT_UNIT 0x0010
118#define FIRINT_RX_DMAEND 0x0008
119#define FIRINT_RX_DMAHALT 0x0004
120#define FIRINT_TX_DMAEND 0x0002
121#define FIRINT_TX_DMAHALT 0x0001
122
123extern void vr41xx_enable_firint(uint16_t mask);
124extern void vr41xx_disable_firint(uint16_t mask);
125
126extern void vr41xx_enable_pciint(void);
127extern void vr41xx_disable_pciint(void);
128
129extern void vr41xx_enable_scuint(void);
130extern void vr41xx_disable_scuint(void);
131
132#define CSIINT_TX_DMAEND 0x0040
133#define CSIINT_TX_DMAHALT 0x0020
134#define CSIINT_TX_DATA 0x0010
135#define CSIINT_TX_FIFOEMPTY 0x0008
136#define CSIINT_RX_DMAEND 0x0004
137#define CSIINT_RX_DMAHALT 0x0002
138#define CSIINT_RX_FIFOEMPTY 0x0001
139
140extern void vr41xx_enable_csiint(uint16_t mask);
141extern void vr41xx_disable_csiint(uint16_t mask);
142
143extern void vr41xx_enable_bcuint(void);
144extern void vr41xx_disable_bcuint(void);
145
146#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
147extern void vr41xx_siu_setup(void);
148#else
149static inline void vr41xx_siu_setup(void) {}
150#endif
151
152#endif /* __NEC_VR41XX_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 19:29:31 -0500