diff options
Diffstat (limited to 'include/asm-mips/txx9/rbtx4938.h')
-rw-r--r-- | include/asm-mips/txx9/rbtx4938.h | 52 |
1 files changed, 24 insertions, 28 deletions
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h index 2f5d5e705a41..9f0441a28126 100644 --- a/include/asm-mips/txx9/rbtx4938.h +++ b/include/asm-mips/txx9/rbtx4938.h | |||
@@ -15,35 +15,31 @@ | |||
15 | #include <asm/txx9irq.h> | 15 | #include <asm/txx9irq.h> |
16 | #include <asm/txx9/tx4938.h> | 16 | #include <asm/txx9/tx4938.h> |
17 | 17 | ||
18 | /* CS */ | ||
19 | #define RBTX4938_CE0 0x1c000000 /* 64M */ | ||
20 | #define RBTX4938_CE2 0x17f00000 /* 1M */ | ||
21 | |||
22 | /* Address map */ | 18 | /* Address map */ |
23 | #define RBTX4938_FPGA_REG_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000000) | 19 | #define RBTX4938_FPGA_REG_ADDR (IO_BASE + TXX9_CE(2) + 0x00000000) |
24 | #define RBTX4938_FPGA_REV_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000002) | 20 | #define RBTX4938_FPGA_REV_ADDR (IO_BASE + TXX9_CE(2) + 0x00000002) |
25 | #define RBTX4938_CONFIG1_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000004) | 21 | #define RBTX4938_CONFIG1_ADDR (IO_BASE + TXX9_CE(2) + 0x00000004) |
26 | #define RBTX4938_CONFIG2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000006) | 22 | #define RBTX4938_CONFIG2_ADDR (IO_BASE + TXX9_CE(2) + 0x00000006) |
27 | #define RBTX4938_CONFIG3_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000008) | 23 | #define RBTX4938_CONFIG3_ADDR (IO_BASE + TXX9_CE(2) + 0x00000008) |
28 | #define RBTX4938_LED_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001000) | 24 | #define RBTX4938_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000) |
29 | #define RBTX4938_DIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001002) | 25 | #define RBTX4938_DIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001002) |
30 | #define RBTX4938_BDIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001004) | 26 | #define RBTX4938_BDIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001004) |
31 | #define RBTX4938_IMASK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002000) | 27 | #define RBTX4938_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) |
32 | #define RBTX4938_IMASK2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002002) | 28 | #define RBTX4938_IMASK2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002002) |
33 | #define RBTX4938_INTPOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002004) | 29 | #define RBTX4938_INTPOL_ADDR (IO_BASE + TXX9_CE(2) + 0x00002004) |
34 | #define RBTX4938_ISTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002006) | 30 | #define RBTX4938_ISTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) |
35 | #define RBTX4938_ISTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002008) | 31 | #define RBTX4938_ISTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002008) |
36 | #define RBTX4938_IMSTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200a) | 32 | #define RBTX4938_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200a) |
37 | #define RBTX4938_IMSTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200c) | 33 | #define RBTX4938_IMSTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200c) |
38 | #define RBTX4938_SOFTINT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00003000) | 34 | #define RBTX4938_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) |
39 | #define RBTX4938_PIOSEL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005000) | 35 | #define RBTX4938_PIOSEL_ADDR (IO_BASE + TXX9_CE(2) + 0x00005000) |
40 | #define RBTX4938_SPICS_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005002) | 36 | #define RBTX4938_SPICS_ADDR (IO_BASE + TXX9_CE(2) + 0x00005002) |
41 | #define RBTX4938_SFPWR_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005008) | 37 | #define RBTX4938_SFPWR_ADDR (IO_BASE + TXX9_CE(2) + 0x00005008) |
42 | #define RBTX4938_SFVOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000500a) | 38 | #define RBTX4938_SFVOL_ADDR (IO_BASE + TXX9_CE(2) + 0x0000500a) |
43 | #define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000) | 39 | #define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000) |
44 | #define RBTX4938_SOFTRESETLOCK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007002) | 40 | #define RBTX4938_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x00007002) |
45 | #define RBTX4938_PCIRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007004) | 41 | #define RBTX4938_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007004) |
46 | #define RBTX4938_ETHER_BASE (KSEG1 + RBTX4938_CE2 + 0x00020000) | 42 | #define RBTX4938_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000) |
47 | 43 | ||
48 | /* Ethernet port address (Jumperless Mode (W12:Open)) */ | 44 | /* Ethernet port address (Jumperless Mode (W12:Open)) */ |
49 | #define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280) | 45 | #define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280) |