diff options
Diffstat (limited to 'include/asm-mips/string.h')
-rw-r--r-- | include/asm-mips/string.h | 166 |
1 files changed, 166 insertions, 0 deletions
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h new file mode 100644 index 000000000000..b18345504f8a --- /dev/null +++ b/include/asm-mips/string.h | |||
@@ -0,0 +1,166 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle | ||
7 | * Copyright (c) 2000 by Silicon Graphics, Inc. | ||
8 | * Copyright (c) 2001 MIPS Technologies, Inc. | ||
9 | */ | ||
10 | #ifndef _ASM_STRING_H | ||
11 | #define _ASM_STRING_H | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | |||
15 | /* | ||
16 | * Most of the inline functions are rather naive implementations so I just | ||
17 | * didn't bother updating them for 64-bit ... | ||
18 | */ | ||
19 | #ifdef CONFIG_MIPS32 | ||
20 | |||
21 | #ifndef IN_STRING_C | ||
22 | |||
23 | #define __HAVE_ARCH_STRCPY | ||
24 | static __inline__ char *strcpy(char *__dest, __const__ char *__src) | ||
25 | { | ||
26 | char *__xdest = __dest; | ||
27 | |||
28 | __asm__ __volatile__( | ||
29 | ".set\tnoreorder\n\t" | ||
30 | ".set\tnoat\n" | ||
31 | "1:\tlbu\t$1,(%1)\n\t" | ||
32 | "addiu\t%1,1\n\t" | ||
33 | "sb\t$1,(%0)\n\t" | ||
34 | "bnez\t$1,1b\n\t" | ||
35 | "addiu\t%0,1\n\t" | ||
36 | ".set\tat\n\t" | ||
37 | ".set\treorder" | ||
38 | : "=r" (__dest), "=r" (__src) | ||
39 | : "0" (__dest), "1" (__src) | ||
40 | : "memory"); | ||
41 | |||
42 | return __xdest; | ||
43 | } | ||
44 | |||
45 | #define __HAVE_ARCH_STRNCPY | ||
46 | static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) | ||
47 | { | ||
48 | char *__xdest = __dest; | ||
49 | |||
50 | if (__n == 0) | ||
51 | return __xdest; | ||
52 | |||
53 | __asm__ __volatile__( | ||
54 | ".set\tnoreorder\n\t" | ||
55 | ".set\tnoat\n" | ||
56 | "1:\tlbu\t$1,(%1)\n\t" | ||
57 | "subu\t%2,1\n\t" | ||
58 | "sb\t$1,(%0)\n\t" | ||
59 | "beqz\t$1,2f\n\t" | ||
60 | "addiu\t%0,1\n\t" | ||
61 | "bnez\t%2,1b\n\t" | ||
62 | "addiu\t%1,1\n" | ||
63 | "2:\n\t" | ||
64 | ".set\tat\n\t" | ||
65 | ".set\treorder" | ||
66 | : "=r" (__dest), "=r" (__src), "=r" (__n) | ||
67 | : "0" (__dest), "1" (__src), "2" (__n) | ||
68 | : "memory"); | ||
69 | |||
70 | return __xdest; | ||
71 | } | ||
72 | |||
73 | #define __HAVE_ARCH_STRCMP | ||
74 | static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) | ||
75 | { | ||
76 | int __res; | ||
77 | |||
78 | __asm__ __volatile__( | ||
79 | ".set\tnoreorder\n\t" | ||
80 | ".set\tnoat\n\t" | ||
81 | "lbu\t%2,(%0)\n" | ||
82 | "1:\tlbu\t$1,(%1)\n\t" | ||
83 | "addiu\t%0,1\n\t" | ||
84 | "bne\t$1,%2,2f\n\t" | ||
85 | "addiu\t%1,1\n\t" | ||
86 | "bnez\t%2,1b\n\t" | ||
87 | "lbu\t%2,(%0)\n\t" | ||
88 | #if defined(CONFIG_CPU_R3000) | ||
89 | "nop\n\t" | ||
90 | #endif | ||
91 | "move\t%2,$1\n" | ||
92 | "2:\tsubu\t%2,$1\n" | ||
93 | "3:\t.set\tat\n\t" | ||
94 | ".set\treorder" | ||
95 | : "=r" (__cs), "=r" (__ct), "=r" (__res) | ||
96 | : "0" (__cs), "1" (__ct)); | ||
97 | |||
98 | return __res; | ||
99 | } | ||
100 | |||
101 | #endif /* !defined(IN_STRING_C) */ | ||
102 | |||
103 | #define __HAVE_ARCH_STRNCMP | ||
104 | static __inline__ int | ||
105 | strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) | ||
106 | { | ||
107 | int __res; | ||
108 | |||
109 | __asm__ __volatile__( | ||
110 | ".set\tnoreorder\n\t" | ||
111 | ".set\tnoat\n" | ||
112 | "1:\tlbu\t%3,(%0)\n\t" | ||
113 | "beqz\t%2,2f\n\t" | ||
114 | "lbu\t$1,(%1)\n\t" | ||
115 | "subu\t%2,1\n\t" | ||
116 | "bne\t$1,%3,3f\n\t" | ||
117 | "addiu\t%0,1\n\t" | ||
118 | "bnez\t%3,1b\n\t" | ||
119 | "addiu\t%1,1\n" | ||
120 | "2:\n\t" | ||
121 | #if defined(CONFIG_CPU_R3000) | ||
122 | "nop\n\t" | ||
123 | #endif | ||
124 | "move\t%3,$1\n" | ||
125 | "3:\tsubu\t%3,$1\n\t" | ||
126 | ".set\tat\n\t" | ||
127 | ".set\treorder" | ||
128 | : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) | ||
129 | : "0" (__cs), "1" (__ct), "2" (__count)); | ||
130 | |||
131 | return __res; | ||
132 | } | ||
133 | #endif /* CONFIG_MIPS32 */ | ||
134 | |||
135 | #define __HAVE_ARCH_MEMSET | ||
136 | extern void *memset(void *__s, int __c, size_t __count); | ||
137 | |||
138 | #define __HAVE_ARCH_MEMCPY | ||
139 | extern void *memcpy(void *__to, __const__ void *__from, size_t __n); | ||
140 | |||
141 | #define __HAVE_ARCH_MEMMOVE | ||
142 | extern void *memmove(void *__dest, __const__ void *__src, size_t __n); | ||
143 | |||
144 | #ifdef CONFIG_MIPS32 | ||
145 | #define __HAVE_ARCH_MEMSCAN | ||
146 | static __inline__ void *memscan(void *__addr, int __c, size_t __size) | ||
147 | { | ||
148 | char *__end = (char *)__addr + __size; | ||
149 | unsigned char __uc = (unsigned char) __c; | ||
150 | |||
151 | __asm__(".set\tpush\n\t" | ||
152 | ".set\tnoat\n\t" | ||
153 | ".set\treorder\n\t" | ||
154 | "1:\tbeq\t%0,%1,2f\n\t" | ||
155 | "addiu\t%0,1\n\t" | ||
156 | "lbu\t$1,-1(%0)\n\t" | ||
157 | "bne\t$1,%z4,1b\n" | ||
158 | "2:\t.set\tpop" | ||
159 | : "=r" (__addr), "=r" (__end) | ||
160 | : "0" (__addr), "1" (__end), "Jr" (__uc)); | ||
161 | |||
162 | return __addr; | ||
163 | } | ||
164 | #endif /* CONFIG_MIPS32 */ | ||
165 | |||
166 | #endif /* _ASM_STRING_H */ | ||