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-rw-r--r--include/asm-mips/stackframe.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 59334f598b78..fb41a8d76392 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -393,11 +393,11 @@
393 * and disable interrupts only for the 393 * and disable interrupts only for the
394 * current TC, using the TCStatus register. 394 * current TC, using the TCStatus register.
395 */ 395 */
396 mfc0 t0,CP0_TCSTATUS 396 mfc0 t0, CP0_TCSTATUS
397 /* Fortunately CU 0 is in the same place in both registers */ 397 /* Fortunately CU 0 is in the same place in both registers */
398 /* Set TCU0, TMX, TKSU (for later inversion) and IXMT */ 398 /* Set TCU0, TMX, TKSU (for later inversion) and IXMT */
399 li t1, ST0_CU0 | 0x08001c00 399 li t1, ST0_CU0 | 0x08001c00
400 or t0,t1 400 or t0, t1
401 /* Clear TKSU, leave IXMT */ 401 /* Clear TKSU, leave IXMT */
402 xori t0, 0x00001800 402 xori t0, 0x00001800
403 mtc0 t0, CP0_TCSTATUS 403 mtc0 t0, CP0_TCSTATUS
@@ -429,11 +429,11 @@
429 * current TC, using the TCStatus register. 429 * current TC, using the TCStatus register.
430 */ 430 */
431 _ehb 431 _ehb
432 mfc0 t0,CP0_TCSTATUS 432 mfc0 t0, CP0_TCSTATUS
433 /* Fortunately CU 0 is in the same place in both registers */ 433 /* Fortunately CU 0 is in the same place in both registers */
434 /* Set TCU0, TKSU (for later inversion) and IXMT */ 434 /* Set TCU0, TKSU (for later inversion) and IXMT */
435 li t1, ST0_CU0 | 0x08001c00 435 li t1, ST0_CU0 | 0x08001c00
436 or t0,t1 436 or t0, t1
437 /* Clear TKSU *and* IXMT */ 437 /* Clear TKSU *and* IXMT */
438 xori t0, 0x00001c00 438 xori t0, 0x00001c00
439 mtc0 t0, CP0_TCSTATUS 439 mtc0 t0, CP0_TCSTATUS