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-rw-r--r--include/asm-mips/sibyte/sb1250_regs.h76
1 files changed, 43 insertions, 33 deletions
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index da7c188993c9..220b7e94f1bf 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -272,59 +272,69 @@
272 ********************************************************************* */ 272 ********************************************************************* */
273 273
274 274
275#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ 275#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
276#define R_DUART_NUM_PORTS 2 276#define R_DUART_NUM_PORTS 2
277 277
278#define A_DUART 0x0010060000 278#define A_DUART 0x0010060000
279 279
280#define DUART_CHANREG_SPACING 0x100 280#define DUART_CHANREG_SPACING 0x100
281#define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg)) 281
282#define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg)) 282#define A_DUART_CHANREG(chan, reg) \
283 (A_DUART + DUART_CHANREG_SPACING * ((chan) + 1) + (reg))
283#endif /* 1250 & 112x */ 284#endif /* 1250 & 112x */
284 285
285#define R_DUART_MODE_REG_1 0x100 286#define R_DUART_MODE_REG_1 0x000
286#define R_DUART_MODE_REG_2 0x110 287#define R_DUART_MODE_REG_2 0x010
287#define R_DUART_STATUS 0x120 288#define R_DUART_STATUS 0x020
288#define R_DUART_CLK_SEL 0x130 289#define R_DUART_CLK_SEL 0x030
289#define R_DUART_CMD 0x150 290#define R_DUART_CMD 0x050
290#define R_DUART_RX_HOLD 0x160 291#define R_DUART_RX_HOLD 0x060
291#define R_DUART_TX_HOLD 0x170 292#define R_DUART_TX_HOLD 0x070
292 293
293#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 294#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
294#define R_DUART_FULL_CTL 0x140 295#define R_DUART_FULL_CTL 0x040
295#define R_DUART_OPCR_X 0x180 296#define R_DUART_OPCR_X 0x080
296#define R_DUART_AUXCTL_X 0x190 297#define R_DUART_AUXCTL_X 0x090
297#endif /* 1250 PASS2 || 112x PASS1 || 1480*/ 298#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
298 299
299 300
300/* 301/*
301 * The IMR and ISR can't be addressed with A_DUART_CHANREG, 302 * The IMR and ISR can't be addressed with A_DUART_CHANREG,
302 * so use this macro instead. 303 * so use these macros instead.
303 */ 304 */
304 305
305#define R_DUART_AUX_CTRL 0x310 306#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
306#define R_DUART_ISR_A 0x320 307#define DUART_IMRISR_SPACING 0x20
307#define R_DUART_IMR_A 0x330 308#define DUART_INCHNG_SPACING 0x10
308#define R_DUART_ISR_B 0x340
309#define R_DUART_IMR_B 0x350
310#define R_DUART_OUT_PORT 0x360
311#define R_DUART_OPCR 0x370
312#define R_DUART_IN_PORT 0x380
313 309
314#define R_DUART_SET_OPR 0x3B0 310#define A_DUART_CTRLREG(reg) \
315#define R_DUART_CLEAR_OPR 0x3C0 311 (A_DUART + DUART_CHANREG_SPACING * 3 + (reg))
316 312
317#define DUART_IMRISR_SPACING 0x20 313#define R_DUART_IMRREG(chan) \
314 (R_DUART_IMR_A + (chan) * DUART_IMRISR_SPACING)
315#define R_DUART_ISRREG(chan) \
316 (R_DUART_ISR_A + (chan) * DUART_IMRISR_SPACING)
317#define R_DUART_INCHREG(chan) \
318 (R_DUART_IN_CHNG_A + (chan) * DUART_INCHNG_SPACING)
318 319
319#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ 320#define A_DUART_IMRREG(chan) A_DUART_CTRLREG(R_DUART_IMRREG(chan))
320#define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING) 321#define A_DUART_ISRREG(chan) A_DUART_CTRLREG(R_DUART_ISRREG(chan))
321#define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING) 322#define A_DUART_INCHREG(chan) A_DUART_CTRLREG(R_DUART_INCHREG(chan))
322
323#define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan))
324#define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan))
325#endif /* 1250 & 112x */ 323#endif /* 1250 & 112x */
326 324
327 325#define R_DUART_AUX_CTRL 0x010
326#define R_DUART_ISR_A 0x020
327#define R_DUART_IMR_A 0x030
328#define R_DUART_ISR_B 0x040
329#define R_DUART_IMR_B 0x050
330#define R_DUART_OUT_PORT 0x060
331#define R_DUART_OPCR 0x070
332#define R_DUART_IN_PORT 0x080
333
334#define R_DUART_SET_OPR 0x0B0
335#define R_DUART_CLEAR_OPR 0x0C0
336#define R_DUART_IN_CHNG_A 0x0D0
337#define R_DUART_IN_CHNG_B 0x0E0
328 338
329 339
330/* 340/*