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-rw-r--r--include/asm-mips/sibyte/sb1250_mac.h35
1 files changed, 24 insertions, 11 deletions
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 18e74e43f4a2..adfc688fa559 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -81,7 +79,10 @@
81#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) 79#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9)
82 80
83#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) 81#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
84#define M_MAC_RESERVED2 _SB_MAKEMASK1(18) 82
83#if SIBYTE_HDR_FEATURE_CHIP(1480)
84#define M_MAC_TIMESTAMP _SB_MAKEMASK1(18)
85#endif
85#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) 86#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
86#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) 87#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
87#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) 88#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21)
@@ -132,9 +133,9 @@
132#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) 133#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44)
133#endif /* 1250 PASS2 || 112x PASS1 */ 134#endif /* 1250 PASS2 || 112x PASS1 */
134 135
135#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 136#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
136#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) 137#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45)
137#endif /* 1250 PASS3 || 112x PASS1 */ 138#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
138 139
139#define S_MAC_BYPASS_IFG _SB_MAKE64(46) 140#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
140#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) 141#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
@@ -176,10 +177,22 @@
176 177
177#define M_MAC_PORT_RESET _SB_MAKEMASK1(8) 178#define M_MAC_PORT_RESET _SB_MAKEMASK1(8)
178 179
180#if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
179#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) 181#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10)
180#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) 182#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11)
181#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) 183#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12)
182#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) 184#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13)
185#endif
186
187/*
188 * MAC reset information register (1280/1255)
189 */
190#if SIBYTE_HDR_FEATURE_CHIP(1480)
191#define M_MAC_RX_CH0_PAUSE_ON _SB_MAKEMASK1(8)
192#define M_MAC_RX_CH1_PAUSE_ON _SB_MAKEMASK1(16)
193#define M_MAC_TX_CH0_PAUSE_ON _SB_MAKEMASK1(24)
194#define M_MAC_TX_CH1_PAUSE_ON _SB_MAKEMASK1(32)
195#endif
183 196
184/* 197/*
185 * MAC DMA Control Register 198 * MAC DMA Control Register
@@ -267,12 +280,12 @@
267#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) 280#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX)
268#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) 281#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
269 282
270#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 283#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
271#define S_MAC_PRE_LEN _SB_MAKE64(0) 284#define S_MAC_PRE_LEN _SB_MAKE64(0)
272#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) 285#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN)
273#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) 286#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
274#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) 287#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
275#endif /* 1250 PASS3 || 112x PASS1 */ 288#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
276 289
277#define S_MAC_IFG_TX _SB_MAKE64(6) 290#define S_MAC_IFG_TX _SB_MAKE64(6)
278#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) 291#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX)
@@ -458,9 +471,9 @@
458#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) 471#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
459#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) 472#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
460 473
461#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 474#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
462#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) 475#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
463#endif /* 1250 PASS3 || 112x PASS1 */ 476#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
464 477
465/* 478/*
466 * MAC Fifo Pointer Registers (Table 9-19) [Debug register] 479 * MAC Fifo Pointer Registers (Table 9-19) [Debug register]
@@ -594,7 +607,7 @@
594#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) 607#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
595#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) 608#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
596 609
597#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 610#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
598#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) 611#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
599#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) 612#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
600#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) 613#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
@@ -612,7 +625,7 @@
612#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) 625#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
613#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) 626#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
614#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) 627#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
615#endif /* 1250 PASS3 || 112x PASS1 */ 628#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
616 629
617/* 630/*
618 * MAC Receive Channel Select Registers (Table 9-25) 631 * MAC Receive Channel Select Registers (Table 9-25)