diff options
Diffstat (limited to 'include/asm-mips/sibyte/sb1250_dma.h')
-rw-r--r-- | include/asm-mips/sibyte/sb1250_dma.h | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h index f1b08d32338d..3cdb48f50ed0 100644 --- a/include/asm-mips/sibyte/sb1250_dma.h +++ b/include/asm-mips/sibyte/sb1250_dma.h | |||
@@ -1,24 +1,24 @@ | |||
1 | /* ********************************************************************* | 1 | /* ********************************************************************* |
2 | * SB1250 Board Support Package | 2 | * SB1250 Board Support Package |
3 | * | 3 | * |
4 | * DMA definitions File: sb1250_dma.h | 4 | * DMA definitions File: sb1250_dma.h |
5 | * | 5 | * |
6 | * This module contains constants and macros useful for | 6 | * This module contains constants and macros useful for |
7 | * programming the SB1250's DMA controllers, both the data mover | 7 | * programming the SB1250's DMA controllers, both the data mover |
8 | * and the Ethernet DMA. | 8 | * and the Ethernet DMA. |
9 | * | 9 | * |
10 | * SB1250 specification level: User's manual 1/02/02 | 10 | * SB1250 specification level: User's manual 1/02/02 |
11 | * | 11 | * |
12 | * Author: Mitch Lichtenberg | 12 | * Author: Mitch Lichtenberg |
13 | * | 13 | * |
14 | ********************************************************************* | 14 | ********************************************************************* |
15 | * | 15 | * |
16 | * Copyright 2000,2001,2002,2003 | 16 | * Copyright 2000,2001,2002,2003 |
17 | * Broadcom Corporation. All rights reserved. | 17 | * Broadcom Corporation. All rights reserved. |
18 | * | 18 | * |
19 | * This program is free software; you can redistribute it and/or | 19 | * This program is free software; you can redistribute it and/or |
20 | * modify it under the terms of the GNU General Public License as | 20 | * modify it under the terms of the GNU General Public License as |
21 | * published by the Free Software Foundation; either version 2 of | 21 | * published by the Free Software Foundation; either version 2 of |
22 | * the License, or (at your option) any later version. | 22 | * the License, or (at your option) any later version. |
23 | * | 23 | * |
24 | * This program is distributed in the hope that it will be useful, | 24 | * This program is distributed in the hope that it will be useful, |
@@ -28,7 +28,7 @@ | |||
28 | * | 28 | * |
29 | * You should have received a copy of the GNU General Public License | 29 | * You should have received a copy of the GNU General Public License |
30 | * along with this program; if not, write to the Free Software | 30 | * along with this program; if not, write to the Free Software |
31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | 31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
32 | * MA 02111-1307 USA | 32 | * MA 02111-1307 USA |
33 | ********************************************************************* */ | 33 | ********************************************************************* */ |
34 | 34 | ||
@@ -43,9 +43,9 @@ | |||
43 | * DMA Registers | 43 | * DMA Registers |
44 | ********************************************************************* */ | 44 | ********************************************************************* */ |
45 | 45 | ||
46 | /* | 46 | /* |
47 | * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) | 47 | * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) |
48 | * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 | 48 | * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 |
49 | * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 | 49 | * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 |
50 | * Registers: DMA_CONFIG0_SER_x_RX | 50 | * Registers: DMA_CONFIG0_SER_x_RX |
51 | * Registers: DMA_CONFIG0_SER_x_TX | 51 | * Registers: DMA_CONFIG0_SER_x_TX |
@@ -98,7 +98,7 @@ | |||
98 | 98 | ||
99 | /* | 99 | /* |
100 | * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) | 100 | * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) |
101 | * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 | 101 | * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 |
102 | * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 | 102 | * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 |
103 | * Registers: DMA_CONFIG1_SER_x_RX | 103 | * Registers: DMA_CONFIG1_SER_x_RX |
104 | * Registers: DMA_CONFIG1_SER_x_TX | 104 | * Registers: DMA_CONFIG1_SER_x_TX |
@@ -152,11 +152,11 @@ | |||
152 | /* | 152 | /* |
153 | * DMA Descriptor Count Registers (Table 7-8) | 153 | * DMA Descriptor Count Registers (Table 7-8) |
154 | */ | 154 | */ |
155 | 155 | ||
156 | /* No bitfields */ | 156 | /* No bitfields */ |
157 | 157 | ||
158 | 158 | ||
159 | /* | 159 | /* |
160 | * Current Descriptor Address Register (Table 7-11) | 160 | * Current Descriptor Address Register (Table 7-11) |
161 | */ | 161 | */ |
162 | 162 | ||
@@ -275,14 +275,14 @@ | |||
275 | #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) | 275 | #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) |
276 | #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) | 276 | #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) |
277 | 277 | ||
278 | /* | 278 | /* |
279 | * Ethernet Descriptor Status Bits (Table 7-15) | 279 | * Ethernet Descriptor Status Bits (Table 7-15) |
280 | */ | 280 | */ |
281 | 281 | ||
282 | #define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) | 282 | #define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) |
283 | #define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) | 283 | #define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) |
284 | 284 | ||
285 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) | 285 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
286 | /* Note: BADTCPCS is actually in DSCR_B options field */ | 286 | /* Note: BADTCPCS is actually in DSCR_B options field */ |
287 | #define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) | 287 | #define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) |
288 | #endif /* 1250 PASS2 || 112x PASS1 */ | 288 | #endif /* 1250 PASS2 || 112x PASS1 */ |
@@ -324,7 +324,7 @@ | |||
324 | 324 | ||
325 | #define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) | 325 | #define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) |
326 | 326 | ||
327 | /* | 327 | /* |
328 | * Ethernet Transmit Options (Table 7-17) | 328 | * Ethernet Transmit Options (Table 7-17) |
329 | */ | 329 | */ |
330 | 330 | ||
@@ -377,7 +377,7 @@ | |||
377 | * Data Mover Registers | 377 | * Data Mover Registers |
378 | ********************************************************************* */ | 378 | ********************************************************************* */ |
379 | 379 | ||
380 | /* | 380 | /* |
381 | * Data Mover Descriptor Base Address Register (Table 7-22) | 381 | * Data Mover Descriptor Base Address Register (Table 7-22) |
382 | * Register: DM_DSCR_BASE_0 | 382 | * Register: DM_DSCR_BASE_0 |
383 | * Register: DM_DSCR_BASE_1 | 383 | * Register: DM_DSCR_BASE_1 |
@@ -414,7 +414,7 @@ | |||
414 | #define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) | 414 | #define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) |
415 | #define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) | 415 | #define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) |
416 | 416 | ||
417 | /* | 417 | /* |
418 | * Data Mover Descriptor Count Register (Table 7-25) | 418 | * Data Mover Descriptor Count Register (Table 7-25) |
419 | */ | 419 | */ |
420 | 420 | ||