diff options
Diffstat (limited to 'include/asm-mips/sibyte/bcm1480_scd.h')
| -rw-r--r-- | include/asm-mips/sibyte/bcm1480_scd.h | 102 |
1 files changed, 51 insertions, 51 deletions
diff --git a/include/asm-mips/sibyte/bcm1480_scd.h b/include/asm-mips/sibyte/bcm1480_scd.h index 6111d6dcf117..25ef24cbb92a 100644 --- a/include/asm-mips/sibyte/bcm1480_scd.h +++ b/include/asm-mips/sibyte/bcm1480_scd.h | |||
| @@ -99,22 +99,22 @@ | |||
| 99 | #define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5) | 99 | #define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5) |
| 100 | 100 | ||
| 101 | #define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6) | 101 | #define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6) |
| 102 | #define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV) | 102 | #define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_PLL_DIV) |
| 103 | #define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_PLL_DIV) | 103 | #define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV) |
| 104 | #define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_PLL_DIV,M_BCM1480_SYS_PLL_DIV) | 104 | #define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PLL_DIV) |
| 105 | 105 | ||
| 106 | #define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11) | 106 | #define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11) |
| 107 | #define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV) | 107 | #define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_SW_DIV) |
| 108 | #define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_SW_DIV) | 108 | #define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV) |
| 109 | #define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_SW_DIV,M_BCM1480_SYS_SW_DIV) | 109 | #define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_DIV) |
| 110 | 110 | ||
| 111 | #define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) | 111 | #define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) |
| 112 | #define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17) | 112 | #define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17) |
| 113 | 113 | ||
| 114 | #define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18) | 114 | #define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18) |
| 115 | #define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE) | 115 | #define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2, S_BCM1480_SYS_BOOT_MODE) |
| 116 | #define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_BOOT_MODE) | 116 | #define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE) |
| 117 | #define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_BCM1480_SYS_BOOT_MODE,M_BCM1480_SYS_BOOT_MODE) | 117 | #define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_BOOT_MODE) |
| 118 | #define K_BCM1480_SYS_BOOT_MODE_ROM32 0 | 118 | #define K_BCM1480_SYS_BOOT_MODE_ROM32 0 |
| 119 | #define K_BCM1480_SYS_BOOT_MODE_ROM8 1 | 119 | #define K_BCM1480_SYS_BOOT_MODE_ROM8 1 |
| 120 | #define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2 | 120 | #define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2 |
| @@ -129,16 +129,16 @@ | |||
| 129 | #define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25) | 129 | #define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25) |
| 130 | 130 | ||
| 131 | #define S_BCM1480_SYS_CONFIG 26 | 131 | #define S_BCM1480_SYS_CONFIG 26 |
| 132 | #define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG) | 132 | #define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6, S_BCM1480_SYS_CONFIG) |
| 133 | #define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_CONFIG) | 133 | #define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG) |
| 134 | #define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x,S_BCM1480_SYS_CONFIG,M_BCM1480_SYS_CONFIG) | 134 | #define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CONFIG) |
| 135 | 135 | ||
| 136 | #define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32,15) | 136 | #define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32, 15) |
| 137 | 137 | ||
| 138 | #define S_BCM1480_SYS_NODEID 47 | 138 | #define S_BCM1480_SYS_NODEID 47 |
| 139 | #define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID) | 139 | #define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4, S_BCM1480_SYS_NODEID) |
| 140 | #define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_NODEID) | 140 | #define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID) |
| 141 | #define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x,S_BCM1480_SYS_NODEID,M_BCM1480_SYS_NODEID) | 141 | #define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NODEID) |
| 142 | 142 | ||
| 143 | #define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51) | 143 | #define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51) |
| 144 | #define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52) | 144 | #define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52) |
| @@ -196,9 +196,9 @@ | |||
| 196 | #define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0) | 196 | #define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0) |
| 197 | 197 | ||
| 198 | #define S_BCM1480_SCD_WDOG_RESET_TYPE 2 | 198 | #define S_BCM1480_SCD_WDOG_RESET_TYPE 2 |
| 199 | #define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE) | 199 | #define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5, S_BCM1480_SCD_WDOG_RESET_TYPE) |
| 200 | #define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE) | 200 | #define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE) |
| 201 | #define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE,M_BCM1480_SCD_WDOG_RESET_TYPE) | 201 | #define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE, M_BCM1480_SCD_WDOG_RESET_TYPE) |
| 202 | 202 | ||
| 203 | #define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */ | 203 | #define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */ |
| 204 | #define K_BCM1480_SCD_WDOG_RESET_SOFT 1 | 204 | #define K_BCM1480_SCD_WDOG_RESET_SOFT 1 |
| @@ -244,24 +244,24 @@ | |||
| 244 | */ | 244 | */ |
| 245 | 245 | ||
| 246 | #define S_SPC_CFG_SRC4 32 | 246 | #define S_SPC_CFG_SRC4 32 |
| 247 | #define M_SPC_CFG_SRC4 _SB_MAKEMASK(8,S_SPC_CFG_SRC4) | 247 | #define M_SPC_CFG_SRC4 _SB_MAKEMASK(8, S_SPC_CFG_SRC4) |
| 248 | #define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC4) | 248 | #define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC4) |
| 249 | #define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x,S_SPC_CFG_SRC4,M_SPC_CFG_SRC4) | 249 | #define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x, S_SPC_CFG_SRC4, M_SPC_CFG_SRC4) |
| 250 | 250 | ||
| 251 | #define S_SPC_CFG_SRC5 40 | 251 | #define S_SPC_CFG_SRC5 40 |
| 252 | #define M_SPC_CFG_SRC5 _SB_MAKEMASK(8,S_SPC_CFG_SRC5) | 252 | #define M_SPC_CFG_SRC5 _SB_MAKEMASK(8, S_SPC_CFG_SRC5) |
| 253 | #define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC5) | 253 | #define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC5) |
| 254 | #define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x,S_SPC_CFG_SRC5,M_SPC_CFG_SRC5) | 254 | #define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x, S_SPC_CFG_SRC5, M_SPC_CFG_SRC5) |
| 255 | 255 | ||
| 256 | #define S_SPC_CFG_SRC6 48 | 256 | #define S_SPC_CFG_SRC6 48 |
| 257 | #define M_SPC_CFG_SRC6 _SB_MAKEMASK(8,S_SPC_CFG_SRC6) | 257 | #define M_SPC_CFG_SRC6 _SB_MAKEMASK(8, S_SPC_CFG_SRC6) |
| 258 | #define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC6) | 258 | #define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC6) |
| 259 | #define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x,S_SPC_CFG_SRC6,M_SPC_CFG_SRC6) | 259 | #define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x, S_SPC_CFG_SRC6, M_SPC_CFG_SRC6) |
| 260 | 260 | ||
| 261 | #define S_SPC_CFG_SRC7 56 | 261 | #define S_SPC_CFG_SRC7 56 |
| 262 | #define M_SPC_CFG_SRC7 _SB_MAKEMASK(8,S_SPC_CFG_SRC7) | 262 | #define M_SPC_CFG_SRC7 _SB_MAKEMASK(8, S_SPC_CFG_SRC7) |
| 263 | #define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC7) | 263 | #define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC7) |
| 264 | #define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x,S_SPC_CFG_SRC7,M_SPC_CFG_SRC7) | 264 | #define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x, S_SPC_CFG_SRC7, M_SPC_CFG_SRC7) |
| 265 | 265 | ||
| 266 | /* | 266 | /* |
| 267 | * System Performance Counter Control Register (Table 32) | 267 | * System Performance Counter Control Register (Table 32) |
| @@ -281,9 +281,9 @@ | |||
| 281 | */ | 281 | */ |
| 282 | 282 | ||
| 283 | #define S_BCM1480_SPC_CNT_COUNT 0 | 283 | #define S_BCM1480_SPC_CNT_COUNT 0 |
| 284 | #define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40,S_BCM1480_SPC_CNT_COUNT) | 284 | #define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40, S_BCM1480_SPC_CNT_COUNT) |
| 285 | #define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CNT_COUNT) | 285 | #define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x, S_BCM1480_SPC_CNT_COUNT) |
| 286 | #define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x,S_BCM1480_SPC_CNT_COUNT,M_BCM1480_SPC_CNT_COUNT) | 286 | #define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x, S_BCM1480_SPC_CNT_COUNT, M_BCM1480_SPC_CNT_COUNT) |
| 287 | 287 | ||
| 288 | #define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40) | 288 | #define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40) |
| 289 | 289 | ||
| @@ -322,13 +322,13 @@ | |||
| 322 | * slightly different. | 322 | * slightly different. |
| 323 | */ | 323 | */ |
| 324 | 324 | ||
| 325 | #define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4,0) | 325 | #define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4, 0) |
| 326 | #define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40,0) | 326 | #define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40, 0) |
| 327 | 327 | ||
| 328 | #define S_BCM1480_ATRAP_CFG_CNT 0 | 328 | #define S_BCM1480_ATRAP_CFG_CNT 0 |
| 329 | #define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_BCM1480_ATRAP_CFG_CNT) | 329 | #define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_BCM1480_ATRAP_CFG_CNT) |
| 330 | #define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CNT) | 330 | #define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CNT) |
| 331 | #define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CNT,M_BCM1480_ATRAP_CFG_CNT) | 331 | #define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CNT, M_BCM1480_ATRAP_CFG_CNT) |
| 332 | 332 | ||
| 333 | #define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) | 333 | #define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) |
| 334 | #define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4) | 334 | #define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4) |
| @@ -337,9 +337,9 @@ | |||
| 337 | #define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) | 337 | #define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) |
| 338 | 338 | ||
| 339 | #define S_BCM1480_ATRAP_CFG_AGENTID 8 | 339 | #define S_BCM1480_ATRAP_CFG_AGENTID 8 |
| 340 | #define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_BCM1480_ATRAP_CFG_AGENTID) | 340 | #define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_BCM1480_ATRAP_CFG_AGENTID) |
| 341 | #define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID) | 341 | #define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID) |
| 342 | #define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID,M_BCM1480_ATRAP_CFG_AGENTID) | 342 | #define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID, M_BCM1480_ATRAP_CFG_AGENTID) |
| 343 | 343 | ||
| 344 | 344 | ||
| 345 | #define K_BCM1480_BUS_AGENT_CPU0 0 | 345 | #define K_BCM1480_BUS_AGENT_CPU0 0 |
| @@ -354,9 +354,9 @@ | |||
| 354 | #define K_BCM1480_BUS_AGENT_PM 10 | 354 | #define K_BCM1480_BUS_AGENT_PM 10 |
| 355 | 355 | ||
| 356 | #define S_BCM1480_ATRAP_CFG_CATTR 12 | 356 | #define S_BCM1480_ATRAP_CFG_CATTR 12 |
| 357 | #define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2,S_BCM1480_ATRAP_CFG_CATTR) | 357 | #define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2, S_BCM1480_ATRAP_CFG_CATTR) |
| 358 | #define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CATTR) | 358 | #define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CATTR) |
| 359 | #define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CATTR,M_BCM1480_ATRAP_CFG_CATTR) | 359 | #define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CATTR, M_BCM1480_ATRAP_CFG_CATTR) |
| 360 | 360 | ||
| 361 | #define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0 | 361 | #define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0 |
| 362 | #define K_BCM1480_ATRAP_CFG_CATTR_UNC 1 | 362 | #define K_BCM1480_ATRAP_CFG_CATTR_UNC 1 |
| @@ -382,9 +382,9 @@ | |||
| 382 | #define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25) | 382 | #define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25) |
| 383 | 383 | ||
| 384 | #define S_BCM1480_SCD_TRSEQ_SWFUNC 26 | 384 | #define S_BCM1480_SCD_TRSEQ_SWFUNC 26 |
| 385 | #define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2,S_BCM1480_SCD_TRSEQ_SWFUNC) | 385 | #define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2, S_BCM1480_SCD_TRSEQ_SWFUNC) |
| 386 | #define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC) | 386 | #define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC) |
| 387 | #define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC,M_BCM1480_SCD_TRSEQ_SWFUNC) | 387 | #define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC, M_BCM1480_SCD_TRSEQ_SWFUNC) |
| 388 | 388 | ||
| 389 | /* | 389 | /* |
| 390 | * Trace Control Register (Table 49) | 390 | * Trace Control Register (Table 49) |
| @@ -395,9 +395,9 @@ | |||
| 395 | */ | 395 | */ |
| 396 | 396 | ||
| 397 | #define S_BCM1480_SCD_TRACE_CFG_MODE 16 | 397 | #define S_BCM1480_SCD_TRACE_CFG_MODE 16 |
| 398 | #define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2,S_BCM1480_SCD_TRACE_CFG_MODE) | 398 | #define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2, S_BCM1480_SCD_TRACE_CFG_MODE) |
| 399 | #define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE) | 399 | #define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE) |
| 400 | #define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE,M_BCM1480_SCD_TRACE_CFG_MODE) | 400 | #define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE, M_BCM1480_SCD_TRACE_CFG_MODE) |
| 401 | 401 | ||
| 402 | #define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0 | 402 | #define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0 |
| 403 | #define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1 | 403 | #define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1 |