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-rw-r--r--include/asm-mips/sgi/gio.h2
-rw-r--r--include/asm-mips/sgi/hpc3.h4
-rw-r--r--include/asm-mips/sgi/ioc.h4
-rw-r--r--include/asm-mips/sgi/ip22.h2
-rw-r--r--include/asm-mips/sgi/mc.h6
5 files changed, 9 insertions, 9 deletions
diff --git a/include/asm-mips/sgi/gio.h b/include/asm-mips/sgi/gio.h
index a38d66f99872..889cf028c95d 100644
--- a/include/asm-mips/sgi/gio.h
+++ b/include/asm-mips/sgi/gio.h
@@ -16,7 +16,7 @@
16 * 16 *
17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have 17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have
18 * three physical connectors, but only two slots, GFX and EXP0. 18 * three physical connectors, but only two slots, GFX and EXP0.
19 * 19 *
20 * There is 10MB of GIO address space for GIO64 slot devices 20 * There is 10MB of GIO address space for GIO64 slot devices
21 * slot# slot type address range size 21 * slot# slot type address range size
22 * ----- --------- ----------------------- ----- 22 * ----- --------- ----------------------- -----
diff --git a/include/asm-mips/sgi/hpc3.h b/include/asm-mips/sgi/hpc3.h
index a5b988d7327a..ac3dfc7af5b0 100644
--- a/include/asm-mips/sgi/hpc3.h
+++ b/include/asm-mips/sgi/hpc3.h
@@ -221,7 +221,7 @@ struct hpc3_regs {
221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */ 221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
222 222
223 u32 _unused1[0x14000/4 - 5]; /* padding */ 223 u32 _unused1[0x14000/4 - 5]; /* padding */
224 224
225 /* Now direct PIO per-HPC3 peripheral access to external regs. */ 225 /* Now direct PIO per-HPC3 peripheral access to external regs. */
226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */ 226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
227 u32 _unused2[0x7c00/4]; 227 u32 _unused2[0x7c00/4];
@@ -304,7 +304,7 @@ struct hpc3_regs {
304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */ 304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
305}; 305};
306 306
307/* 307/*
308 * It is possible to have two HPC3's within the address space on 308 * It is possible to have two HPC3's within the address space on
309 * one machine, though only having one is more likely on an Indy. 309 * one machine, though only having one is more likely on an Indy.
310 */ 310 */
diff --git a/include/asm-mips/sgi/ioc.h b/include/asm-mips/sgi/ioc.h
index 169187f53fbc..f3e3dc9bb732 100644
--- a/include/asm-mips/sgi/ioc.h
+++ b/include/asm-mips/sgi/ioc.h
@@ -16,7 +16,7 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include <asm/sgi/pi1.h> 17#include <asm/sgi/pi1.h>
18 18
19/* 19/*
20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things 20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things
21 * happen if you try word access them. You have been warned. 21 * happen if you try word access them. You have been warned.
22 */ 22 */
@@ -138,7 +138,7 @@ struct sgioc_regs {
138 u8 _sysid[3]; 138 u8 _sysid[3];
139 volatile u8 sysid; 139 volatile u8 sysid;
140#define SGIOC_SYSID_FULLHOUSE 0x01 140#define SGIOC_SYSID_FULLHOUSE 0x01
141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5) 141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5)
142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1) 142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1)
143 u32 _unused2; 143 u32 _unused2;
144 u8 _read[3]; 144 u8 _read[3];
diff --git a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h
index 97d73adb4e40..bbfc05c3cab9 100644
--- a/include/asm-mips/sgi/ip22.h
+++ b/include/asm-mips/sgi/ip22.h
@@ -12,7 +12,7 @@
12#ifndef _SGI_IP22_H 12#ifndef _SGI_IP22_H
13#define _SGI_IP22_H 13#define _SGI_IP22_H
14 14
15/* 15/*
16 * These are the virtual IRQ numbers, we divide all IRQ's into 16 * These are the virtual IRQ numbers, we divide all IRQ's into
17 * 'spaces', the 'space' determines where and how to enable/disable 17 * 'spaces', the 'space' determines where and how to enable/disable
18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups 18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups
diff --git a/include/asm-mips/sgi/mc.h b/include/asm-mips/sgi/mc.h
index fd98f930607c..c52f7834c7c8 100644
--- a/include/asm-mips/sgi/mc.h
+++ b/include/asm-mips/sgi/mc.h
@@ -182,14 +182,14 @@ struct sgimc_regs {
182 volatile u32 dtlb_hi3; 182 volatile u32 dtlb_hi3;
183 u32 _unused33; 183 u32 _unused33;
184 volatile u32 dtlb_lo3; 184 volatile u32 dtlb_lo3;
185 185
186 u32 _unused34[0x0392]; 186 u32 _unused34[0x0392];
187 187
188 u32 _unused35; 188 u32 _unused35;
189 volatile u32 rpsscounter; /* Chirps at 100ns */ 189 volatile u32 rpsscounter; /* Chirps at 100ns */
190 190
191 u32 _unused36[0x1000/4-2*4]; 191 u32 _unused36[0x1000/4-2*4];
192 192
193 u32 _unused37; 193 u32 _unused37;
194 volatile u32 maddronly; /* Address DMA goes at */ 194 volatile u32 maddronly; /* Address DMA goes at */
195 u32 _unused38; 195 u32 _unused38;