diff options
Diffstat (limited to 'include/asm-mips/serial.h')
-rw-r--r-- | include/asm-mips/serial.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index d7a65135d837..ce51213d84f9 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h | |||
@@ -81,25 +81,6 @@ | |||
81 | #define STD_SERIAL_PORT_DEFNS | 81 | #define STD_SERIAL_PORT_DEFNS |
82 | #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ | 82 | #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ |
83 | 83 | ||
84 | #ifdef CONFIG_MOMENCO_JAGUAR_ATX | ||
85 | /* Ordinary NS16552 duart with a 20MHz crystal. */ | ||
86 | #define JAGUAR_ATX_UART_CLK 20000000 | ||
87 | #define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16) | ||
88 | |||
89 | #define JAGUAR_ATX_SERIAL1_IRQ 6 | ||
90 | #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L | ||
91 | |||
92 | #define _JAGUAR_ATX_SERIAL_INIT(int, base) \ | ||
93 | { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \ | ||
94 | .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ | ||
95 | .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ | ||
96 | io_type: SERIAL_IO_MEM } | ||
97 | #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ | ||
98 | _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) | ||
99 | #else | ||
100 | #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS | ||
101 | #endif | ||
102 | |||
103 | #ifdef CONFIG_MOMENCO_OCELOT_3 | 84 | #ifdef CONFIG_MOMENCO_OCELOT_3 |
104 | #define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) | 85 | #define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) |
105 | #define OCELOT_3_SERIAL_IRQ 6 | 86 | #define OCELOT_3_SERIAL_IRQ 6 |
@@ -134,27 +115,6 @@ | |||
134 | #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS | 115 | #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS |
135 | #endif | 116 | #endif |
136 | 117 | ||
137 | #ifdef CONFIG_MOMENCO_OCELOT_G | ||
138 | /* Ordinary NS16552 duart with a 20MHz crystal. */ | ||
139 | #define OCELOT_G_BASE_BAUD ( 20000000 / 16 ) | ||
140 | |||
141 | #define OCELOT_G_SERIAL1_IRQ 4 | ||
142 | #if 0 | ||
143 | #define OCELOT_G_SERIAL1_BASE 0xe0001020 | ||
144 | #else | ||
145 | #define OCELOT_G_SERIAL1_BASE 0xfd000020 | ||
146 | #endif | ||
147 | |||
148 | #define _OCELOT_G_SERIAL_INIT(int, base) \ | ||
149 | { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\ | ||
150 | .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ | ||
151 | .io_type = SERIAL_IO_MEM } | ||
152 | #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ | ||
153 | _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE) | ||
154 | #else | ||
155 | #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS | ||
156 | #endif | ||
157 | |||
158 | #ifdef CONFIG_MOMENCO_OCELOT_C | 118 | #ifdef CONFIG_MOMENCO_OCELOT_C |
159 | /* Ordinary NS16552 duart with a 20MHz crystal. */ | 119 | /* Ordinary NS16552 duart with a 20MHz crystal. */ |
160 | #define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) | 120 | #define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) |
@@ -210,7 +170,6 @@ | |||
210 | IP32_SERIAL_PORT_DEFNS \ | 170 | IP32_SERIAL_PORT_DEFNS \ |
211 | JAZZ_SERIAL_PORT_DEFNS \ | 171 | JAZZ_SERIAL_PORT_DEFNS \ |
212 | STD_SERIAL_PORT_DEFNS \ | 172 | STD_SERIAL_PORT_DEFNS \ |
213 | MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ | ||
214 | MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ | 173 | MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ |
215 | MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ | 174 | MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ |
216 | MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS | 175 | MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS |