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-rw-r--r--include/asm-mips/pgtable.h23
1 files changed, 14 insertions, 9 deletions
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index eaf5d9b3a0e1..1e8ae2723be4 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -8,8 +8,6 @@
8#ifndef _ASM_PGTABLE_H 8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H 9#define _ASM_PGTABLE_H
10 10
11#include <asm-generic/4level-fixup.h>
12
13#include <linux/config.h> 11#include <linux/config.h>
14#ifdef CONFIG_32BIT 12#ifdef CONFIG_32BIT
15#include <asm/pgtable-32.h> 13#include <asm/pgtable-32.h>
@@ -18,6 +16,7 @@
18#include <asm/pgtable-64.h> 16#include <asm/pgtable-64.h>
19#endif 17#endif
20 18
19#include <asm/io.h>
21#include <asm/pgtable-bits.h> 20#include <asm/pgtable-bits.h>
22 21
23#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) 22#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
@@ -84,7 +83,7 @@ extern void paging_init(void);
84#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 83#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
85#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 84#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
86 85
87#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 86#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
88static inline void set_pte(pte_t *ptep, pte_t pte) 87static inline void set_pte(pte_t *ptep, pte_t pte)
89{ 88{
90 ptep->pte_high = pte.pte_high; 89 ptep->pte_high = pte.pte_high;
@@ -148,11 +147,18 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
148#endif 147#endif
149 148
150/* 149/*
151 * (pmds are folded into pgds so this doesn't get actually called, 150 * (pmds are folded into puds so this doesn't get actually called,
152 * but the define is needed for a generic inline function.) 151 * but the define is needed for a generic inline function.)
153 */ 152 */
154#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) 153#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
155#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0) 154
155#ifdef CONFIG_64BIT
156/*
157 * (puds are folded into pgds so this doesn't get actually called,
158 * but the define is needed for a generic inline function.)
159 */
160#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
161#endif
156 162
157#define PGD_T_LOG2 ffz(~sizeof(pgd_t)) 163#define PGD_T_LOG2 ffz(~sizeof(pgd_t))
158#define PMD_T_LOG2 ffz(~sizeof(pmd_t)) 164#define PMD_T_LOG2 ffz(~sizeof(pmd_t))
@@ -165,7 +171,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
165 * Undefined behaviour if not.. 171 * Undefined behaviour if not..
166 */ 172 */
167static inline int pte_user(pte_t pte) { BUG(); return 0; } 173static inline int pte_user(pte_t pte) { BUG(); return 0; }
168#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 174#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
169static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } 175static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
170static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } 176static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
171static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } 177static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
@@ -324,7 +330,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
324 */ 330 */
325#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 331#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
326 332
327#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 333#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
328static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 334static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
329{ 335{
330 pte.pte_low &= _PAGE_CHG_MASK; 336 pte.pte_low &= _PAGE_CHG_MASK;
@@ -357,7 +363,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
357#endif 363#endif
358 364
359#ifdef CONFIG_64BIT_PHYS_ADDR 365#ifdef CONFIG_64BIT_PHYS_ADDR
360extern phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size);
361extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot); 366extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
362 367
363static inline int io_remap_pfn_range(struct vm_area_struct *vma, 368static inline int io_remap_pfn_range(struct vm_area_struct *vma,
@@ -367,7 +372,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
367 pgprot_t prot) 372 pgprot_t prot)
368{ 373{
369 phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size); 374 phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
370 return remap_pfn_range(vma, vaddr, pfn, size, prot); 375 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
371} 376}
372#else 377#else
373#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 378#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \