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-rw-r--r--include/asm-mips/mipsregs.h287
1 files changed, 287 insertions, 0 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 9b0ce451286e..1fad6ec1daa0 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -281,6 +281,11 @@
281#define ST0_DL (_ULCAST_(1) << 24) 281#define ST0_DL (_ULCAST_(1) << 24)
282 282
283/* 283/*
284 * Enable the MIPS DSP ASE
285 */
286#define ST0_MX 0x01000000
287
288/*
284 * Bitfields in the TX39 family CP0 Configuration Register 3 289 * Bitfields in the TX39 family CP0 Configuration Register 3
285 */ 290 */
286#define TX39_CONF_ICS_SHIFT 19 291#define TX39_CONF_ICS_SHIFT 19
@@ -510,6 +515,7 @@
510#define MIPS_CONF3_VINT (_ULCAST_(1) << 5) 515#define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
511#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6) 516#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
512#define MIPS_CONF3_LPA (_ULCAST_(1) << 7) 517#define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
518#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
513 519
514/* 520/*
515 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register. 521 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
@@ -986,6 +992,287 @@ do { \
986 : "=r" (__res)); \ 992 : "=r" (__res)); \
987 __res;}) 993 __res;})
988 994
995#define rddsp(mask) \
996({ \
997 unsigned int __res; \
998 \
999 __asm__ __volatile__( \
1000 " .set push \n" \
1001 " .set noat \n" \
1002 " # rddsp $1, %x1 \n" \
1003 " .word 0x7c000cb8 | (%x1 << 16) \n" \
1004 " move %0, $1 \n" \
1005 " .set pop \n" \
1006 : "=r" (__res) \
1007 : "i" (mask)); \
1008 __res; \
1009})
1010
1011#define wrdsp(val, mask) \
1012do { \
1013 unsigned int __res; \
1014 \
1015 __asm__ __volatile__( \
1016 " .set push \n" \
1017 " .set noat \n" \
1018 " move $1, %0 \n" \
1019 " # wrdsp $1, %x1 \n" \
1020 " .word 0x7c2004f8 | (%x1 << 15) \n" \
1021 " .set pop \n" \
1022 : \
1023 : "r" (val), "i" (mask)); \
1024 __res; \
1025} while (0)
1026
1027#if 0 /* Need DSP ASE capable assembler ... */
1028#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
1029#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
1030#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
1031#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
1032
1033#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
1034#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
1035#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
1036#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
1037
1038#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
1039#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
1040#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
1041#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
1042
1043#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
1044#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
1045#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
1046#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
1047
1048#else
1049
1050#define mfhi0() \
1051({ \
1052 unsigned long __treg; \
1053 \
1054 __asm__ __volatile__( \
1055 " .set push \n" \
1056 " .set noat \n" \
1057 " # mfhi %0, $ac0 \n" \
1058 " .word 0x00000810 \n" \
1059 " move %0, $1 \n" \
1060 " .set pop \n" \
1061 : "=r" (__treg)); \
1062 __treg; \
1063})
1064
1065#define mfhi1() \
1066({ \
1067 unsigned long __treg; \
1068 \
1069 __asm__ __volatile__( \
1070 " .set push \n" \
1071 " .set noat \n" \
1072 " # mfhi %0, $ac1 \n" \
1073 " .word 0x00200810 \n" \
1074 " move %0, $1 \n" \
1075 " .set pop \n" \
1076 : "=r" (__treg)); \
1077 __treg; \
1078})
1079
1080#define mfhi2() \
1081({ \
1082 unsigned long __treg; \
1083 \
1084 __asm__ __volatile__( \
1085 " .set push \n" \
1086 " .set noat \n" \
1087 " # mfhi %0, $ac2 \n" \
1088 " .word 0x00400810 \n" \
1089 " move %0, $1 \n" \
1090 " .set pop \n" \
1091 : "=r" (__treg)); \
1092 __treg; \
1093})
1094
1095#define mfhi3() \
1096({ \
1097 unsigned long __treg; \
1098 \
1099 __asm__ __volatile__( \
1100 " .set push \n" \
1101 " .set noat \n" \
1102 " # mfhi %0, $ac3 \n" \
1103 " .word 0x00600810 \n" \
1104 " move %0, $1 \n" \
1105 " .set pop \n" \
1106 : "=r" (__treg)); \
1107 __treg; \
1108})
1109
1110#define mflo0() \
1111({ \
1112 unsigned long __treg; \
1113 \
1114 __asm__ __volatile__( \
1115 " .set push \n" \
1116 " .set noat \n" \
1117 " # mflo %0, $ac0 \n" \
1118 " .word 0x00000812 \n" \
1119 " move %0, $1 \n" \
1120 " .set pop \n" \
1121 : "=r" (__treg)); \
1122 __treg; \
1123})
1124
1125#define mflo1() \
1126({ \
1127 unsigned long __treg; \
1128 \
1129 __asm__ __volatile__( \
1130 " .set push \n" \
1131 " .set noat \n" \
1132 " # mflo %0, $ac1 \n" \
1133 " .word 0x00200812 \n" \
1134 " move %0, $1 \n" \
1135 " .set pop \n" \
1136 : "=r" (__treg)); \
1137 __treg; \
1138})
1139
1140#define mflo2() \
1141({ \
1142 unsigned long __treg; \
1143 \
1144 __asm__ __volatile__( \
1145 " .set push \n" \
1146 " .set noat \n" \
1147 " # mflo %0, $ac2 \n" \
1148 " .word 0x00400812 \n" \
1149 " move %0, $1 \n" \
1150 " .set pop \n" \
1151 : "=r" (__treg)); \
1152 __treg; \
1153})
1154
1155#define mflo3() \
1156({ \
1157 unsigned long __treg; \
1158 \
1159 __asm__ __volatile__( \
1160 " .set push \n" \
1161 " .set noat \n" \
1162 " # mflo %0, $ac3 \n" \
1163 " .word 0x00600812 \n" \
1164 " move %0, $1 \n" \
1165 " .set pop \n" \
1166 : "=r" (__treg)); \
1167 __treg; \
1168})
1169
1170#define mthi0(x) \
1171do { \
1172 __asm__ __volatile__( \
1173 " .set push \n" \
1174 " .set noat \n" \
1175 " move $1, %0 \n" \
1176 " # mthi $1, $ac0 \n" \
1177 " .word 0x00200011 \n" \
1178 " .set pop \n" \
1179 : \
1180 : "r" (x)); \
1181} while (0)
1182
1183#define mthi1(x) \
1184do { \
1185 __asm__ __volatile__( \
1186 " .set push \n" \
1187 " .set noat \n" \
1188 " move $1, %0 \n" \
1189 " # mthi $1, $ac1 \n" \
1190 " .word 0x00200811 \n" \
1191 " .set pop \n" \
1192 : \
1193 : "r" (x)); \
1194} while (0)
1195
1196#define mthi2(x) \
1197do { \
1198 __asm__ __volatile__( \
1199 " .set push \n" \
1200 " .set noat \n" \
1201 " move $1, %0 \n" \
1202 " # mthi $1, $ac2 \n" \
1203 " .word 0x00201011 \n" \
1204 " .set pop \n" \
1205 : \
1206 : "r" (x)); \
1207} while (0)
1208
1209#define mthi3(x) \
1210do { \
1211 __asm__ __volatile__( \
1212 " .set push \n" \
1213 " .set noat \n" \
1214 " move $1, %0 \n" \
1215 " # mthi $1, $ac3 \n" \
1216 " .word 0x00201811 \n" \
1217 " .set pop \n" \
1218 : \
1219 : "r" (x)); \
1220} while (0)
1221
1222#define mtlo0(x) \
1223do { \
1224 __asm__ __volatile__( \
1225 " .set push \n" \
1226 " .set noat \n" \
1227 " move $1, %0 \n" \
1228 " # mtlo $1, $ac0 \n" \
1229 " .word 0x00200013 \n" \
1230 " .set pop \n" \
1231 : \
1232 : "r" (x)); \
1233} while (0)
1234
1235#define mtlo1(x) \
1236do { \
1237 __asm__ __volatile__( \
1238 " .set push \n" \
1239 " .set noat \n" \
1240 " move $1, %0 \n" \
1241 " # mtlo $1, $ac1 \n" \
1242 " .word 0x00200813 \n" \
1243 " .set pop \n" \
1244 : \
1245 : "r" (x)); \
1246} while (0)
1247
1248#define mtlo2(x) \
1249do { \
1250 __asm__ __volatile__( \
1251 " .set push \n" \
1252 " .set noat \n" \
1253 " move $1, %0 \n" \
1254 " # mtlo $1, $ac2 \n" \
1255 " .word 0x00201013 \n" \
1256 " .set pop \n" \
1257 : \
1258 : "r" (x)); \
1259} while (0)
1260
1261#define mtlo3(x) \
1262do { \
1263 __asm__ __volatile__( \
1264 " .set push \n" \
1265 " .set noat \n" \
1266 " move $1, %0 \n" \
1267 " # mtlo $1, $ac3 \n" \
1268 " .word 0x00201813 \n" \
1269 " .set pop \n" \
1270 : \
1271 : "r" (x)); \
1272} while (0)
1273
1274#endif
1275
989/* 1276/*
990 * TLB operations. 1277 * TLB operations.
991 * 1278 *
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 13:33:31 -0500