diff options
Diffstat (limited to 'include/asm-mips/mips-boards')
-rw-r--r-- | include/asm-mips/mips-boards/atlasint.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mips-boards/maltaint.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mips-boards/prom.h | 1 | ||||
-rw-r--r-- | include/asm-mips/mips-boards/seadint.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mips-boards/simint.h | 3 |
5 files changed, 11 insertions, 5 deletions
diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h index b15e4ea0b091..76add42e486e 100644 --- a/include/asm-mips/mips-boards/atlasint.h +++ b/include/asm-mips/mips-boards/atlasint.h | |||
@@ -26,10 +26,12 @@ | |||
26 | #ifndef _MIPS_ATLASINT_H | 26 | #ifndef _MIPS_ATLASINT_H |
27 | #define _MIPS_ATLASINT_H | 27 | #define _MIPS_ATLASINT_H |
28 | 28 | ||
29 | #include <irq.h> | ||
30 | |||
29 | /* | 31 | /* |
30 | * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) | 32 | * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) |
31 | */ | 33 | */ |
32 | #define MIPSCPU_INT_BASE 0 | 34 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
33 | 35 | ||
34 | /* CPU interrupt offsets */ | 36 | /* CPU interrupt offsets */ |
35 | #define MIPSCPU_INT_SW0 0 | 37 | #define MIPSCPU_INT_SW0 0 |
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h index da6cc2fbbc78..9180d6466113 100644 --- a/include/asm-mips/mips-boards/maltaint.h +++ b/include/asm-mips/mips-boards/maltaint.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #ifndef _MIPS_MALTAINT_H | 25 | #ifndef _MIPS_MALTAINT_H |
26 | #define _MIPS_MALTAINT_H | 26 | #define _MIPS_MALTAINT_H |
27 | 27 | ||
28 | #include <irq.h> | ||
29 | |||
28 | /* | 30 | /* |
29 | * Interrupts 0..15 are used for Malta ISA compatible interrupts | 31 | * Interrupts 0..15 are used for Malta ISA compatible interrupts |
30 | */ | 32 | */ |
@@ -33,7 +35,7 @@ | |||
33 | /* | 35 | /* |
34 | * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) | 36 | * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) |
35 | */ | 37 | */ |
36 | #define MIPSCPU_INT_BASE 16 | 38 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
37 | 39 | ||
38 | /* CPU interrupt offsets */ | 40 | /* CPU interrupt offsets */ |
39 | #define MIPSCPU_INT_SW0 0 | 41 | #define MIPSCPU_INT_SW0 0 |
diff --git a/include/asm-mips/mips-boards/prom.h b/include/asm-mips/mips-boards/prom.h index 4168c7fcd43e..7bf6f5f6ab9c 100644 --- a/include/asm-mips/mips-boards/prom.h +++ b/include/asm-mips/mips-boards/prom.h | |||
@@ -33,7 +33,6 @@ extern void prom_printf(char *fmt, ...); | |||
33 | extern void prom_init_cmdline(void); | 33 | extern void prom_init_cmdline(void); |
34 | extern void prom_meminit(void); | 34 | extern void prom_meminit(void); |
35 | extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); | 35 | extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); |
36 | extern unsigned long prom_free_prom_memory (void); | ||
37 | extern void mips_display_message(const char *str); | 36 | extern void mips_display_message(const char *str); |
38 | extern void mips_display_word(unsigned int num); | 37 | extern void mips_display_word(unsigned int num); |
39 | extern int get_ethernet_addr(char *ethernet_addr); | 38 | extern int get_ethernet_addr(char *ethernet_addr); |
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index 365c2a3c64f5..4f6a3933699d 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h | |||
@@ -20,10 +20,12 @@ | |||
20 | #ifndef _MIPS_SEADINT_H | 20 | #ifndef _MIPS_SEADINT_H |
21 | #define _MIPS_SEADINT_H | 21 | #define _MIPS_SEADINT_H |
22 | 22 | ||
23 | #include <irq.h> | ||
24 | |||
23 | /* | 25 | /* |
24 | * Interrupts 0..7 are used for SEAD CPU interrupts | 26 | * Interrupts 0..7 are used for SEAD CPU interrupts |
25 | */ | 27 | */ |
26 | #define MIPSCPU_INT_BASE 0 | 28 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
27 | 29 | ||
28 | #define MIPSCPU_INT_UART0 2 | 30 | #define MIPSCPU_INT_UART0 2 |
29 | #define MIPSCPU_INT_UART1 3 | 31 | #define MIPSCPU_INT_UART1 3 |
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h index 4952e0b3bf11..54f2fe621d69 100644 --- a/include/asm-mips/mips-boards/simint.h +++ b/include/asm-mips/mips-boards/simint.h | |||
@@ -17,10 +17,11 @@ | |||
17 | #ifndef _MIPS_SIMINT_H | 17 | #ifndef _MIPS_SIMINT_H |
18 | #define _MIPS_SIMINT_H | 18 | #define _MIPS_SIMINT_H |
19 | 19 | ||
20 | #include <irq.h> | ||
20 | 21 | ||
21 | #define SIM_INT_BASE 0 | 22 | #define SIM_INT_BASE 0 |
22 | #define MIPSCPU_INT_MB0 2 | 23 | #define MIPSCPU_INT_MB0 2 |
23 | #define MIPSCPU_INT_BASE 16 | 24 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
24 | #define MIPS_CPU_TIMER_IRQ 7 | 25 | #define MIPS_CPU_TIMER_IRQ 7 |
25 | 26 | ||
26 | 27 | ||