diff options
Diffstat (limited to 'include/asm-mips/mach-sibyte/cpu-feature-overrides.h')
-rw-r--r-- | include/asm-mips/mach-sibyte/cpu-feature-overrides.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h index a25968f277a2..1c1f92415b9a 100644 --- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h | |||
@@ -3,13 +3,13 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2003, 2004 Ralf Baechle | 6 | * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org) |
7 | */ | 7 | */ |
8 | #ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H | 8 | #ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H |
9 | #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H | 9 | #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H |
10 | 10 | ||
11 | /* | 11 | /* |
12 | * Sibyte are MIPS64 processors weired to a specific configuration | 12 | * Sibyte are MIPS64 processors wired to a specific configuration |
13 | */ | 13 | */ |
14 | #define cpu_has_watch 1 | 14 | #define cpu_has_watch 1 |
15 | #define cpu_has_mips16 0 | 15 | #define cpu_has_mips16 0 |
@@ -26,11 +26,18 @@ | |||
26 | #define cpu_has_dc_aliases 0 | 26 | #define cpu_has_dc_aliases 0 |
27 | #define cpu_has_ic_fills_f_dc 0 | 27 | #define cpu_has_ic_fills_f_dc 0 |
28 | #define cpu_has_dsp 0 | 28 | #define cpu_has_dsp 0 |
29 | #define cpu_has_mipsmt 0 | ||
30 | #define cpu_has_userlocal 0 | ||
29 | #define cpu_icache_snoops_remote_store 0 | 31 | #define cpu_icache_snoops_remote_store 0 |
30 | 32 | ||
31 | #define cpu_has_nofpuex 0 | 33 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 34 | #define cpu_has_64bits 1 |
33 | 35 | ||
36 | #define cpu_has_mips32r1 1 | ||
37 | #define cpu_has_mips32r2 0 | ||
38 | #define cpu_has_mips64r1 1 | ||
39 | #define cpu_has_mips64r2 0 | ||
40 | |||
34 | #define cpu_has_inclusive_pcaches 0 | 41 | #define cpu_has_inclusive_pcaches 0 |
35 | 42 | ||
36 | #define cpu_dcache_line_size() 32 | 43 | #define cpu_dcache_line_size() 32 |