diff options
Diffstat (limited to 'include/asm-mips/mach-pnx8550/cm.h')
-rw-r--r-- | include/asm-mips/mach-pnx8550/cm.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/include/asm-mips/mach-pnx8550/cm.h b/include/asm-mips/mach-pnx8550/cm.h new file mode 100644 index 000000000000..bb0a56c7d011 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/cm.h | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * | ||
3 | * BRIEF MODULE DESCRIPTION | ||
4 | * Clock module specific definitions | ||
5 | * | ||
6 | * Author: source@mvista.com | ||
7 | * | ||
8 | * This program is free software; you can distribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License (Version 2) as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
15 | * for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along | ||
18 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
20 | */ | ||
21 | |||
22 | #ifndef __PNX8550_CM_H | ||
23 | #define __PNX8550_CM_H | ||
24 | |||
25 | #define PNX8550_CM_BASE 0xBBE47000 | ||
26 | |||
27 | #define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000) | ||
28 | #define PNX8550_CM_PLL1_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x004) | ||
29 | #define PNX8550_CM_PLL2_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x008) | ||
30 | #define PNX8550_CM_PLL3_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x00C) | ||
31 | |||
32 | // Table not complete..... | ||
33 | |||
34 | #define PNX8550_CM_PLL_BLOCKED_MASK 0x80000000 | ||
35 | #define PNX8550_CM_PLL_LOCK_MASK 0x40000000 | ||
36 | #define PNX8550_CM_PLL_CURRENT_ADJ_MASK 0x3c000000 | ||
37 | #define PNX8550_CM_PLL_N_MASK 0x01ff0000 | ||
38 | #define PNX8550_CM_PLL_M_MASK 0x00003f00 | ||
39 | #define PNX8550_CM_PLL_P_MASK 0x0000000c | ||
40 | #define PNX8550_CM_PLL_PD_MASK 0x00000002 | ||
41 | |||
42 | |||
43 | #endif | ||