diff options
Diffstat (limited to 'include/asm-mips/mach-generic')
-rw-r--r-- | include/asm-mips/mach-generic/ide.h | 73 |
1 files changed, 65 insertions, 8 deletions
diff --git a/include/asm-mips/mach-generic/ide.h b/include/asm-mips/mach-generic/ide.h index cb2edd018ad6..961006948c7c 100644 --- a/include/asm-mips/mach-generic/ide.h +++ b/include/asm-mips/mach-generic/ide.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/config.h> | 18 | #include <linux/config.h> |
19 | #include <linux/pci.h> | 19 | #include <linux/pci.h> |
20 | #include <linux/stddef.h> | 20 | #include <linux/stddef.h> |
21 | #include <asm/processor.h> | ||
21 | 22 | ||
22 | #ifndef MAX_HWIFS | 23 | #ifndef MAX_HWIFS |
23 | # ifdef CONFIG_BLK_DEV_IDEPCI | 24 | # ifdef CONFIG_BLK_DEV_IDEPCI |
@@ -104,15 +105,71 @@ static __inline__ unsigned long ide_default_io_base(int index) | |||
104 | 105 | ||
105 | /* MIPS port and memory-mapped I/O string operations. */ | 106 | /* MIPS port and memory-mapped I/O string operations. */ |
106 | 107 | ||
107 | #define __ide_insw insw | 108 | static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size) |
108 | #define __ide_insl insl | 109 | { |
109 | #define __ide_outsw outsw | 110 | if (cpu_has_dc_aliases) { |
110 | #define __ide_outsl outsl | 111 | unsigned long end = addr + size; |
112 | for (; addr < end; addr += PAGE_SIZE) | ||
113 | flush_dcache_page(virt_to_page(addr)); | ||
114 | } | ||
115 | } | ||
116 | |||
117 | static inline void __ide_insw(unsigned long port, void *addr, | ||
118 | unsigned int count) | ||
119 | { | ||
120 | insw(port, addr, count); | ||
121 | __ide_flush_dcache_range((unsigned long)addr, count * 2); | ||
122 | } | ||
123 | |||
124 | static inline void __ide_insl(unsigned long port, void *addr, unsigned int count) | ||
125 | { | ||
126 | insl(port, addr, count); | ||
127 | __ide_flush_dcache_range((unsigned long)addr, count * 4); | ||
128 | } | ||
129 | |||
130 | static inline void __ide_outsw(unsigned long port, const void *addr, | ||
131 | unsigned long count) | ||
132 | { | ||
133 | outsw(port, addr, count); | ||
134 | __ide_flush_dcache_range((unsigned long)addr, count * 2); | ||
135 | } | ||
136 | |||
137 | static inline void __ide_outsl(unsigned long port, const void *addr, | ||
138 | unsigned long count) | ||
139 | { | ||
140 | outsl(port, addr, count); | ||
141 | __ide_flush_dcache_range((unsigned long)addr, count * 4); | ||
142 | } | ||
143 | |||
144 | static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count) | ||
145 | { | ||
146 | readsw(port, addr, count); | ||
147 | __ide_flush_dcache_range((unsigned long)addr, count * 2); | ||
148 | } | ||
149 | |||
150 | static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count) | ||
151 | { | ||
152 | readsl(port, addr, count); | ||
153 | __ide_flush_dcache_range((unsigned long)addr, count * 4); | ||
154 | } | ||
155 | |||
156 | static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count) | ||
157 | { | ||
158 | writesw(port, addr, count); | ||
159 | __ide_flush_dcache_range((unsigned long)addr, count * 2); | ||
160 | } | ||
161 | |||
162 | static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count) | ||
163 | { | ||
164 | writesl(port, addr, count); | ||
165 | __ide_flush_dcache_range((unsigned long)addr, count * 4); | ||
166 | } | ||
111 | 167 | ||
112 | #define __ide_mm_insw readsw | 168 | /* ide_insw calls insw, not __ide_insw. Why? */ |
113 | #define __ide_mm_insl readsl | 169 | #undef insw |
114 | #define __ide_mm_outsw writesw | 170 | #undef insl |
115 | #define __ide_mm_outsl writesl | 171 | #define insw(port, addr, count) __ide_insw(port, addr, count) |
172 | #define insl(port, addr, count) __ide_insl(port, addr, count) | ||
116 | 173 | ||
117 | #endif /* __KERNEL__ */ | 174 | #endif /* __KERNEL__ */ |
118 | 175 | ||