1 files changed, 0 insertions, 80 deletions
diff --git a/include/asm-mips/mach-excite/excite_fpga.h b/include/asm-mips/mach-excite/excite_fpga.h
deleted file mode 100644
index 0a1ef69bece7..000000000000
--- a/include/asm-mips/mach-excite/excite_fpga.h
+++ /dev/null
@@ -1,80 +0,0 @@
-#ifndef EXCITE_FPGA_H_INCLUDED
-#define EXCITE_FPGA_H_INCLUDED
-/**
- * Address alignment of the individual FPGA bytes.
- * The address arrangement of the individual bytes of the FPGA is two
- * byte aligned at the embedded MK2 platform.
- */
-#ifdef EXCITE_CCI_FPGA_MK2
-typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2)));
-#else
-typedef unsigned char excite_cci_fpga_align_t;
-#endif
-/**
- * Size of Dual Ported RAM.
- */
-#define EXCITE_DPR_SIZE 263
-/**
- * Size of Reserved Status Fields in Dual Ported RAM.
- */
-#define EXCITE_DPR_STATUS_SIZE 7
-/**
- * FPGA.
- * Hardware register layout of the FPGA interface. The FPGA must accessed
- * byte wise solely.
- * @see EXCITE_CCI_DPR_MK2
- */
-typedef struct excite_fpga {
-        /**
-         * Dual Ported RAM.
-         */
-        excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE];
-        /**
-         * Status.
-         */
-        excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE];
-#ifdef EXCITE_CCI_FPGA_MK2
-        /**
-         * RM9000 Interrupt.
-         * Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite.
-         */
-        excite_cci_fpga_align_t rm9k_int;
-#else
-        /**
-         * MK2 Interrupt.
-         * Write access initiates interrupt at the ARM processor of the MK2.
-         */
-        excite_cci_fpga_align_t mk2_int;
-        excite_cci_fpga_align_t gap[0x1000-0x10f];
-        /**
-         * IRQ Source/Acknowledge.
-         */
-        excite_cci_fpga_align_t rm9k_irq_src;
-        /**
-         * IRQ Mask.
-         * Set bits enable the related interrupt.
-         */
-        excite_cci_fpga_align_t rm9k_irq_mask;
-#endif
-} excite_fpga;
-#endif  /* ndef EXCITE_FPGA_H_INCLUDED */

diff --git a/include/asm-mips/mach-excite/excite_fpga.h b/include/asm-mips/mach-excite/excite_fpga.h deleted file mode 100644 index 0a1ef69bece7..000000000000 --- a/include/asm-mips/mach-excite/excite_fpga.h +++ /dev/null
@@ -1,80 +0,0 @@
1	#ifndef EXCITE_FPGA_H_INCLUDED
2	#define EXCITE_FPGA_H_INCLUDED
3
4
5	/**
6	* Address alignment of the individual FPGA bytes.
7	* The address arrangement of the individual bytes of the FPGA is two
8	* byte aligned at the embedded MK2 platform.
9	*/
10	#ifdef EXCITE_CCI_FPGA_MK2
11	typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2)));
12	#else
13	typedef unsigned char excite_cci_fpga_align_t;
14	#endif
15
16
17	/**
18	* Size of Dual Ported RAM.
19	*/
20	#define EXCITE_DPR_SIZE 263
21
22
23	/**
24	* Size of Reserved Status Fields in Dual Ported RAM.
25	*/
26	#define EXCITE_DPR_STATUS_SIZE 7
27
28
29
30	/**
31	* FPGA.
32	* Hardware register layout of the FPGA interface. The FPGA must accessed
33	* byte wise solely.
34	* @see EXCITE_CCI_DPR_MK2
35	*/
36	typedef struct excite_fpga {
37
38	/**
39	* Dual Ported RAM.
40	*/
41	excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE];
42
43	/**
44	* Status.
45	*/
46	excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE];
47
48	#ifdef EXCITE_CCI_FPGA_MK2
49	/**
50	* RM9000 Interrupt.
51	* Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite.
52	*/
53	excite_cci_fpga_align_t rm9k_int;
54	#else
55	/**
56	* MK2 Interrupt.
57	* Write access initiates interrupt at the ARM processor of the MK2.
58	*/
59	excite_cci_fpga_align_t mk2_int;
60
61	excite_cci_fpga_align_t gap[0x1000-0x10f];
62
63	/**
64	* IRQ Source/Acknowledge.
65	*/
66	excite_cci_fpga_align_t rm9k_irq_src;
67
68	/**
69	* IRQ Mask.
70	* Set bits enable the related interrupt.
71	*/
72	excite_cci_fpga_align_t rm9k_irq_mask;
73	#endif
74
75
76	} excite_fpga;
77
78
79
80	#endif /* ndef EXCITE_FPGA_H_INCLUDED */