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-rw-r--r--include/asm-mips/mach-ev96100/mach-gt64120.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/include/asm-mips/mach-ev96100/mach-gt64120.h b/include/asm-mips/mach-ev96100/mach-gt64120.h
new file mode 100644
index 000000000000..0ef1e6c25acf
--- /dev/null
+++ b/include/asm-mips/mach-ev96100/mach-gt64120.h
@@ -0,0 +1,46 @@
1/*
2 * This is a direct copy of the ev96100.h file, with a global
3 * search and replace. The numbers are the same.
4 *
5 * The reason I'm duplicating this is so that the 64120/96100
6 * defines won't be confusing in the source code.
7 */
8#ifndef _ASM_GT64120_EV96100_GT64120_DEP_H
9#define _ASM_GT64120_EV96100_GT64120_DEP_H
10
11/*
12 * GT96100 config space base address
13 */
14#define GT64120_BASE (KSEG1ADDR(0x14000000))
15
16/*
17 * PCI Bus allocation
18 *
19 * (Guessing ...)
20 */
21#define GT_PCI_MEM_BASE 0x12000000UL
22#define GT_PCI_MEM_SIZE 0x02000000UL
23#define GT_PCI_IO_BASE 0x10000000UL
24#define GT_PCI_IO_SIZE 0x02000000UL
25#define GT_ISA_IO_BASE PCI_IO_BASE
26
27/*
28 * Duart I/O ports.
29 */
30#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
31#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
32
33
34/*
35 * EV96100 interrupt controller register base.
36 */
37#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
38
39/*
40 * EV96100 UART register base.
41 */
42#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
43#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
44#define EV96100_BASE_BAUD ( 3686400 / 16 )
45
46#endif /* _ASM_GT64120_EV96100_GT64120_DEP_H */