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Diffstat (limited to 'include/asm-mips/mach-cobalt/cobalt.h')
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h29
1 files changed, 2 insertions, 27 deletions
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index b3c5ecbec03c..00b0fc68d5cb 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -67,34 +67,9 @@
67#define COBALT_BRD_ID_QUBE2 0x5 67#define COBALT_BRD_ID_QUBE2 0x5
68#define COBALT_BRD_ID_RAQ2 0x6 68#define COBALT_BRD_ID_RAQ2 0x6
69 69
70/*
71 * Galileo chipset access macros for the Cobalt. The base address for
72 * the GT64111 chip is 0x14000000
73 *
74 * Most of this really should go into a separate GT64111 header file.
75 */
76#define GT64111_IO_BASE 0x10000000UL
77#define GT64111_IO_END 0x11ffffffUL
78#define GT64111_MEM_BASE 0x12000000UL
79#define GT64111_MEM_END 0x13ffffffUL
80#define GT64111_BASE 0x14000000UL
81#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
82
83#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
84#define GALILEO_OUTL(val, port) \
85do { \
86 *(volatile unsigned int *) GALILEO_REG(port) = (val); \
87} while (0)
88
89#define GALILEO_INTR_T0EXP (1 << 8)
90#define GALILEO_INTR_RETRY_CTR (1 << 20)
91
92#define GALILEO_ENTC0 0x01
93#define GALILEO_SELTC0 0x02
94
95#define PCI_CFG_SET(devfn,where) \ 70#define PCI_CFG_SET(devfn,where) \
96 GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ 71 GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \
97 (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) 72 (PCI_FUNC (devfn) << 8) | (where)))
98 73
99#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) 74#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
100# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ 75# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */