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-rw-r--r--include/asm-mips/mach-au1x00/au1000.h30
-rw-r--r--include/asm-mips/mach-au1x00/au1100_mmc.h7
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_ide.h1
-rw-r--r--include/asm-mips/mach-au1x00/timex.h13
4 files changed, 21 insertions, 30 deletions
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 3bdce9126f16..cb18af989645 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -526,7 +526,7 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
526/* Au1000 */ 526/* Au1000 */
527#ifdef CONFIG_SOC_AU1000 527#ifdef CONFIG_SOC_AU1000
528enum soc_au1000_ints { 528enum soc_au1000_ints {
529 AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE, 529 AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
530 AU1000_UART0_INT = AU1000_FIRST_INT, 530 AU1000_UART0_INT = AU1000_FIRST_INT,
531 AU1000_UART1_INT, /* au1000 */ 531 AU1000_UART1_INT, /* au1000 */
532 AU1000_UART2_INT, /* au1000 */ 532 AU1000_UART2_INT, /* au1000 */
@@ -605,7 +605,7 @@ enum soc_au1000_ints {
605/* Au1500 */ 605/* Au1500 */
606#ifdef CONFIG_SOC_AU1500 606#ifdef CONFIG_SOC_AU1500
607enum soc_au1500_ints { 607enum soc_au1500_ints {
608 AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE, 608 AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
609 AU1500_UART0_INT = AU1500_FIRST_INT, 609 AU1500_UART0_INT = AU1500_FIRST_INT,
610 AU1000_PCI_INTA, /* au1500 */ 610 AU1000_PCI_INTA, /* au1500 */
611 AU1000_PCI_INTB, /* au1500 */ 611 AU1000_PCI_INTB, /* au1500 */
@@ -686,7 +686,7 @@ enum soc_au1500_ints {
686/* Au1100 */ 686/* Au1100 */
687#ifdef CONFIG_SOC_AU1100 687#ifdef CONFIG_SOC_AU1100
688enum soc_au1100_ints { 688enum soc_au1100_ints {
689 AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE, 689 AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
690 AU1100_UART0_INT, 690 AU1100_UART0_INT,
691 AU1100_UART1_INT, 691 AU1100_UART1_INT,
692 AU1100_SD_INT, 692 AU1100_SD_INT,
@@ -761,7 +761,7 @@ enum soc_au1100_ints {
761 761
762#ifdef CONFIG_SOC_AU1550 762#ifdef CONFIG_SOC_AU1550
763enum soc_au1550_ints { 763enum soc_au1550_ints {
764 AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE, 764 AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
765 AU1550_UART0_INT = AU1550_FIRST_INT, 765 AU1550_UART0_INT = AU1550_FIRST_INT,
766 AU1550_PCI_INTA, 766 AU1550_PCI_INTA,
767 AU1550_PCI_INTB, 767 AU1550_PCI_INTB,
@@ -851,7 +851,7 @@ enum soc_au1550_ints {
851 851
852#ifdef CONFIG_SOC_AU1200 852#ifdef CONFIG_SOC_AU1200
853enum soc_au1200_ints { 853enum soc_au1200_ints {
854 AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE, 854 AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
855 AU1200_UART0_INT = AU1200_FIRST_INT, 855 AU1200_UART0_INT = AU1200_FIRST_INT,
856 AU1200_SWT_INT, 856 AU1200_SWT_INT,
857 AU1200_SD_INT, 857 AU1200_SD_INT,
@@ -948,11 +948,12 @@ enum soc_au1200_ints {
948 948
949#endif /* CONFIG_SOC_AU1200 */ 949#endif /* CONFIG_SOC_AU1200 */
950 950
951#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 0) 951#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 8)
952#define AU1000_INTC0_INT_LAST (MIPS_CPU_IRQ_BASE + 31) 952#define AU1000_INTC0_INT_LAST (AU1000_INTC0_INT_BASE + 31)
953#define AU1000_INTC1_INT_BASE (MIPS_CPU_IRQ_BASE + 32) 953#define AU1000_INTC1_INT_BASE (AU1000_INTC0_INT_BASE + 32)
954#define AU1000_INTC1_INT_LAST (MIPS_CPU_IRQ_BASE + 63) 954#define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31)
955#define AU1000_MAX_INTR (MIPS_CPU_IRQ_BASE + 63) 955
956#define AU1000_MAX_INTR AU1000_INTC1_INT_LAST
956#define INTX 0xFF /* not valid */ 957#define INTX 0xFF /* not valid */
957 958
958/* Programmable Counters 0 and 1 */ 959/* Programmable Counters 0 and 1 */
@@ -1679,10 +1680,11 @@ enum soc_au1200_ints {
1679#define Au1500_PCI_MEM_START 0x440000000ULL 1680#define Au1500_PCI_MEM_START 0x440000000ULL
1680#define Au1500_PCI_MEM_END 0x44FFFFFFFULL 1681#define Au1500_PCI_MEM_END 0x44FFFFFFFULL
1681 1682
1682#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000) 1683#define PCI_IO_START 0x00001000
1683#define PCI_IO_END (Au1500_PCI_IO_END) 1684#define PCI_IO_END 0x000FFFFF
1684#define PCI_MEM_START (Au1500_PCI_MEM_START) 1685#define PCI_MEM_START 0x40000000
1685#define PCI_MEM_END (Au1500_PCI_MEM_END) 1686#define PCI_MEM_END 0x4FFFFFFF
1687
1686#define PCI_FIRST_DEVFN (0<<3) 1688#define PCI_FIRST_DEVFN (0<<3)
1687#define PCI_LAST_DEVFN (19<<3) 1689#define PCI_LAST_DEVFN (19<<3)
1688 1690
diff --git a/include/asm-mips/mach-au1x00/au1100_mmc.h b/include/asm-mips/mach-au1x00/au1100_mmc.h
index 9e7d1ba21b55..9e0028f60a43 100644
--- a/include/asm-mips/mach-au1x00/au1100_mmc.h
+++ b/include/asm-mips/mach-au1x00/au1100_mmc.h
@@ -41,8 +41,11 @@
41 41
42#define NUM_AU1100_MMC_CONTROLLERS 2 42#define NUM_AU1100_MMC_CONTROLLERS 2
43 43
44 44#if defined(CONFIG_SOC_AU1100)
45#define AU1100_SD_IRQ 2 45#define AU1100_SD_IRQ AU1100_SD_INT
46#elif defined(CONFIG_SOC_AU1200)
47#define AU1100_SD_IRQ AU1200_SD_INT
48#endif
46 49
47 50
48#define SD0_BASE 0xB0600000 51#define SD0_BASE 0xB0600000
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index aef0edbfe4c6..e4fe26c160ba 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -74,7 +74,6 @@ typedef struct
74 struct dbdma_cmd *dma_table_cpu; 74 struct dbdma_cmd *dma_table_cpu;
75 dma_addr_t dma_table_dma; 75 dma_addr_t dma_table_dma;
76#endif 76#endif
77 struct device *dev;
78 int irq; 77 int irq;
79 u32 regbase; 78 u32 regbase;
80#ifdef CONFIG_PM 79#ifdef CONFIG_PM
diff --git a/include/asm-mips/mach-au1x00/timex.h b/include/asm-mips/mach-au1x00/timex.h
deleted file mode 100644
index e3ada66cb636..000000000000
--- a/include/asm-mips/mach-au1x00/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 by Ralf Baechle
7 */
8#ifndef __ASM_MACH_AU1X00_TIMEX_H
9#define __ASM_MACH_AU1X00_TIMEX_H
10
11#define CLOCK_TICK_RATE ((HZ * 100000UL) / 2)
12
13#endif /* __ASM_MACH_AU1X00_TIMEX_H */