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-rw-r--r--include/asm-mips/jmr3927/jmr3927.h9
-rw-r--r--include/asm-mips/jmr3927/tx3927.h4
-rw-r--r--include/asm-mips/jmr3927/txx927.h37
3 files changed, 2 insertions, 48 deletions
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
index b2dc35f56181..81602c8047eb 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/jmr3927/jmr3927.h
@@ -132,9 +132,7 @@
132#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA) 132#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA)
133#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO) 133#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO)
134#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI) 134#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI)
135#define JMR3927_IRQ_IRC_TMR0 (JMR3927_IRQ_IRC + TX3927_IR_TMR0) 135#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
136#define JMR3927_IRQ_IRC_TMR1 (JMR3927_IRQ_IRC + TX3927_IR_TMR1)
137#define JMR3927_IRQ_IRC_TMR2 (JMR3927_IRQ_IRC + TX3927_IR_TMR2)
138#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA) 136#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
139#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB) 137#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
140#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC) 138#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
@@ -148,17 +146,12 @@
148#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 146#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1
149/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ 147/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
150#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 148#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3
151/* Clock Tick (10ms) */
152#define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0
153 149
154/* Clocks */ 150/* Clocks */
155#define JMR3927_CORECLK 132710400 /* 132.7MHz */ 151#define JMR3927_CORECLK 132710400 /* 132.7MHz */
156#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ 152#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */
157#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ 153#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */
158 154
159#define jmr3927_tmrptr tx3927_tmrptr(0) /* TMR0 */
160
161
162/* 155/*
163 * TX3927 Pin Configuration: 156 * TX3927 Pin Configuration:
164 * 157 *
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
index 211bcf47fffb..338f99882a39 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/jmr3927/tx3927.h
@@ -222,9 +222,7 @@ struct tx3927_ccfg_reg {
222#define TX3927_IR_DMA 8 222#define TX3927_IR_DMA 8
223#define TX3927_IR_PIO 9 223#define TX3927_IR_PIO 9
224#define TX3927_IR_PCI 10 224#define TX3927_IR_PCI 10
225#define TX3927_IR_TMR0 13 225#define TX3927_IR_TMR(ch) (13 + (ch))
226#define TX3927_IR_TMR1 14
227#define TX3927_IR_TMR2 15
228#define TX3927_NUM_IR 16 226#define TX3927_NUM_IR 16
229 227
230/* 228/*
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h
index 58a8ff6be815..0474fe8dac3f 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/jmr3927/txx927.h
@@ -10,22 +10,6 @@
10#ifndef __ASM_TXX927_H 10#ifndef __ASM_TXX927_H
11#define __ASM_TXX927_H 11#define __ASM_TXX927_H
12 12
13struct txx927_tmr_reg {
14 volatile unsigned long tcr;
15 volatile unsigned long tisr;
16 volatile unsigned long cpra;
17 volatile unsigned long cprb;
18 volatile unsigned long itmr;
19 volatile unsigned long unused0[3];
20 volatile unsigned long ccdr;
21 volatile unsigned long unused1[3];
22 volatile unsigned long pgmr;
23 volatile unsigned long unused2[3];
24 volatile unsigned long wtmr;
25 volatile unsigned long unused3[43];
26 volatile unsigned long trr;
27};
28
29struct txx927_sio_reg { 13struct txx927_sio_reg {
30 volatile unsigned long lcr; 14 volatile unsigned long lcr;
31 volatile unsigned long dicr; 15 volatile unsigned long dicr;
@@ -51,27 +35,6 @@ struct txx927_pio_reg {
51}; 35};
52 36
53/* 37/*
54 * TMR
55 */
56/* TMTCR : Timer Control */
57#define TXx927_TMTCR_TCE 0x00000080
58#define TXx927_TMTCR_CCDE 0x00000040
59#define TXx927_TMTCR_CRE 0x00000020
60#define TXx927_TMTCR_ECES 0x00000008
61#define TXx927_TMTCR_CCS 0x00000004
62#define TXx927_TMTCR_TMODE_MASK 0x00000003
63#define TXx927_TMTCR_TMODE_ITVL 0x00000000
64
65/* TMTISR : Timer Int. Status */
66#define TXx927_TMTISR_TPIBS 0x00000004
67#define TXx927_TMTISR_TPIAS 0x00000002
68#define TXx927_TMTISR_TIIS 0x00000001
69
70/* TMTITMR : Interval Timer Mode */
71#define TXx927_TMTITMR_TIIE 0x00008000
72#define TXx927_TMTITMR_TZCE 0x00000001
73
74/*
75 * SIO 38 * SIO
76 */ 39 */
77/* SILCR : Line Control */ 40/* SILCR : Line Control */