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Diffstat (limited to 'include/asm-mips/jmr3927/txx927.h')
-rw-r--r--include/asm-mips/jmr3927/txx927.h37
1 files changed, 0 insertions, 37 deletions
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h
index 58a8ff6be815..0474fe8dac3f 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/jmr3927/txx927.h
@@ -10,22 +10,6 @@
10#ifndef __ASM_TXX927_H 10#ifndef __ASM_TXX927_H
11#define __ASM_TXX927_H 11#define __ASM_TXX927_H
12 12
13struct txx927_tmr_reg {
14 volatile unsigned long tcr;
15 volatile unsigned long tisr;
16 volatile unsigned long cpra;
17 volatile unsigned long cprb;
18 volatile unsigned long itmr;
19 volatile unsigned long unused0[3];
20 volatile unsigned long ccdr;
21 volatile unsigned long unused1[3];
22 volatile unsigned long pgmr;
23 volatile unsigned long unused2[3];
24 volatile unsigned long wtmr;
25 volatile unsigned long unused3[43];
26 volatile unsigned long trr;
27};
28
29struct txx927_sio_reg { 13struct txx927_sio_reg {
30 volatile unsigned long lcr; 14 volatile unsigned long lcr;
31 volatile unsigned long dicr; 15 volatile unsigned long dicr;
@@ -51,27 +35,6 @@ struct txx927_pio_reg {
51}; 35};
52 36
53/* 37/*
54 * TMR
55 */
56/* TMTCR : Timer Control */
57#define TXx927_TMTCR_TCE 0x00000080
58#define TXx927_TMTCR_CCDE 0x00000040
59#define TXx927_TMTCR_CRE 0x00000020
60#define TXx927_TMTCR_ECES 0x00000008
61#define TXx927_TMTCR_CCS 0x00000004
62#define TXx927_TMTCR_TMODE_MASK 0x00000003
63#define TXx927_TMTCR_TMODE_ITVL 0x00000000
64
65/* TMTISR : Timer Int. Status */
66#define TXx927_TMTISR_TPIBS 0x00000004
67#define TXx927_TMTISR_TPIAS 0x00000002
68#define TXx927_TMTISR_TIIS 0x00000001
69
70/* TMTITMR : Interval Timer Mode */
71#define TXx927_TMTITMR_TIIE 0x00008000
72#define TXx927_TMTITMR_TZCE 0x00000001
73
74/*
75 * SIO 38 * SIO
76 */ 39 */
77/* SILCR : Line Control */ 40/* SILCR : Line Control */