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Diffstat (limited to 'include/asm-mips/ip32/crime.h')
-rw-r--r-- | include/asm-mips/ip32/crime.h | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h new file mode 100644 index 000000000000..152879bae20f --- /dev/null +++ b/include/asm-mips/ip32/crime.h | |||
@@ -0,0 +1,161 @@ | |||
1 | /* | ||
2 | * Definitions for the SGI CRIME (CPU, Rendering, Interconnect and Memory | ||
3 | * Engine) | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * Copyright (C) 2000 Harald Koerfgen | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_CRIME_H__ | ||
13 | #define __ASM_CRIME_H__ | ||
14 | |||
15 | /* | ||
16 | * Address map | ||
17 | */ | ||
18 | #define CRIME_BASE 0x14000000 /* physical */ | ||
19 | |||
20 | #undef BIT | ||
21 | #define BIT(x) (1UL << (x)) | ||
22 | |||
23 | struct sgi_crime { | ||
24 | volatile unsigned long id; | ||
25 | #define CRIME_ID_MASK 0xff | ||
26 | #define CRIME_ID_IDBITS 0xf0 | ||
27 | #define CRIME_ID_IDVALUE 0xa0 | ||
28 | #define CRIME_ID_REV 0x0f | ||
29 | #define CRIME_REV_PETTY 0x00 | ||
30 | #define CRIME_REV_11 0x11 | ||
31 | #define CRIME_REV_13 0x13 | ||
32 | #define CRIME_REV_14 0x14 | ||
33 | |||
34 | volatile unsigned long control; | ||
35 | #define CRIME_CONTROL_MASK 0x3fff | ||
36 | #define CRIME_CONTROL_TRITON_SYSADC 0x2000 | ||
37 | #define CRIME_CONTROL_CRIME_SYSADC 0x1000 | ||
38 | #define CRIME_CONTROL_HARD_RESET 0x0800 | ||
39 | #define CRIME_CONTROL_SOFT_RESET 0x0400 | ||
40 | #define CRIME_CONTROL_DOG_ENA 0x0200 | ||
41 | #define CRIME_CONTROL_ENDIANESS 0x0100 | ||
42 | #define CRIME_CONTROL_ENDIAN_BIG 0x0100 | ||
43 | #define CRIME_CONTROL_ENDIAN_LITTLE 0x0000 | ||
44 | #define CRIME_CONTROL_CQUEUE_HWM 0x000f | ||
45 | #define CRIME_CONTROL_CQUEUE_SHFT 0 | ||
46 | #define CRIME_CONTROL_WBUF_HWM 0x00f0 | ||
47 | #define CRIME_CONTROL_WBUF_SHFT 8 | ||
48 | |||
49 | volatile unsigned long istat; | ||
50 | volatile unsigned long imask; | ||
51 | volatile unsigned long soft_int; | ||
52 | volatile unsigned long hard_int; | ||
53 | #define MACE_VID_IN1_INT BIT(0) | ||
54 | #define MACE_VID_IN2_INT BIT(1) | ||
55 | #define MACE_VID_OUT_INT BIT(2) | ||
56 | #define MACE_ETHERNET_INT BIT(3) | ||
57 | #define MACE_SUPERIO_INT BIT(4) | ||
58 | #define MACE_MISC_INT BIT(5) | ||
59 | #define MACE_AUDIO_INT BIT(6) | ||
60 | #define MACE_PCI_BRIDGE_INT BIT(7) | ||
61 | #define MACEPCI_SCSI0_INT BIT(8) | ||
62 | #define MACEPCI_SCSI1_INT BIT(9) | ||
63 | #define MACEPCI_SLOT0_INT BIT(10) | ||
64 | #define MACEPCI_SLOT1_INT BIT(11) | ||
65 | #define MACEPCI_SLOT2_INT BIT(12) | ||
66 | #define MACEPCI_SHARED0_INT BIT(13) | ||
67 | #define MACEPCI_SHARED1_INT BIT(14) | ||
68 | #define MACEPCI_SHARED2_INT BIT(15) | ||
69 | #define CRIME_GBE0_INT BIT(16) | ||
70 | #define CRIME_GBE1_INT BIT(17) | ||
71 | #define CRIME_GBE2_INT BIT(18) | ||
72 | #define CRIME_GBE3_INT BIT(19) | ||
73 | #define CRIME_CPUERR_INT BIT(20) | ||
74 | #define CRIME_MEMERR_INT BIT(21) | ||
75 | #define CRIME_RE_EMPTY_E_INT BIT(22) | ||
76 | #define CRIME_RE_FULL_E_INT BIT(23) | ||
77 | #define CRIME_RE_IDLE_E_INT BIT(24) | ||
78 | #define CRIME_RE_EMPTY_L_INT BIT(25) | ||
79 | #define CRIME_RE_FULL_L_INT BIT(26) | ||
80 | #define CRIME_RE_IDLE_L_INT BIT(27) | ||
81 | #define CRIME_SOFT0_INT BIT(28) | ||
82 | #define CRIME_SOFT1_INT BIT(29) | ||
83 | #define CRIME_SOFT2_INT BIT(30) | ||
84 | #define CRIME_SYSCORERR_INT CRIME_SOFT2_INT | ||
85 | #define CRIME_VICE_INT BIT(31) | ||
86 | /* Masks for deciding who handles the interrupt */ | ||
87 | #define CRIME_MACE_INT_MASK 0x8f | ||
88 | #define CRIME_MACEISA_INT_MASK 0x70 | ||
89 | #define CRIME_MACEPCI_INT_MASK 0xff00 | ||
90 | #define CRIME_CRIME_INT_MASK 0xffff0000 | ||
91 | |||
92 | volatile unsigned long watchdog; | ||
93 | #define CRIME_DOG_POWER_ON_RESET 0x00010000 | ||
94 | #define CRIME_DOG_WARM_RESET 0x00080000 | ||
95 | #define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET) | ||
96 | #define CRIME_DOG_VALUE 0x00007fff | ||
97 | |||
98 | volatile unsigned long timer; | ||
99 | #define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */ | ||
100 | #define CRIME_NS_PER_TICK 15 /* for delay_calibrate */ | ||
101 | |||
102 | volatile unsigned long cpu_error_addr; | ||
103 | #define CRIME_CPU_ERROR_ADDR_MASK 0x3ffffffff | ||
104 | |||
105 | volatile unsigned long cpu_error_stat; | ||
106 | #define CRIME_CPU_ERROR_MASK 0x7 /* cpu error stat is 3 bits */ | ||
107 | #define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4 | ||
108 | #define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2 | ||
109 | #define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1 | ||
110 | |||
111 | unsigned long _pad0[54]; | ||
112 | |||
113 | volatile unsigned long mc_ctrl; | ||
114 | volatile unsigned long bank_ctrl[8]; | ||
115 | #define CRIME_MEM_BANK_CONTROL_MASK 0x11f /* 9 bits 7:5 reserved */ | ||
116 | #define CRIME_MEM_BANK_CONTROL_ADDR 0x01f | ||
117 | #define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100 | ||
118 | #define CRIME_MAXBANKS 8 | ||
119 | |||
120 | volatile unsigned long mem_ref_counter; | ||
121 | #define CRIME_MEM_REF_COUNTER_MASK 0x3ff /* 10bit */ | ||
122 | |||
123 | volatile unsigned long mem_error_stat; | ||
124 | #define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */ | ||
125 | #define CRIME_MEM_ERROR_MACE_ID 0x0000007f | ||
126 | #define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080 | ||
127 | #define CRIME_MEM_ERROR_RE_ID 0x00007f00 | ||
128 | #define CRIME_MEM_ERROR_RE_ACCESS 0x00008000 | ||
129 | #define CRIME_MEM_ERROR_GBE_ACCESS 0x00010000 | ||
130 | #define CRIME_MEM_ERROR_VICE_ACCESS 0x00020000 | ||
131 | #define CRIME_MEM_ERROR_CPU_ACCESS 0x00040000 | ||
132 | #define CRIME_MEM_ERROR_RESERVED 0x00080000 | ||
133 | #define CRIME_MEM_ERROR_SOFT_ERR 0x00100000 | ||
134 | #define CRIME_MEM_ERROR_HARD_ERR 0x00200000 | ||
135 | #define CRIME_MEM_ERROR_MULTIPLE 0x00400000 | ||
136 | #define CRIME_MEM_ERROR_ECC 0x01800000 | ||
137 | #define CRIME_MEM_ERROR_MEM_ECC_RD 0x00800000 | ||
138 | #define CRIME_MEM_ERROR_MEM_ECC_RMW 0x01000000 | ||
139 | #define CRIME_MEM_ERROR_INV 0x0e000000 | ||
140 | #define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000 | ||
141 | #define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000 | ||
142 | #define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000 | ||
143 | |||
144 | volatile unsigned long mem_error_addr; | ||
145 | #define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff | ||
146 | |||
147 | volatile unsigned long mem_ecc_syn; | ||
148 | #define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff | ||
149 | |||
150 | volatile unsigned long mem_ecc_chk; | ||
151 | #define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff | ||
152 | |||
153 | volatile unsigned long mem_ecc_repl; | ||
154 | #define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff | ||
155 | }; | ||
156 | |||
157 | extern struct sgi_crime *crime; | ||
158 | |||
159 | #define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */ | ||
160 | |||
161 | #endif /* __ASM_CRIME_H__ */ | ||