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-rw-r--r--include/asm-mips/io.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 5a4c8a54b8f4..8c011aa61afa 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -283,6 +283,24 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
283 __ioremap_mode((offset), (size), _CACHE_UNCACHED) 283 __ioremap_mode((offset), (size), _CACHE_UNCACHED)
284 284
285/* 285/*
286 * ioremap_cachable - map bus memory into CPU space
287 * @offset: bus address of the memory
288 * @size: size of the resource to map
289 *
290 * ioremap_nocache performs a platform specific sequence of operations to
291 * make bus memory CPU accessible via the readb/readw/readl/writeb/
292 * writew/writel functions and the other mmio helpers. The returned
293 * address is not guaranteed to be usable directly as a virtual
294 * address.
295 *
296 * This version of ioremap ensures that the memory is marked cachable by
297 * the CPU. Also enables full write-combining. Useful for some
298 * memory-like regions on I/O busses.
299 */
300#define ioremap_cachable(offset, size) \
301 __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT)
302
303/*
286 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow 304 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
287 * requests a cachable mapping, ioremap_uncached_accelerated requests a 305 * requests a cachable mapping, ioremap_uncached_accelerated requests a
288 * mapping using the uncached accelerated mode which isn't supported on 306 * mapping using the uncached accelerated mode which isn't supported on