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-rw-r--r--include/asm-mips/elf.h371
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diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Much of this is taken from binutils and GNU libc ...
7 */
8#ifndef _ASM_ELF_H
9#define _ASM_ELF_H
10
11
12/* ELF header e_flags defines. */
13/* MIPS architecture level. */
14#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
15#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
16#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
17#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
18#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
19#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
20#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
21#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
22#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
23
24/* The ABI of a file. */
25#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
26#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
27
28#define PT_MIPS_REGINFO 0x70000000
29#define PT_MIPS_RTPROC 0x70000001
30#define PT_MIPS_OPTIONS 0x70000002
31
32/* Flags in the e_flags field of the header */
33#define EF_MIPS_NOREORDER 0x00000001
34#define EF_MIPS_PIC 0x00000002
35#define EF_MIPS_CPIC 0x00000004
36#define EF_MIPS_ABI2 0x00000020
37#define EF_MIPS_OPTIONS_FIRST 0x00000080
38#define EF_MIPS_32BITMODE 0x00000100
39#define EF_MIPS_ABI 0x0000f000
40#define EF_MIPS_ARCH 0xf0000000
41
42#define DT_MIPS_RLD_VERSION 0x70000001
43#define DT_MIPS_TIME_STAMP 0x70000002
44#define DT_MIPS_ICHECKSUM 0x70000003
45#define DT_MIPS_IVERSION 0x70000004
46#define DT_MIPS_FLAGS 0x70000005
47 #define RHF_NONE 0x00000000
48 #define RHF_HARDWAY 0x00000001
49 #define RHF_NOTPOT 0x00000002
50 #define RHF_SGI_ONLY 0x00000010
51#define DT_MIPS_BASE_ADDRESS 0x70000006
52#define DT_MIPS_CONFLICT 0x70000008
53#define DT_MIPS_LIBLIST 0x70000009
54#define DT_MIPS_LOCAL_GOTNO 0x7000000a
55#define DT_MIPS_CONFLICTNO 0x7000000b
56#define DT_MIPS_LIBLISTNO 0x70000010
57#define DT_MIPS_SYMTABNO 0x70000011
58#define DT_MIPS_UNREFEXTNO 0x70000012
59#define DT_MIPS_GOTSYM 0x70000013
60#define DT_MIPS_HIPAGENO 0x70000014
61#define DT_MIPS_RLD_MAP 0x70000016
62
63#define R_MIPS_NONE 0
64#define R_MIPS_16 1
65#define R_MIPS_32 2
66#define R_MIPS_REL32 3
67#define R_MIPS_26 4
68#define R_MIPS_HI16 5
69#define R_MIPS_LO16 6
70#define R_MIPS_GPREL16 7
71#define R_MIPS_LITERAL 8
72#define R_MIPS_GOT16 9
73#define R_MIPS_PC16 10
74#define R_MIPS_CALL16 11
75#define R_MIPS_GPREL32 12
76/* The remaining relocs are defined on Irix, although they are not
77 in the MIPS ELF ABI. */
78#define R_MIPS_UNUSED1 13
79#define R_MIPS_UNUSED2 14
80#define R_MIPS_UNUSED3 15
81#define R_MIPS_SHIFT5 16
82#define R_MIPS_SHIFT6 17
83#define R_MIPS_64 18
84#define R_MIPS_GOT_DISP 19
85#define R_MIPS_GOT_PAGE 20
86#define R_MIPS_GOT_OFST 21
87/*
88 * The following two relocation types are specified in the MIPS ABI
89 * conformance guide version 1.2 but not yet in the psABI.
90 */
91#define R_MIPS_GOTHI16 22
92#define R_MIPS_GOTLO16 23
93#define R_MIPS_SUB 24
94#define R_MIPS_INSERT_A 25
95#define R_MIPS_INSERT_B 26
96#define R_MIPS_DELETE 27
97#define R_MIPS_HIGHER 28
98#define R_MIPS_HIGHEST 29
99/*
100 * The following two relocation types are specified in the MIPS ABI
101 * conformance guide version 1.2 but not yet in the psABI.
102 */
103#define R_MIPS_CALLHI16 30
104#define R_MIPS_CALLLO16 31
105/*
106 * This range is reserved for vendor specific relocations.
107 */
108#define R_MIPS_LOVENDOR 100
109#define R_MIPS_HIVENDOR 127
110
111#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
112#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
113#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
114#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
115#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
116
117#define SHT_MIPS_LIST 0x70000000
118#define SHT_MIPS_CONFLICT 0x70000002
119#define SHT_MIPS_GPTAB 0x70000003
120#define SHT_MIPS_UCODE 0x70000004
121#define SHT_MIPS_DEBUG 0x70000005
122#define SHT_MIPS_REGINFO 0x70000006
123#define SHT_MIPS_PACKAGE 0x70000007
124#define SHT_MIPS_PACKSYM 0x70000008
125#define SHT_MIPS_RELD 0x70000009
126#define SHT_MIPS_IFACE 0x7000000b
127#define SHT_MIPS_CONTENT 0x7000000c
128#define SHT_MIPS_OPTIONS 0x7000000d
129#define SHT_MIPS_SHDR 0x70000010
130#define SHT_MIPS_FDESC 0x70000011
131#define SHT_MIPS_EXTSYM 0x70000012
132#define SHT_MIPS_DENSE 0x70000013
133#define SHT_MIPS_PDESC 0x70000014
134#define SHT_MIPS_LOCSYM 0x70000015
135#define SHT_MIPS_AUXSYM 0x70000016
136#define SHT_MIPS_OPTSYM 0x70000017
137#define SHT_MIPS_LOCSTR 0x70000018
138#define SHT_MIPS_LINE 0x70000019
139#define SHT_MIPS_RFDESC 0x7000001a
140#define SHT_MIPS_DELTASYM 0x7000001b
141#define SHT_MIPS_DELTAINST 0x7000001c
142#define SHT_MIPS_DELTACLASS 0x7000001d
143#define SHT_MIPS_DWARF 0x7000001e
144#define SHT_MIPS_DELTADECL 0x7000001f
145#define SHT_MIPS_SYMBOL_LIB 0x70000020
146#define SHT_MIPS_EVENTS 0x70000021
147#define SHT_MIPS_TRANSLATE 0x70000022
148#define SHT_MIPS_PIXIE 0x70000023
149#define SHT_MIPS_XLATE 0x70000024
150#define SHT_MIPS_XLATE_DEBUG 0x70000025
151#define SHT_MIPS_WHIRL 0x70000026
152#define SHT_MIPS_EH_REGION 0x70000027
153#define SHT_MIPS_XLATE_OLD 0x70000028
154#define SHT_MIPS_PDR_EXCEPTION 0x70000029
155
156#define SHF_MIPS_GPREL 0x10000000
157#define SHF_MIPS_MERGE 0x20000000
158#define SHF_MIPS_ADDR 0x40000000
159#define SHF_MIPS_STRING 0x80000000
160#define SHF_MIPS_NOSTRIP 0x08000000
161#define SHF_MIPS_LOCAL 0x04000000
162#define SHF_MIPS_NAMES 0x02000000
163#define SHF_MIPS_NODUPES 0x01000000
164
165#ifndef ELF_ARCH
166/* ELF register definitions */
167#define ELF_NGREG 45
168#define ELF_NFPREG 33
169
170typedef unsigned long elf_greg_t;
171typedef elf_greg_t elf_gregset_t[ELF_NGREG];
172
173typedef double elf_fpreg_t;
174typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
175
176#ifdef CONFIG_32BIT
177
178/*
179 * This is used to ensure we don't load something for the wrong architecture.
180 */
181#define elf_check_arch(hdr) \
182({ \
183 int __res = 1; \
184 struct elfhdr *__h = (hdr); \
185 \
186 if (__h->e_machine != EM_MIPS) \
187 __res = 0; \
188 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
189 __res = 0; \
190 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
191 __res = 0; \
192 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
193 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
194 __res = 0; \
195 \
196 __res; \
197})
198
199/*
200 * These are used to set parameters in the core dumps.
201 */
202#define ELF_CLASS ELFCLASS32
203
204#endif /* CONFIG_32BIT */
205
206#ifdef CONFIG_64BIT
207/*
208 * This is used to ensure we don't load something for the wrong architecture.
209 */
210#define elf_check_arch(hdr) \
211({ \
212 int __res = 1; \
213 struct elfhdr *__h = (hdr); \
214 \
215 if (__h->e_machine != EM_MIPS) \
216 __res = 0; \
217 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
218 __res = 0; \
219 \
220 __res; \
221})
222
223/*
224 * These are used to set parameters in the core dumps.
225 */
226#define ELF_CLASS ELFCLASS64
227
228#endif /* CONFIG_64BIT */
229
230/*
231 * These are used to set parameters in the core dumps.
232 */
233#ifdef __MIPSEB__
234#define ELF_DATA ELFDATA2MSB
235#elif __MIPSEL__
236#define ELF_DATA ELFDATA2LSB
237#endif
238#define ELF_ARCH EM_MIPS
239
240#endif /* !defined(ELF_ARCH) */
241
242struct mips_abi;
243
244extern struct mips_abi mips_abi;
245extern struct mips_abi mips_abi_32;
246extern struct mips_abi mips_abi_n32;
247
248#ifdef CONFIG_32BIT
249
250#define SET_PERSONALITY(ex, ibcs2) \
251do { \
252 if (ibcs2) \
253 set_personality(PER_SVR4); \
254 set_personality(PER_LINUX); \
255 \
256 current->thread.abi = &mips_abi; \
257} while (0)
258
259#endif /* CONFIG_32BIT */
260
261#ifdef CONFIG_64BIT
262
263#ifdef CONFIG_MIPS32_N32
264#define __SET_PERSONALITY32_N32() \
265 do { \
266 set_thread_flag(TIF_32BIT_ADDR); \
267 current->thread.abi = &mips_abi_n32; \
268 } while (0)
269#else
270#define __SET_PERSONALITY32_N32() \
271 do { } while (0)
272#endif
273
274#ifdef CONFIG_MIPS32_O32
275#define __SET_PERSONALITY32_O32() \
276 do { \
277 set_thread_flag(TIF_32BIT_REGS); \
278 set_thread_flag(TIF_32BIT_ADDR); \
279 current->thread.abi = &mips_abi_32; \
280 } while (0)
281#else
282#define __SET_PERSONALITY32_O32() \
283 do { } while (0)
284#endif
285
286#ifdef CONFIG_MIPS32_COMPAT
287#define __SET_PERSONALITY32(ex) \
288do { \
289 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
290 ((ex).e_flags & EF_MIPS_ABI) == 0) \
291 __SET_PERSONALITY32_N32(); \
292 else \
293 __SET_PERSONALITY32_O32(); \
294} while (0)
295#else
296#define __SET_PERSONALITY32(ex) do { } while (0)
297#endif
298
299#define SET_PERSONALITY(ex, ibcs2) \
300do { \
301 clear_thread_flag(TIF_32BIT_REGS); \
302 clear_thread_flag(TIF_32BIT_ADDR); \
303 \
304 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
305 __SET_PERSONALITY32(ex); \
306 else \
307 current->thread.abi = &mips_abi; \
308 \
309 if (ibcs2) \
310 set_personality(PER_SVR4); \
311 else if (current->personality != PER_LINUX32) \
312 set_personality(PER_LINUX); \
313} while (0)
314
315#endif /* CONFIG_64BIT */
316
317struct task_struct;
318
319extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
320extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
321extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
322
323#define ELF_CORE_COPY_REGS(elf_regs, regs) \
324 elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
325#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
326#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
327 dump_task_fpu(tsk, elf_fpregs)
328
329#define USE_ELF_CORE_DUMP
330#define ELF_EXEC_PAGESIZE PAGE_SIZE
331
332/* This yields a mask that user programs can use to figure out what
333 instruction set this cpu supports. This could be done in userspace,
334 but it's not easy, and we've already done it here. */
335
336#define ELF_HWCAP (0)
337
338/* This yields a string that ld.so will use to load implementation
339 specific libraries for optimization. This is more specific in
340 intent than poking at uname or /proc/cpuinfo.
341
342 For the moment, we have only optimizations for the Intel generations,
343 but that could change... */
344
345#define ELF_PLATFORM (NULL)
346
347/*
348 * See comments in asm-alpha/elf.h, this is the same thing
349 * on the MIPS.
350 */
351#define ELF_PLAT_INIT(_r, load_addr) do { \
352 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
353 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
354 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
355 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
356 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
357 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
358 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
359 _r->regs[30] = _r->regs[31] = 0; \
360} while (0)
361
362/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
363 use of this is to invoke "./ld.so someprog" to test out a new version of
364 the loader. We need to make sure that it is out of the way of the program
365 that it will "exec", and that there is sufficient room for the brk. */
366
367#ifndef ELF_ET_DYN_BASE
368#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
369#endif
370
371#endif /* _ASM_ELF_H */
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