aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-mips/dec/kn02.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-mips/dec/kn02.h')
-rw-r--r--include/asm-mips/dec/kn02.h33
1 files changed, 10 insertions, 23 deletions
diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h
index f797f7045920..8319ad77b250 100644
--- a/include/asm-mips/dec/kn02.h
+++ b/include/asm-mips/dec/kn02.h
@@ -8,21 +8,12 @@
8 * 8 *
9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
10 * are by courtesy of Chris Fraser. 10 * are by courtesy of Chris Fraser.
11 * Copyright (C) 2002, 2003 Maciej W. Rozycki 11 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
12 */ 12 */
13#ifndef __ASM_MIPS_DEC_KN02_H 13#ifndef __ASM_MIPS_DEC_KN02_H
14#define __ASM_MIPS_DEC_KN02_H 14#define __ASM_MIPS_DEC_KN02_H
15 15
16#ifndef __ASSEMBLY__ 16#define KN02_SLOT_BASE 0x1fc00000
17#include <linux/spinlock.h>
18#include <linux/types.h>
19#endif
20
21#include <asm/addrspace.h>
22#include <asm/dec/ecc.h>
23
24
25#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000)
26#define KN02_SLOT_SIZE 0x00080000 17#define KN02_SLOT_SIZE 0x00080000
27 18
28/* 19/*
@@ -39,22 +30,14 @@
39 30
40 31
41/* 32/*
42 * Some port addresses...
43 */
44#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */
45#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */
46#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */
47
48
49/*
50 * System Control & Status Register bits. 33 * System Control & Status Register bits.
51 */ 34 */
52#define KN02_CSR_RES_28 (0xf<<28) /* unused */ 35#define KN02_CSR_RES_28 (0xf<<28) /* unused */
53#define KN02_CSR_PSU (1<<27) /* power supply unit warning */ 36#define KN02_CSR_PSU (1<<27) /* power supply unit warning */
54#define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */ 37#define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */
55#define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */ 38#define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */
56#define KN03_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */ 39#define KN02_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */
57#define KN03_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */ 40#define KN02_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */
58#define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */ 41#define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
59#define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */ 42#define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
60#define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */ 43#define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */
@@ -63,8 +46,8 @@
63#define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */ 46#define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */
64#define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */ 47#define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */
65#define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */ 48#define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */
66#define KN03_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */ 49#define KN02_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */
67#define KN03_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 50#define KN02_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
68 51
69 52
70/* 53/*
@@ -98,6 +81,10 @@
98 81
99 82
100#ifndef __ASSEMBLY__ 83#ifndef __ASSEMBLY__
84
85#include <linux/spinlock.h>
86#include <linux/types.h>
87
101extern u32 cached_kn02_csr; 88extern u32 cached_kn02_csr;
102extern spinlock_t kn02_lock; 89extern spinlock_t kn02_lock;
103extern void init_kn02_irqs(int base); 90extern void init_kn02_irqs(int base);