diff options
Diffstat (limited to 'include/asm-mips/cpu.h')
-rw-r--r-- | include/asm-mips/cpu.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 8e167bfd40b1..a4f85a279c52 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h | |||
@@ -3,6 +3,7 @@ | |||
3 | * various MIPS cpu types. | 3 | * various MIPS cpu types. |
4 | * | 4 | * |
5 | * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) | 5 | * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) |
6 | * Copyright (C) 2004 Maciej W. Rozycki | ||
6 | */ | 7 | */ |
7 | #ifndef _ASM_CPU_H | 8 | #ifndef _ASM_CPU_H |
8 | #define _ASM_CPU_H | 9 | #define _ASM_CPU_H |
@@ -213,7 +214,6 @@ | |||
213 | #define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */ | 214 | #define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */ |
214 | #define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */ | 215 | #define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */ |
215 | #define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */ | 216 | #define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */ |
216 | #define MIPS_CPU_MIPS16 0x00000100 /* code compression */ | ||
217 | #define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */ | 217 | #define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */ |
218 | #define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */ | 218 | #define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */ |
219 | #define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */ | 219 | #define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */ |
@@ -225,4 +225,12 @@ | |||
225 | #define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */ | 225 | #define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */ |
226 | #define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */ | 226 | #define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */ |
227 | 227 | ||
228 | /* | ||
229 | * CPU ASE encodings | ||
230 | */ | ||
231 | #define MIPS_ASE_MIPS16 0x00000001 /* code compression */ | ||
232 | #define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */ | ||
233 | #define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */ | ||
234 | #define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */ | ||
235 | |||
228 | #endif /* _ASM_CPU_H */ | 236 | #endif /* _ASM_CPU_H */ |