diff options
Diffstat (limited to 'include/asm-mips/cpu.h')
-rw-r--r-- | include/asm-mips/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index dff2a0a52f8f..d38fdbf845b2 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h | |||
@@ -242,7 +242,7 @@ | |||
242 | #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ | 242 | #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ |
243 | #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ | 243 | #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ |
244 | #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ | 244 | #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ |
245 | #define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */ | 245 | #define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */ |
246 | #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ | 246 | #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ |
247 | #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ | 247 | #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ |
248 | #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ | 248 | #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ |