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-rw-r--r--include/asm-mips/cpu-info.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 94f1c8172360..ed5c02c6afbb 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -54,6 +54,7 @@ struct cpuinfo_mips {
54 struct cache_desc dcache; /* Primary D or combined I/D cache */ 54 struct cache_desc dcache; /* Primary D or combined I/D cache */
55 struct cache_desc scache; /* Secondary cache */ 55 struct cache_desc scache; /* Secondary cache */
56 struct cache_desc tcache; /* Tertiary/split secondary cache */ 56 struct cache_desc tcache; /* Tertiary/split secondary cache */
57 int srsets; /* Shadow register sets */
57#if defined(CONFIG_MIPS_MT_SMTC) 58#if defined(CONFIG_MIPS_MT_SMTC)
58 /* 59 /*
59 * In the MIPS MT "SMTC" model, each TC is considered 60 * In the MIPS MT "SMTC" model, each TC is considered