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-rw-r--r--include/asm-mips/cpu-features.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 012deda63e68..4930824a43aa 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -105,6 +105,10 @@
105#endif 105#endif
106#endif 106#endif
107 107
108#ifndef cpu_has_dsp
109#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
110#endif
111
108/* 112/*
109 * Certain CPUs may throw bizarre exceptions if not the whole cacheline 113 * Certain CPUs may throw bizarre exceptions if not the whole cacheline
110 * contains valid instructions. For these we ensure proper alignment of 114 * contains valid instructions. For these we ensure proper alignment of