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-rw-r--r--include/asm-m68knommu/anchor.h4
-rw-r--r--include/asm-m68knommu/asm-offsets.h49
-rw-r--r--include/asm-m68knommu/atomic.h16
-rw-r--r--include/asm-m68knommu/cacheflush.h4
-rw-r--r--include/asm-m68knommu/coldfire.h10
-rw-r--r--include/asm-m68knommu/delay.h4
-rw-r--r--include/asm-m68knommu/ide.h444
-rw-r--r--include/asm-m68knommu/io.h8
-rw-r--r--include/asm-m68knommu/irq.h31
-rw-r--r--include/asm-m68knommu/irqnode.h36
-rw-r--r--include/asm-m68knommu/m520xsim.h54
-rw-r--r--include/asm-m68knommu/mcfcache.h14
-rw-r--r--include/asm-m68knommu/mcfne.h18
-rw-r--r--include/asm-m68knommu/mcfpit.h8
-rw-r--r--include/asm-m68knommu/mcfsim.h15
-rw-r--r--include/asm-m68knommu/mcfuart.h4
-rw-r--r--include/asm-m68knommu/mcfwdebug.h2
-rw-r--r--include/asm-m68knommu/mmu_context.h4
-rw-r--r--include/asm-m68knommu/processor.h4
-rw-r--r--include/asm-m68knommu/semaphore.h13
-rw-r--r--include/asm-m68knommu/system.h13
-rw-r--r--include/asm-m68knommu/tlbflush.h4
-rw-r--r--include/asm-m68knommu/unistd.h1
23 files changed, 195 insertions, 565 deletions
diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h
index 75390e0b40c9..871c0d5cfc3d 100644
--- a/include/asm-m68knommu/anchor.h
+++ b/include/asm-m68knommu/anchor.h
@@ -14,7 +14,7 @@
14/* 14/*
15 * Define basic addressing info. 15 * Define basic addressing info.
16 */ 16 */
17#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 17#if defined(CONFIG_M5407C3)
18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ 18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */
19#define COMEM_IRQ 25 /* IRQ of anchor part */ 19#define COMEM_IRQ 25 /* IRQ of anchor part */
20#else 20#else
@@ -96,7 +96,7 @@
96 * The PCI bus will be limited in what slots will actually be used. 96 * The PCI bus will be limited in what slots will actually be used.
97 * Define valid device numbers for different boards. 97 * Define valid device numbers for different boards.
98 */ 98 */
99#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 99#if defined(CONFIG_M5407C3)
100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */ 100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */
101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ 101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */
102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ 102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */
diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h
deleted file mode 100644
index 825f6e210f19..000000000000
--- a/include/asm-m68knommu/asm-offsets.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef __ASM_OFFSETS_H__
2#define __ASM_OFFSETS_H__
3/*
4 * DO NOT MODIFY.
5 *
6 * This file was generated by arch/m68knommu/Makefile
7 *
8 */
9
10#define TASK_STATE 0 /* offsetof(struct task_struct, state) */
11#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */
12#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */
13#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */
14#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */
15#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */
16#define TASK_MM 92 /* offsetof(struct task_struct, mm) */
17#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */
18#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */
19#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */
20#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */
21#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */
22#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */
23#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */
24#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */
25#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */
26#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */
27#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */
28#define PT_D0 32 /* offsetof(struct pt_regs, d0) */
29#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */
30#define PT_D1 0 /* offsetof(struct pt_regs, d1) */
31#define PT_D2 4 /* offsetof(struct pt_regs, d2) */
32#define PT_D3 8 /* offsetof(struct pt_regs, d3) */
33#define PT_D4 12 /* offsetof(struct pt_regs, d4) */
34#define PT_D5 16 /* offsetof(struct pt_regs, d5) */
35#define PT_A0 20 /* offsetof(struct pt_regs, a0) */
36#define PT_A1 24 /* offsetof(struct pt_regs, a1) */
37#define PT_A2 28 /* offsetof(struct pt_regs, a2) */
38#define PT_PC 48 /* offsetof(struct pt_regs, pc) */
39#define PT_SR 46 /* offsetof(struct pt_regs, sr) */
40#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */
41#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */
42#define SIGSEGV 11 /* SIGSEGV */
43#define SEGV_MAPERR 196609 /* SEGV_MAPERR */
44#define SIGTRAP 5 /* SIGTRAP */
45#define TRAP_TRACE 196610 /* TRAP_TRACE */
46#define PT_PTRACED 1 /* PT_PTRACED */
47#define PT_DTRACE 2 /* PT_DTRACE */
48
49#endif
diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h
index b1957fba083b..3c1cc153c415 100644
--- a/include/asm-m68knommu/atomic.h
+++ b/include/asm-m68knommu/atomic.h
@@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
100#define smp_mb__before_atomic_inc() barrier() 100#define smp_mb__before_atomic_inc() barrier()
101#define smp_mb__after_atomic_inc() barrier() 101#define smp_mb__after_atomic_inc() barrier()
102 102
103extern __inline__ int atomic_add_return(int i, atomic_t * v) 103static inline int atomic_add_return(int i, atomic_t * v)
104{ 104{
105 unsigned long temp, flags; 105 unsigned long temp, flags;
106 106
@@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
115 115
116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
117 117
118extern __inline__ int atomic_sub_return(int i, atomic_t * v) 118static inline int atomic_sub_return(int i, atomic_t * v)
119{ 119{
120 unsigned long temp, flags; 120 unsigned long temp, flags;
121 121
@@ -128,6 +128,18 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v)
128 return temp; 128 return temp;
129} 129}
130 130
131#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
132
133#define atomic_add_unless(v, a, u) \
134({ \
135 int c, old; \
136 c = atomic_read(v); \
137 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
138 c = old; \
139 c != (u); \
140})
141#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
142
131#define atomic_dec_return(v) atomic_sub_return(1,(v)) 143#define atomic_dec_return(v) atomic_sub_return(1,(v))
132#define atomic_inc_return(v) atomic_add_return(1,(v)) 144#define atomic_inc_return(v) atomic_add_return(1,(v))
133 145
diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h
index 026bbc9565b4..49925e91e89c 100644
--- a/include/asm-m68knommu/cacheflush.h
+++ b/include/asm-m68knommu/cacheflush.h
@@ -25,7 +25,7 @@
25#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 25#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
26 memcpy(dst, src, len) 26 memcpy(dst, src, len)
27 27
28extern inline void __flush_cache_all(void) 28static inline void __flush_cache_all(void)
29{ 29{
30#ifdef CONFIG_M5407 30#ifdef CONFIG_M5407
31 /* 31 /*
@@ -64,7 +64,7 @@ extern inline void __flush_cache_all(void)
64 "nop\n\t" 64 "nop\n\t"
65 : : : "d0" ); 65 : : : "d0" );
66#endif /* CONFIG_M5272 */ 66#endif /* CONFIG_M5272 */
67#if CONFIG_M5249 67#ifdef CONFIG_M5249
68 __asm__ __volatile__ ( 68 __asm__ __volatile__ (
69 "movel #0xa1000200, %%d0\n\t" 69 "movel #0xa1000200, %%d0\n\t"
70 "movec %%d0, %%CACR\n\t" 70 "movec %%d0, %%CACR\n\t"
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 1df3f666a28e..6190f77b1e6c 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -20,9 +20,14 @@
20 */ 20 */
21#define MCF_MBAR 0x10000000 21#define MCF_MBAR 0x10000000
22#define MCF_MBAR2 0x80000000 22#define MCF_MBAR2 0x80000000
23#if defined(CONFIG_M520x)
24#define MCF_IPSBAR 0xFC000000
25#else
23#define MCF_IPSBAR 0x40000000 26#define MCF_IPSBAR 0x40000000
27#endif
24 28
25#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) 29#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
30 defined(CONFIG_M520x)
26#undef MCF_MBAR 31#undef MCF_MBAR
27#define MCF_MBAR MCF_IPSBAR 32#define MCF_MBAR MCF_IPSBAR
28#endif 33#endif
@@ -78,7 +83,8 @@
78 * One some ColdFire family members the bus clock (used by internal 83 * One some ColdFire family members the bus clock (used by internal
79 * peripherals) is not the same as the CPU clock. 84 * peripherals) is not the same as the CPU clock.
80 */ 85 */
81#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) 86#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
87 defined(CONFIG_M520x)
82#define MCF_BUSCLK (MCF_CLK / 2) 88#define MCF_BUSCLK (MCF_CLK / 2)
83#else 89#else
84#define MCF_BUSCLK MCF_CLK 90#define MCF_BUSCLK MCF_CLK
diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h
index e3a976254672..04a20fd051cf 100644
--- a/include/asm-m68knommu/delay.h
+++ b/include/asm-m68knommu/delay.h
@@ -8,7 +8,7 @@
8 8
9#include <asm/param.h> 9#include <asm/param.h>
10 10
11extern __inline__ void __delay(unsigned long loops) 11static inline void __delay(unsigned long loops)
12{ 12{
13#if defined(CONFIG_COLDFIRE) 13#if defined(CONFIG_COLDFIRE)
14 /* The coldfire runs this loop at significantly different speeds 14 /* The coldfire runs this loop at significantly different speeds
@@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops)
48 48
49extern unsigned long loops_per_jiffy; 49extern unsigned long loops_per_jiffy;
50 50
51extern __inline__ void _udelay(unsigned long usecs) 51static inline void _udelay(unsigned long usecs)
52{ 52{
53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ 53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \
54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ 54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \
diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h
deleted file mode 100644
index b1cbf8bb9232..000000000000
--- a/include/asm-m68knommu/ide.h
+++ /dev/null
@@ -1,444 +0,0 @@
1/****************************************************************************/
2/*
3 * linux/include/asm-m68knommu/ide.h
4 *
5 * Copyright (C) 1994-1996 Linus Torvalds & authors
6 * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
7 */
8/****************************************************************************/
9#ifndef _M68KNOMMU_IDE_H
10#define _M68KNOMMU_IDE_H
11
12#ifdef __KERNEL__
13/****************************************************************************/
14
15#include <linux/config.h>
16#include <linux/interrupt.h>
17
18#include <asm/setup.h>
19#include <asm/io.h>
20#include <asm/irq.h>
21
22/****************************************************************************/
23/*
24 * some coldfire specifics
25 */
26
27#ifdef CONFIG_COLDFIRE
28#include <asm/coldfire.h>
29#include <asm/mcfsim.h>
30
31/*
32 * Save some space, only have 1 interface
33 */
34#define MAX_HWIFS 1 /* we only have one interface for now */
35
36#ifdef CONFIG_SECUREEDGEMP3
37#define MCFSIM_LOCALCS MCFSIM_CSCR4
38#else
39#define MCFSIM_LOCALCS MCFSIM_CSCR6
40#endif
41
42#endif /* CONFIG_COLDFIRE */
43
44/****************************************************************************/
45/*
46 * Fix up things that may not have been provided
47 */
48
49#ifndef MAX_HWIFS
50#define MAX_HWIFS 4 /* same as the other archs */
51#endif
52
53#undef SUPPORT_SLOW_DATA_PORTS
54#define SUPPORT_SLOW_DATA_PORTS 0
55
56#undef SUPPORT_VLB_SYNC
57#define SUPPORT_VLB_SYNC 0
58
59/* this definition is used only on startup .. */
60#undef HD_DATA
61#define HD_DATA NULL
62
63#define DBGIDE(fmt,a...)
64// #define DBGIDE(fmt,a...) printk(fmt, ##a)
65#define IDE_INLINE __inline__
66// #define IDE_INLINE
67
68/****************************************************************************/
69
70typedef union {
71 unsigned all : 8; /* all of the bits together */
72 struct {
73 unsigned bit7 : 1; /* always 1 */
74 unsigned lba : 1; /* using LBA instead of CHS */
75 unsigned bit5 : 1; /* always 1 */
76 unsigned unit : 1; /* drive select number, 0 or 1 */
77 unsigned head : 4; /* always zeros here */
78 } b;
79} select_t;
80
81/*
82 * our list of ports/irq's for different boards
83 */
84
85static struct m68k_ide_defaults {
86 ide_ioreg_t base;
87 int irq;
88} m68k_ide_defaults[MAX_HWIFS] = {
89#if defined(CONFIG_SECUREEDGEMP3)
90 { ((ide_ioreg_t)0x30800000), 29 },
91#elif defined(CONFIG_eLIA)
92 { ((ide_ioreg_t)0x30c00000), 29 },
93#else
94 { ((ide_ioreg_t)0x0), 0 }
95#endif
96};
97
98/****************************************************************************/
99
100static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
101{
102 int i;
103
104 for (i = 0; i < MAX_HWIFS; i++)
105 if (m68k_ide_defaults[i].base == base)
106 return(m68k_ide_defaults[i].irq);
107 return 0;
108}
109
110static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
111{
112 if (index >= 0 && index < MAX_HWIFS)
113 return(m68k_ide_defaults[index].base);
114 return 0;
115}
116
117
118/*
119 * Set up a hw structure for a specified data port, control port and IRQ.
120 * This should follow whatever the default interface uses.
121 */
122static IDE_INLINE void ide_init_hwif_ports(
123 hw_regs_t *hw,
124 ide_ioreg_t data_port,
125 ide_ioreg_t ctrl_port,
126 int *irq)
127{
128 ide_ioreg_t reg = data_port;
129 int i;
130
131 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
132 hw->io_ports[i] = reg;
133 reg += 1;
134 }
135 if (ctrl_port) {
136 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
137 } else {
138 hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
139 }
140}
141
142#define ide_init_default_irq(base) ide_default_irq(base)
143
144static IDE_INLINE int
145ide_request_irq(
146 unsigned int irq,
147 void (*handler)(int, void *, struct pt_regs *),
148 unsigned long flags,
149 const char *device,
150 void *dev_id)
151{
152#ifdef CONFIG_COLDFIRE
153 mcf_autovector(irq);
154#endif
155 return(request_irq(irq, handler, flags, device, dev_id));
156}
157
158
159static IDE_INLINE void
160ide_free_irq(unsigned int irq, void *dev_id)
161{
162 free_irq(irq, dev_id);
163}
164
165
166static IDE_INLINE int
167ide_check_region(ide_ioreg_t from, unsigned int extent)
168{
169 return 0;
170}
171
172
173static IDE_INLINE void
174ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
175{
176}
177
178
179static IDE_INLINE void
180ide_release_region(ide_ioreg_t from, unsigned int extent)
181{
182}
183
184
185static IDE_INLINE void
186ide_fix_driveid(struct hd_driveid *id)
187{
188#ifdef CONFIG_COLDFIRE
189 int i, n;
190 unsigned short *wp = (unsigned short *) id;
191 int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
192
193 /* Need to byte swap shorts, but not char fields */
194 for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
195 if (avoid[n] == i) {
196 n++;
197 continue;
198 }
199 *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
200 }
201 /* have to word swap the one 32 bit field */
202 id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
203 ((id->lba_capacity >> 16) & 0xffff);
204#endif
205}
206
207
208static IDE_INLINE void
209ide_release_lock (int *ide_lock)
210{
211}
212
213
214static IDE_INLINE void
215ide_get_lock(
216 int *ide_lock,
217 void (*handler)(int, void *, struct pt_regs *),
218 void *data)
219{
220}
221
222
223#define ide_ack_intr(hwif) \
224 ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
225#define ide__sti() __sti()
226
227/****************************************************************************/
228/*
229 * System specific IO requirements
230 */
231
232#ifdef CONFIG_COLDFIRE
233
234#ifdef CONFIG_SECUREEDGEMP3
235
236/* Replace standard IO functions for funky mapping of MP3 board */
237#undef outb
238#undef outb_p
239#undef inb
240#undef inb_p
241
242#define outb(v, a) ide_outb(v, (unsigned long) (a))
243#define outb_p(v, a) ide_outb(v, (unsigned long) (a))
244#define inb(a) ide_inb((unsigned long) (a))
245#define inb_p(a) ide_inb((unsigned long) (a))
246
247#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
248#define ADDR16_PTR(addr) (addr)
249#define ADDR32_PTR(addr) (addr)
250#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
251#define SWAP16(w) (w)
252#define SWAP32(w) (w)
253
254
255static IDE_INLINE void
256ide_outb(unsigned int val, unsigned int addr)
257{
258 volatile unsigned short *rp;
259
260 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
261 rp = (volatile unsigned short *) ADDR8_PTR(addr);
262 *rp = SWAP8(val);
263}
264
265
266static IDE_INLINE int
267ide_inb(unsigned int addr)
268{
269 volatile unsigned short *rp, val;
270
271 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
272 rp = (volatile unsigned short *) ADDR8_PTR(addr);
273 val = *rp;
274 return(SWAP8(val));
275}
276
277
278static IDE_INLINE void
279ide_outw(unsigned int val, unsigned int addr)
280{
281 volatile unsigned short *rp;
282
283 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
284 rp = (volatile unsigned short *) ADDR16_PTR(addr);
285 *rp = SWAP16(val);
286}
287
288static IDE_INLINE void
289ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
290{
291 volatile unsigned short *rp, val;
292 unsigned short *buf;
293
294 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
295 buf = (unsigned short *) vbuf;
296 rp = (volatile unsigned short *) ADDR16_PTR(addr);
297 for (; (len > 0); len--) {
298 val = *buf++;
299 *rp = SWAP16(val);
300 }
301}
302
303static IDE_INLINE int
304ide_inw(unsigned int addr)
305{
306 volatile unsigned short *rp, val;
307
308 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
309 rp = (volatile unsigned short *) ADDR16_PTR(addr);
310 val = *rp;
311 return(SWAP16(val));
312}
313
314static IDE_INLINE void
315ide_insw(unsigned int addr, void *vbuf, unsigned long len)
316{
317 volatile unsigned short *rp;
318 unsigned short w, *buf;
319
320 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
321 buf = (unsigned short *) vbuf;
322 rp = (volatile unsigned short *) ADDR16_PTR(addr);
323 for (; (len > 0); len--) {
324 w = *rp;
325 *buf++ = SWAP16(w);
326 }
327}
328
329static IDE_INLINE void
330ide_insl(unsigned int addr, void *vbuf, unsigned long len)
331{
332 volatile unsigned long *rp;
333 unsigned long w, *buf;
334
335 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
336 buf = (unsigned long *) vbuf;
337 rp = (volatile unsigned long *) ADDR32_PTR(addr);
338 for (; (len > 0); len--) {
339 w = *rp;
340 *buf++ = SWAP32(w);
341 }
342}
343
344static IDE_INLINE void
345ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
346{
347 volatile unsigned long *rp, val;
348 unsigned long *buf;
349
350 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
351 buf = (unsigned long *) vbuf;
352 rp = (volatile unsigned long *) ADDR32_PTR(addr);
353 for (; (len > 0); len--) {
354 val = *buf++;
355 *rp = SWAP32(val);
356 }
357}
358
359#elif CONFIG_eLIA
360
361/* 8/16 bit acesses are controlled by flicking bits in the CS register */
362#define ACCESS_MODE_16BIT() \
363 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
364#define ACCESS_MODE_8BIT() \
365 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
366
367
368static IDE_INLINE void
369ide_outw(unsigned int val, unsigned int addr)
370{
371 ACCESS_MODE_16BIT();
372 outw(val, addr);
373 ACCESS_MODE_8BIT();
374}
375
376static IDE_INLINE void
377ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
378{
379 ACCESS_MODE_16BIT();
380 outsw(addr, vbuf, len);
381 ACCESS_MODE_8BIT();
382}
383
384static IDE_INLINE int
385ide_inw(unsigned int addr)
386{
387 int ret;
388
389 ACCESS_MODE_16BIT();
390 ret = inw(addr);
391 ACCESS_MODE_8BIT();
392 return(ret);
393}
394
395static IDE_INLINE void
396ide_insw(unsigned int addr, void *vbuf, unsigned long len)
397{
398 ACCESS_MODE_16BIT();
399 insw(addr, vbuf, len);
400 ACCESS_MODE_8BIT();
401}
402
403static IDE_INLINE void
404ide_insl(unsigned int addr, void *vbuf, unsigned long len)
405{
406 ACCESS_MODE_16BIT();
407 insl(addr, vbuf, len);
408 ACCESS_MODE_8BIT();
409}
410
411static IDE_INLINE void
412ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
413{
414 ACCESS_MODE_16BIT();
415 outsl(addr, vbuf, len);
416 ACCESS_MODE_8BIT();
417}
418
419#endif /* CONFIG_SECUREEDGEMP3 */
420
421#undef outw
422#undef outw_p
423#undef outsw
424#undef inw
425#undef inw_p
426#undef insw
427#undef insl
428#undef outsl
429
430#define outw(v, a) ide_outw(v, (unsigned long) (a))
431#define outw_p(v, a) ide_outw(v, (unsigned long) (a))
432#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
433#define inw(a) ide_inw((unsigned long) (a))
434#define inw_p(a) ide_inw((unsigned long) (a))
435#define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
436#define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
437#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
438
439#endif CONFIG_COLDFIRE
440
441/****************************************************************************/
442#endif /* __KERNEL__ */
443#endif /* _M68KNOMMU_IDE_H */
444/****************************************************************************/
diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h
index 30fade4149b8..e08f2ee4b4a2 100644
--- a/include/asm-m68knommu/io.h
+++ b/include/asm-m68knommu/io.h
@@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); 147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
148extern void __iounmap(void *addr, unsigned long size); 148extern void __iounmap(void *addr, unsigned long size);
149 149
150extern inline void *ioremap(unsigned long physaddr, unsigned long size) 150static inline void *ioremap(unsigned long physaddr, unsigned long size)
151{ 151{
152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
153} 153}
154extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) 154static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
155{ 155{
156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
157} 157}
158extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) 158static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
159{ 159{
160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
161} 161}
162extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) 162static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
163{ 163{
164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
165} 165}
diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h
index 208ccd969e4b..a08fa9b958da 100644
--- a/include/asm-m68knommu/irq.h
+++ b/include/asm-m68knommu/irq.h
@@ -2,7 +2,6 @@
2#define _M68K_IRQ_H_ 2#define _M68K_IRQ_H_
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5#include <linux/interrupt.h>
6#include <asm/ptrace.h> 5#include <asm/ptrace.h>
7 6
8#ifdef CONFIG_COLDFIRE 7#ifdef CONFIG_COLDFIRE
@@ -83,36 +82,6 @@ extern void (*mach_disable_irq)(unsigned int);
83#endif /* CONFIG_M68360 */ 82#endif /* CONFIG_M68360 */
84 83
85/* 84/*
86 * This structure is used to chain together the ISRs for a particular
87 * interrupt source (if it supports chaining).
88 */
89typedef struct irq_node {
90 irqreturn_t (*handler)(int, void *, struct pt_regs *);
91 unsigned long flags;
92 void *dev_id;
93 const char *devname;
94 struct irq_node *next;
95} irq_node_t;
96
97/*
98 * This structure has only 4 elements for speed reasons
99 */
100typedef struct irq_handler {
101 irqreturn_t (*handler)(int, void *, struct pt_regs *);
102 unsigned long flags;
103 void *dev_id;
104 const char *devname;
105} irq_handler_t;
106
107/* count of spurious interrupts */
108extern volatile unsigned int num_spurious;
109
110/*
111 * This function returns a new irq_node_t
112 */
113extern irq_node_t *new_irq_node(void);
114
115/*
116 * Some drivers want these entry points 85 * Some drivers want these entry points
117 */ 86 */
118#define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0) 87#define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0)
diff --git a/include/asm-m68knommu/irqnode.h b/include/asm-m68knommu/irqnode.h
new file mode 100644
index 000000000000..a2503dfc554c
--- /dev/null
+++ b/include/asm-m68knommu/irqnode.h
@@ -0,0 +1,36 @@
1#ifndef _M68K_IRQNODE_H_
2#define _M68K_IRQNODE_H_
3
4#include <linux/interrupt.h>
5
6/*
7 * This structure is used to chain together the ISRs for a particular
8 * interrupt source (if it supports chaining).
9 */
10typedef struct irq_node {
11 irqreturn_t (*handler)(int, void *, struct pt_regs *);
12 unsigned long flags;
13 void *dev_id;
14 const char *devname;
15 struct irq_node *next;
16} irq_node_t;
17
18/*
19 * This structure has only 4 elements for speed reasons
20 */
21typedef struct irq_handler {
22 irqreturn_t (*handler)(int, void *, struct pt_regs *);
23 unsigned long flags;
24 void *dev_id;
25 const char *devname;
26} irq_handler_t;
27
28/* count of spurious interrupts */
29extern volatile unsigned int num_spurious;
30
31/*
32 * This function returns a new irq_node_t
33 */
34extern irq_node_t *new_irq_node(void);
35
36#endif /* _M68K_IRQNODE_H_ */
diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h
new file mode 100644
index 000000000000..6dc62869e62b
--- /dev/null
+++ b/include/asm-m68knommu/m520xsim.h
@@ -0,0 +1,54 @@
1/****************************************************************************/
2
3/*
4 * m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
5 *
6 * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
7 */
8
9/****************************************************************************/
10#ifndef m520xsim_h
11#define m520xsim_h
12/****************************************************************************/
13
14#include <linux/config.h>
15
16/*
17 * Define the 5282 SIM register set addresses.
18 */
19#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */
20#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
21#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
22#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
23#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
24#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
25#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
26#define MCFINTC_ICR0 0x40 /* Base ICR register */
27
28#define MCFINT_VECBASE 64
29#define MCFINT_UART0 26 /* Interrupt number for UART0 */
30#define MCFINT_UART1 27 /* Interrupt number for UART1 */
31#define MCFINT_UART2 28 /* Interrupt number for UART2 */
32#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
33#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
34
35
36#define MCF_GPIO_PAR_UART (0xA4036)
37#define MCF_GPIO_PAR_FECI2C (0xA4033)
38#define MCF_GPIO_PAR_FEC (0xA4038)
39
40#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001)
41#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002)
42
43#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040)
44#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080)
45
46#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
47#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
48
49#define ICR_INTRCONF 0x05
50#define MCFPIT_IMR MCFINTC_IMRL
51#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
52
53/****************************************************************************/
54#endif /* m520xsim_h */
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index b17cd920977f..9cb401421835 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
117.endm 117.endm
118#endif /* CONFIG_M5407 */ 118#endif /* CONFIG_M5407 */
119 119
120#if defined(CONFIG_M520x)
121.macro CACHE_ENABLE
122 move.l #0x01000000,%d0 /* invalidate whole cache */
123 movec %d0,%CACR
124 nop
125 move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
126 movec %d0,%ACR0
127 move.l #0x00000000,%d0 /* no other regions cached */
128 movec %d0,%ACR1
129 move.l #0x80400000,%d0 /* enable 8K instruction cache */
130 movec %d0,%CACR
131 nop
132.endm
133#endif /* CONFIG_M520x */
120 134
121/****************************************************************************/ 135/****************************************************************************/
122#endif /* __M68KNOMMU_MCFCACHE_H */ 136#endif /* __M68KNOMMU_MCFCACHE_H */
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
index 045875651e4d..a71b1c8cb4f8 100644
--- a/include/asm-m68knommu/mcfne.h
+++ b/include/asm-m68knommu/mcfne.h
@@ -35,7 +35,7 @@
35 * Define the basic hardware resources of NE2000 boards. 35 * Define the basic hardware resources of NE2000 boards.
36 */ 36 */
37 37
38#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 38#if defined(CONFIG_ARN5206)
39#define NE2000_ADDR 0x40000300 39#define NE2000_ADDR 0x40000300
40#define NE2000_ODDOFFSET 0x00010000 40#define NE2000_ODDOFFSET 0x00010000
41#define NE2000_IRQ_VECTOR 0xf0 41#define NE2000_IRQ_VECTOR 0xf0
@@ -44,7 +44,7 @@
44#define NE2000_BYTE volatile unsigned short 44#define NE2000_BYTE volatile unsigned short
45#endif 45#endif
46 46
47#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 47#if defined(CONFIG_M5206eC3)
48#define NE2000_ADDR 0x40000300 48#define NE2000_ADDR 0x40000300
49#define NE2000_ODDOFFSET 0x00010000 49#define NE2000_ODDOFFSET 0x00010000
50#define NE2000_IRQ_VECTOR 0x1c 50#define NE2000_IRQ_VECTOR 0x1c
@@ -61,7 +61,7 @@
61#define NE2000_BYTE volatile unsigned char 61#define NE2000_BYTE volatile unsigned char
62#endif 62#endif
63 63
64#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 64#if defined(CONFIG_CFV240)
65#define NE2000_ADDR 0x40010000 65#define NE2000_ADDR 0x40010000
66#define NE2000_ADDR1 0x40010001 66#define NE2000_ADDR1 0x40010001
67#define NE2000_ODDOFFSET 0x00000000 67#define NE2000_ODDOFFSET 0x00000000
@@ -72,7 +72,7 @@
72#define NE2000_BYTE volatile unsigned char 72#define NE2000_BYTE volatile unsigned char
73#endif 73#endif
74 74
75#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA) 75#if defined(CONFIG_M5307C3)
76#define NE2000_ADDR 0x40000300 76#define NE2000_ADDR 0x40000300
77#define NE2000_ODDOFFSET 0x00010000 77#define NE2000_ODDOFFSET 0x00010000
78#define NE2000_IRQ_VECTOR 0x1b 78#define NE2000_IRQ_VECTOR 0x1b
@@ -114,7 +114,7 @@
114#define RSWAP(w) (((w) << 8) | ((w) >> 8)) 114#define RSWAP(w) (((w) << 8) | ((w) >> 8))
115#endif 115#endif
116 116
117#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH) 117#if defined(CONFIG_ARN5307)
118#define NE2000_ADDR 0xfe600300 118#define NE2000_ADDR 0xfe600300
119#define NE2000_ODDOFFSET 0x00010000 119#define NE2000_ODDOFFSET 0x00010000
120#define NE2000_IRQ_VECTOR 0x1b 120#define NE2000_IRQ_VECTOR 0x1b
@@ -123,7 +123,7 @@
123#define NE2000_BYTE volatile unsigned short 123#define NE2000_BYTE volatile unsigned short
124#endif 124#endif
125 125
126#if defined(CONFIG_M5407) 126#if defined(CONFIG_M5407C3)
127#define NE2000_ADDR 0x40000300 127#define NE2000_ADDR 0x40000300
128#define NE2000_ODDOFFSET 0x00010000 128#define NE2000_ODDOFFSET 0x00010000
129#define NE2000_IRQ_VECTOR 0x1b 129#define NE2000_IRQ_VECTOR 0x1b
@@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
264 * Minor differences between the different board types. 264 * Minor differences between the different board types.
265 */ 265 */
266 266
267#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 267#if defined(CONFIG_ARN5206)
268void ne2000_irqsetup(int irq) 268void ne2000_irqsetup(int irq)
269{ 269{
270 volatile unsigned char *icrp; 270 volatile unsigned char *icrp;
@@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq)
275} 275}
276#endif 276#endif
277 277
278#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 278#if defined(CONFIG_M5206eC3)
279void ne2000_irqsetup(int irq) 279void ne2000_irqsetup(int irq)
280{ 280{
281 volatile unsigned char *icrp; 281 volatile unsigned char *icrp;
@@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq)
286} 286}
287#endif 287#endif
288 288
289#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 289#if defined(CONFIG_CFV240)
290void ne2000_irqsetup(int irq) 290void ne2000_irqsetup(int irq)
291{ 291{
292 volatile unsigned char *icrp; 292 volatile unsigned char *icrp;
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 4cc2e9fd6ad0..a685f1b45401 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -14,13 +14,17 @@
14#include <linux/config.h> 14#include <linux/config.h>
15 15
16/* 16/*
17 * Get address specific defines for the 5270/5271 and 5280/5282. 17 * Get address specific defines for the 5270/5271, 5280/5282, and 5208.
18 */ 18 */
19#if defined(CONFIG_M520x)
20#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */
21#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */
22#else
19#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ 23#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */
20#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ 24#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */
21#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ 25#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */
22#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ 26#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */
23 27#endif
24 28
25/* 29/*
26 * Define the PIT timer register set addresses. 30 * Define the PIT timer register set addresses.
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index b0c7736f7a99..81d74a31dc43 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -22,6 +22,8 @@
22#include <asm/m5204sim.h> 22#include <asm/m5204sim.h>
23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) 23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
24#include <asm/m5206sim.h> 24#include <asm/m5206sim.h>
25#elif defined(CONFIG_M520x)
26#include <asm/m520xsim.h>
25#elif defined(CONFIG_M523x) 27#elif defined(CONFIG_M523x)
26#include <asm/m523xsim.h> 28#include <asm/m523xsim.h>
27#elif defined(CONFIG_M5249) 29#elif defined(CONFIG_M5249)
@@ -99,6 +101,19 @@
99#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ 101#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
100#endif 102#endif
101 103
104/*
105 * PIT interrupt settings, if not found in mXXXXsim.h file.
106 */
107#ifndef ICR_INTRCONF
108#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */
109#endif
110#ifndef MCFPIT_IMR
111#define MCFPIT_IMR MCFINTC_IMRH
112#endif
113#ifndef MCFPIT_IMR_IBIT
114#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32))
115#endif
116
102 117
103#ifndef __ASSEMBLY__ 118#ifndef __ASSEMBLY__
104/* 119/*
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 9c1210613bc7..b016fad83119 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -41,6 +41,10 @@
41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
42#define MCFUART_BASE2 0x200 /* Base address of UART2 */ 42#define MCFUART_BASE2 0x200 /* Base address of UART2 */
43#endif 43#endif
44#elif defined(CONFIG_M520x)
45#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
46#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
47#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
44#endif 48#endif
45 49
46 50
diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h
index c425dd568155..6ceae103596b 100644
--- a/include/asm-m68knommu/mcfwdebug.h
+++ b/include/asm-m68knommu/mcfwdebug.h
@@ -90,7 +90,7 @@
90 * that the debug module instructions (2 longs) must be long word aligned and 90 * that the debug module instructions (2 longs) must be long word aligned and
91 * some pointer fiddling is performed to ensure this. 91 * some pointer fiddling is performed to ensure this.
92 */ 92 */
93extern inline void wdebug(int reg, unsigned long data) { 93static inline void wdebug(int reg, unsigned long data) {
94 unsigned short dbg_spc[6]; 94 unsigned short dbg_spc[6];
95 unsigned short *dbg; 95 unsigned short *dbg;
96 96
diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h
index 9bc0fd49b8aa..1e080eca9ca8 100644
--- a/include/asm-m68knommu/mmu_context.h
+++ b/include/asm-m68knommu/mmu_context.h
@@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
10{ 10{
11} 11}
12 12
13extern inline int 13static inline int
14init_new_context(struct task_struct *tsk, struct mm_struct *mm) 14init_new_context(struct task_struct *tsk, struct mm_struct *mm)
15{ 15{
16 // mm->context = virt_to_phys(mm->pgd); 16 // mm->context = virt_to_phys(mm->pgd);
@@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str
25 25
26#define deactivate_mm(tsk,mm) do { } while (0) 26#define deactivate_mm(tsk,mm) do { } while (0)
27 27
28extern inline void activate_mm(struct mm_struct *prev_mm, 28static inline void activate_mm(struct mm_struct *prev_mm,
29 struct mm_struct *next_mm) 29 struct mm_struct *next_mm)
30{ 30{
31} 31}
diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h
index 85a054e758b1..ba393b1a023b 100644
--- a/include/asm-m68knommu/processor.h
+++ b/include/asm-m68knommu/processor.h
@@ -21,7 +21,7 @@
21#include <asm/ptrace.h> 21#include <asm/ptrace.h>
22#include <asm/current.h> 22#include <asm/current.h>
23 23
24extern inline unsigned long rdusp(void) 24static inline unsigned long rdusp(void)
25{ 25{
26#ifdef CONFIG_COLDFIRE 26#ifdef CONFIG_COLDFIRE
27 extern unsigned int sw_usp; 27 extern unsigned int sw_usp;
@@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void)
33#endif 33#endif
34} 34}
35 35
36extern inline void wrusp(unsigned long usp) 36static inline void wrusp(unsigned long usp)
37{ 37{
38#ifdef CONFIG_COLDFIRE 38#ifdef CONFIG_COLDFIRE
39 extern unsigned int sw_usp; 39 extern unsigned int sw_usp;
diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h
index febe85add509..5cc1fdd86f50 100644
--- a/include/asm-m68knommu/semaphore.h
+++ b/include/asm-m68knommu/semaphore.h
@@ -35,16 +35,13 @@ struct semaphore {
35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
36} 36}
37 37
38#define __MUTEX_INITIALIZER(name) \
39 __SEMAPHORE_INITIALIZER(name,1)
40
41#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 38#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
42 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 39 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
43 40
44#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 41#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
45#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 42#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
46 43
47extern inline void sema_init (struct semaphore *sem, int val) 44static inline void sema_init (struct semaphore *sem, int val)
48{ 45{
49 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val); 46 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
50} 47}
@@ -76,7 +73,7 @@ extern spinlock_t semaphore_wake_lock;
76 * "down_failed" is a special asm handler that calls the C 73 * "down_failed" is a special asm handler that calls the C
77 * routine that actually waits. See arch/m68k/lib/semaphore.S 74 * routine that actually waits. See arch/m68k/lib/semaphore.S
78 */ 75 */
79extern inline void down(struct semaphore * sem) 76static inline void down(struct semaphore * sem)
80{ 77{
81 might_sleep(); 78 might_sleep();
82 __asm__ __volatile__( 79 __asm__ __volatile__(
@@ -91,7 +88,7 @@ extern inline void down(struct semaphore * sem)
91 : "cc", "%a0", "%a1", "memory"); 88 : "cc", "%a0", "%a1", "memory");
92} 89}
93 90
94extern inline int down_interruptible(struct semaphore * sem) 91static inline int down_interruptible(struct semaphore * sem)
95{ 92{
96 int ret; 93 int ret;
97 94
@@ -110,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem)
110 return(ret); 107 return(ret);
111} 108}
112 109
113extern inline int down_trylock(struct semaphore * sem) 110static inline int down_trylock(struct semaphore * sem)
114{ 111{
115 register struct semaphore *sem1 __asm__ ("%a1") = sem; 112 register struct semaphore *sem1 __asm__ ("%a1") = sem;
116 register int result __asm__ ("%d0"); 113 register int result __asm__ ("%d0");
@@ -138,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem)
138 * The default case (no contention) will result in NO 135 * The default case (no contention) will result in NO
139 * jumps for both down() and up(). 136 * jumps for both down() and up().
140 */ 137 */
141extern inline void up(struct semaphore * sem) 138static inline void up(struct semaphore * sem)
142{ 139{
143 __asm__ __volatile__( 140 __asm__ __volatile__(
144 "| atomic up operation\n\t" 141 "| atomic up operation\n\t"
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 53cbbad0f130..6338afc850ba 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new)
312 moveb #0x80, (%a0); \ 312 moveb #0x80, (%a0); \
313 "); \ 313 "); \
314}) 314})
315#elif defined(CONFIG_M520x)
316 /*
317 * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
318 * RCR), that when set, resets the MCF5208.
319 */
320#define HARD_RESET_NOW() \
321({ \
322 unsigned char volatile *reset; \
323 asm("move.w #0x2700, %sr"); \
324 reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \
325 while(1) \
326 *reset |= 0x80; \
327})
315#else 328#else
316#define HARD_RESET_NOW() ({ \ 329#define HARD_RESET_NOW() ({ \
317 asm(" \ 330 asm(" \
diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h
index bf7004e1afe0..de858db28b00 100644
--- a/include/asm-m68knommu/tlbflush.h
+++ b/include/asm-m68knommu/tlbflush.h
@@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm,
47 BUG(); 47 BUG();
48} 48}
49 49
50extern inline void flush_tlb_kernel_page(unsigned long addr) 50static inline void flush_tlb_kernel_page(unsigned long addr)
51{ 51{
52 BUG(); 52 BUG();
53} 53}
54 54
55extern inline void flush_tlb_pgtables(struct mm_struct *mm, 55static inline void flush_tlb_pgtables(struct mm_struct *mm,
56 unsigned long start, unsigned long end) 56 unsigned long start, unsigned long end)
57{ 57{
58 BUG(); 58 BUG();
diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h
index 84b6fa14459f..5373988a7e51 100644
--- a/include/asm-m68knommu/unistd.h
+++ b/include/asm-m68knommu/unistd.h
@@ -504,7 +504,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
504 unsigned long fd, unsigned long pgoff); 504 unsigned long fd, unsigned long pgoff);
505asmlinkage int sys_execve(char *name, char **argv, char **envp); 505asmlinkage int sys_execve(char *name, char **argv, char **envp);
506asmlinkage int sys_pipe(unsigned long *fildes); 506asmlinkage int sys_pipe(unsigned long *fildes);
507asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
508struct pt_regs; 507struct pt_regs;
509int sys_request_irq(unsigned int, 508int sys_request_irq(unsigned int,
510 irqreturn_t (*)(int, void *, struct pt_regs *), 509 irqreturn_t (*)(int, void *, struct pt_regs *),
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 18:47:35 -0500