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-rw-r--r--include/asm-m68knommu/m68360_enet.h177
1 files changed, 0 insertions, 177 deletions
diff --git a/include/asm-m68knommu/m68360_enet.h b/include/asm-m68knommu/m68360_enet.h
deleted file mode 100644
index c36f4d059203..000000000000
--- a/include/asm-m68knommu/m68360_enet.h
+++ /dev/null
@@ -1,177 +0,0 @@
1/***********************************
2 * $Id: m68360_enet.h,v 1.1 2002/03/02 15:01:07 gerg Exp $
3 ***********************************
4 *
5 ***************************************
6 * Definitions for the ETHERNET controllers
7 ***************************************
8 */
9
10#ifndef __ETHER_H
11#define __ETHER_H
12
13#include "quicc_simple.h"
14
15/*
16 * transmit BD's
17 */
18#define T_R 0x8000 /* ready bit */
19#define E_T_PAD 0x4000 /* short frame padding */
20#define T_W 0x2000 /* wrap bit */
21#define T_I 0x1000 /* interrupt on completion */
22#define T_L 0x0800 /* last in frame */
23#define T_TC 0x0400 /* transmit CRC (when last) */
24
25#define T_DEF 0x0200 /* defer indication */
26#define T_HB 0x0100 /* heartbeat */
27#define T_LC 0x0080 /* error: late collision */
28#define T_RL 0x0040 /* error: retransmission limit */
29#define T_RC 0x003c /* retry count */
30#define T_UN 0x0002 /* error: underrun */
31#define T_CSL 0x0001 /* carier sense lost */
32#define T_ERROR (T_HB | T_LC | T_RL | T_UN | T_CSL)
33
34/*
35 * receive BD's
36 */
37#define R_E 0x8000 /* buffer empty */
38#define R_W 0x2000 /* wrap bit */
39#define R_I 0x1000 /* interrupt on reception */
40#define R_L 0x0800 /* last BD in frame */
41#define R_F 0x0400 /* first BD in frame */
42#define R_M 0x0100 /* received because of promisc. mode */
43
44#define R_LG 0x0020 /* frame too long */
45#define R_NO 0x0010 /* non-octet aligned */
46#define R_SH 0x0008 /* short frame */
47#define R_CR 0x0004 /* receive CRC error */
48#define R_OV 0x0002 /* receive overrun */
49#define R_CL 0x0001 /* collision */
50#define ETHER_R_ERROR (R_LG | R_NO | R_SH | R_CR | R_OV | R_CL)
51
52
53/*
54 * ethernet interrupts
55 */
56#define ETHERNET_GRA 0x0080 /* graceful stop complete */
57#define ETHERNET_TXE 0x0010 /* transmit error */
58#define ETHERNET_RXF 0x0008 /* receive frame */
59#define ETHERNET_BSY 0x0004 /* busy condition */
60#define ETHERNET_TXB 0x0002 /* transmit buffer */
61#define ETHERNET_RXB 0x0001 /* receive buffer */
62
63/*
64 * ethernet protocol specific mode register (PSMR)
65 */
66#define ETHER_HBC 0x8000 /* heartbeat checking */
67#define ETHER_FC 0x4000 /* force collision */
68#define ETHER_RSH 0x2000 /* receive short frames */
69#define ETHER_IAM 0x1000 /* individual address mode */
70#define ETHER_CRC_32 (0x2<<10) /* Enable CRC */
71#define ETHER_PRO 0x0200 /* promiscuous */
72#define ETHER_BRO 0x0100 /* broadcast address */
73#define ETHER_SBT 0x0080 /* stop backoff timer */
74#define ETHER_LPB 0x0040 /* Loop Back Mode */
75#define ETHER_SIP 0x0020 /* sample input pins */
76#define ETHER_LCW 0x0010 /* late collision window */
77#define ETHER_NIB_13 (0x0<<1) /* # of ignored bits 13 */
78#define ETHER_NIB_14 (0x1<<1) /* # of ignored bits 14 */
79#define ETHER_NIB_15 (0x2<<1) /* # of ignored bits 15 */
80#define ETHER_NIB_16 (0x3<<1) /* # of ignored bits 16 */
81#define ETHER_NIB_21 (0x4<<1) /* # of ignored bits 21 */
82#define ETHER_NIB_22 (0x5<<1) /* # of ignored bits 22 */
83#define ETHER_NIB_23 (0x6<<1) /* # of ignored bits 23 */
84#define ETHER_NIB_24 (0x7<<1) /* # of ignored bits 24 */
85
86/*
87 * ethernet specific parameters
88 */
89#define CRC_WORD 4 /* Length in bytes of CRC */
90#define C_PRES 0xffffffff /* preform 32 bit CRC */
91#define C_MASK 0xdebb20e3 /* comply with 32 bit CRC */
92#define CRCEC 0x00000000
93#define ALEC 0x00000000
94#define DISFC 0x00000000
95#define PADS 0x00000000
96#define RET_LIM 0x000f /* retry 15 times to send a frame before interrupt */
97#define ETH_MFLR 0x05ee /* 1518 max frame size */
98#define MINFLR 0x0040 /* Minimum frame size 64 */
99#define MAXD1 0x05ee /* Max dma count 1518 */
100#define MAXD2 0x05ee
101#define GADDR1 0x00000000 /* Clear group address */
102#define GADDR2 0x00000000
103#define GADDR3 0x00000000
104#define GADDR4 0x00000000
105#define P_PER 0x00000000 /*not used */
106#define IADDR1 0x00000000 /* Individual hash table not used */
107#define IADDR2 0x00000000
108#define IADDR3 0x00000000
109#define IADDR4 0x00000000
110#define TADDR_H 0x00000000 /* clear this regs */
111#define TADDR_M 0x00000000
112#define TADDR_L 0x00000000
113
114/* SCC Parameter Ram */
115#define RFCR 0x18 /* normal operation */
116#define TFCR 0x18 /* normal operation */
117#define E_MRBLR 1518 /* Max ethernet frame length */
118
119/*
120 * ethernet specific structure
121 */
122typedef union {
123 unsigned char b[6];
124 struct {
125 unsigned short high;
126 unsigned short middl;
127 unsigned short low;
128 } w;
129} ETHER_ADDR;
130
131typedef struct {
132 int max_frame_length;
133 int promisc_mode;
134 int reject_broadcast;
135 ETHER_ADDR phys_adr;
136} ETHER_SPECIFIC;
137
138typedef struct {
139 ETHER_ADDR dst_addr;
140 ETHER_ADDR src_addr;
141 unsigned short type_or_len;
142 unsigned char data[1];
143} ETHER_FRAME;
144
145#define MAX_DATALEN 1500
146typedef struct {
147 ETHER_ADDR dst_addr;
148 ETHER_ADDR src_addr;
149 unsigned short type_or_len;
150 unsigned char data[MAX_DATALEN];
151 unsigned char fcs[CRC_WORD];
152} ETHER_MAX_FRAME;
153
154
155/*
156 * Internal ethernet function prototypes
157 */
158void ether_interrupt(int scc_num);
159/* mleslie: debug */
160/* static void ethernet_rx_internal(int scc_num); */
161/* static void ethernet_tx_internal(int scc_num); */
162
163/*
164 * User callable routines prototypes (ethernet specific)
165 */
166void ethernet_init(int scc_number,
167 alloc_routine *alloc_buffer,
168 free_routine *free_buffer,
169 store_rx_buffer_routine *store_rx_buffer,
170 handle_tx_error_routine *handle_tx_error,
171 handle_rx_error_routine *handle_rx_error,
172 handle_lost_error_routine *handle_lost_error,
173 ETHER_SPECIFIC *ether_spec);
174int ethernet_tx(int scc_number, void *buf, int length);
175
176#endif
177
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