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-rw-r--r--include/asm-m68k/q40_master.h69
1 files changed, 0 insertions, 69 deletions
diff --git a/include/asm-m68k/q40_master.h b/include/asm-m68k/q40_master.h
deleted file mode 100644
index 3907a09d4fca..000000000000
--- a/include/asm-m68k/q40_master.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * Q40 master Chip Control
3 * RTC stuff merged for compactnes..
4*/
5
6#ifndef _Q40_MASTER_H
7#define _Q40_MASTER_H
8
9#include <asm/raw_io.h>
10
11
12#define q40_master_addr 0xff000000
13
14#define IIRQ_REG 0x0 /* internal IRQ reg */
15#define EIRQ_REG 0x4 /* external ... */
16#define KEYCODE_REG 0x1c /* value of received scancode */
17#define DISPLAY_CONTROL_REG 0x18
18#define FRAME_CLEAR_REG 0x24
19#define LED_REG 0x30
20
21#define Q40_LED_ON() master_outb(1,LED_REG)
22#define Q40_LED_OFF() master_outb(0,LED_REG)
23
24#define INTERRUPT_REG IIRQ_REG /* "native" ints */
25#define KEY_IRQ_ENABLE_REG 0x08 /**/
26#define KEYBOARD_UNLOCK_REG 0x20 /* clear kb int */
27
28#define SAMPLE_ENABLE_REG 0x14 /* generate SAMPLE ints */
29#define SAMPLE_RATE_REG 0x2c
30#define SAMPLE_CLEAR_REG 0x28
31#define SAMPLE_LOW 0x00
32#define SAMPLE_HIGH 0x01
33
34#define FRAME_RATE_REG 0x38 /* generate FRAME ints at 200 HZ rate */
35
36#if 0
37#define SER_ENABLE_REG 0x0c /* allow serial ints to be generated */
38#endif
39#define EXT_ENABLE_REG 0x10 /* ... rest of the ISA ints ... */
40
41
42#define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_)
43#define master_outb(_b_,_reg_) out_8((unsigned char *)q40_master_addr+_reg_,_b_)
44
45/* RTC defines */
46
47#define Q40_RTC_BASE (0xff021ffc)
48
49#define Q40_RTC_YEAR (*(volatile unsigned char *)(Q40_RTC_BASE+0))
50#define Q40_RTC_MNTH (*(volatile unsigned char *)(Q40_RTC_BASE-4))
51#define Q40_RTC_DATE (*(volatile unsigned char *)(Q40_RTC_BASE-8))
52#define Q40_RTC_DOW (*(volatile unsigned char *)(Q40_RTC_BASE-12))
53#define Q40_RTC_HOUR (*(volatile unsigned char *)(Q40_RTC_BASE-16))
54#define Q40_RTC_MINS (*(volatile unsigned char *)(Q40_RTC_BASE-20))
55#define Q40_RTC_SECS (*(volatile unsigned char *)(Q40_RTC_BASE-24))
56#define Q40_RTC_CTRL (*(volatile unsigned char *)(Q40_RTC_BASE-28))
57
58/* some control bits */
59#define Q40_RTC_READ 64 /* prepare for reading */
60#define Q40_RTC_WRITE 128
61
62/* define some Q40 specific ints */
63#include "q40ints.h"
64
65/* misc defs */
66#define DAC_LEFT ((unsigned char *)0xff008000)
67#define DAC_RIGHT ((unsigned char *)0xff008004)
68
69#endif /* _Q40_MASTER_H */