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-rw-r--r--include/asm-m32r/assembler.h5
-rw-r--r--include/asm-m32r/mappi3/mappi3_pld.h22
-rw-r--r--include/asm-m32r/ptrace.h25
-rw-r--r--include/asm-m32r/semaphore.h64
-rw-r--r--include/asm-m32r/sigcontext.h2
-rw-r--r--include/asm-m32r/system.h67
6 files changed, 55 insertions, 130 deletions
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index b7f4d8aaeb46..1a1aa17edd33 100644
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -109,6 +109,9 @@
109 push r13 109 push r13
110 mvfachi r13 110 mvfachi r13
111 push r13 111 push r13
112 ldi r13, #0
113 push r13 ; dummy push acc1h
114 push r13 ; dummy push acc1l
112#else 115#else
113#error unknown isa configuration 116#error unknown isa configuration
114#endif 117#endif
@@ -156,6 +159,8 @@
156 pop r13 159 pop r13
157 mvtaclo r13, a1 160 mvtaclo r13, a1
158#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) 161#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
162 pop r13 ; dummy pop acc1h
163 pop r13 ; dummy pop acc1l
159 pop r13 164 pop r13
160 mvtachi r13 165 mvtachi r13
161 pop r13 166 pop r13
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h
index 1d3c25d61bcb..031369a7afc8 100644
--- a/include/asm-m32r/mappi3/mappi3_pld.h
+++ b/include/asm-m32r/mappi3/mappi3_pld.h
@@ -53,16 +53,14 @@
53/* Power Control of MMC and CF */ 53/* Power Control of MMC and CF */
54#define PLD_CPCR __reg16(PLD_BASE + 0x14000) 54#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
55 55
56 56/* ICU */
57/*==== ICU ====*/ 57#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
58#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ 58#define M32R_IRQ_I2C (28) /* I2C-BUS */
59#define M32R_IRQ_I2C (28) /* I2C-BUS */ 59#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
60#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ 60#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
61#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */ 61#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
62#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ 62#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ 63#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65
66 64
67#if 0 65#if 0
68/* LED Control 66/* LED Control
@@ -97,7 +95,6 @@
97#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) 95#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
98#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) 96#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
99 97
100
101#if 0 98#if 0
102/* RTC */ 99/* RTC */
103#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) 100#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
@@ -140,4 +137,7 @@
140 137
141#endif 138#endif
142 139
140/* Reset Control */
141#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
142
143#endif /* _MAPPI3_PLD.H */ 143#endif /* _MAPPI3_PLD.H */
diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h
index 0d058b2d844e..53c792452dfc 100644
--- a/include/asm-m32r/ptrace.h
+++ b/include/asm-m32r/ptrace.h
@@ -43,6 +43,14 @@
43#define PT_ACC1L 18 43#define PT_ACC1L 18
44#define PT_ACCH PT_ACC0H 44#define PT_ACCH PT_ACC0H
45#define PT_ACCL PT_ACC0L 45#define PT_ACCL PT_ACC0L
46#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
47#define PT_ACCH 15
48#define PT_ACCL 16
49#define PT_DUMMY_ACC1H 17
50#define PT_DUMMY_ACC1L 18
51#else
52#error unknown isa conifiguration
53#endif
46#define PT_PSW 19 54#define PT_PSW 19
47#define PT_BPC 20 55#define PT_BPC 20
48#define PT_BBPSW 21 56#define PT_BBPSW 21
@@ -52,21 +60,6 @@
52#define PT_LR 25 60#define PT_LR 25
53#define PT_SPI 26 61#define PT_SPI 26
54#define PT_ORIGR0 27 62#define PT_ORIGR0 27
55#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
56#define PT_ACCH 15
57#define PT_ACCL 16
58#define PT_PSW 17
59#define PT_BPC 18
60#define PT_BBPSW 19
61#define PT_BBPC 20
62#define PT_SPU 21
63#define PT_FP 22
64#define PT_LR 23
65#define PT_SPI 24
66#define PT_ORIGR0 25
67#else
68#error unknown isa conifiguration
69#endif
70 63
71/* virtual pt_reg entry for gdb */ 64/* virtual pt_reg entry for gdb */
72#define PT_PC 30 65#define PT_PC 30
@@ -121,6 +114,8 @@ struct pt_regs {
121#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) 114#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
122 unsigned long acch; 115 unsigned long acch;
123 unsigned long accl; 116 unsigned long accl;
117 unsigned long dummy_acc1h;
118 unsigned long dummy_acc1l;
124#else 119#else
125#error unknown isa configuration 120#error unknown isa configuration
126#endif 121#endif
diff --git a/include/asm-m32r/semaphore.h b/include/asm-m32r/semaphore.h
index bf447c52a0a1..81750edc8916 100644
--- a/include/asm-m32r/semaphore.h
+++ b/include/asm-m32r/semaphore.h
@@ -9,7 +9,7 @@
9 * SMP- and interrupt-safe semaphores.. 9 * SMP- and interrupt-safe semaphores..
10 * 10 *
11 * Copyright (C) 1996 Linus Torvalds 11 * Copyright (C) 1996 Linus Torvalds
12 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> 12 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
13 */ 13 */
14 14
15#include <linux/config.h> 15#include <linux/config.h>
@@ -77,27 +77,8 @@ asmlinkage void __up(struct semaphore * sem);
77 */ 77 */
78static inline void down(struct semaphore * sem) 78static inline void down(struct semaphore * sem)
79{ 79{
80 unsigned long flags;
81 long count;
82
83 might_sleep(); 80 might_sleep();
84 local_irq_save(flags); 81 if (unlikely(atomic_dec_return(&sem->count) < 0))
85 __asm__ __volatile__ (
86 "# down \n\t"
87 DCACHE_CLEAR("%0", "r4", "%1")
88 M32R_LOCK" %0, @%1; \n\t"
89 "addi %0, #-1; \n\t"
90 M32R_UNLOCK" %0, @%1; \n\t"
91 : "=&r" (count)
92 : "r" (&sem->count)
93 : "memory"
94#ifdef CONFIG_CHIP_M32700_TS1
95 , "r4"
96#endif /* CONFIG_CHIP_M32700_TS1 */
97 );
98 local_irq_restore(flags);
99
100 if (unlikely(count < 0))
101 __down(sem); 82 __down(sem);
102} 83}
103 84
@@ -107,28 +88,10 @@ static inline void down(struct semaphore * sem)
107 */ 88 */
108static inline int down_interruptible(struct semaphore * sem) 89static inline int down_interruptible(struct semaphore * sem)
109{ 90{
110 unsigned long flags;
111 long count;
112 int result = 0; 91 int result = 0;
113 92
114 might_sleep(); 93 might_sleep();
115 local_irq_save(flags); 94 if (unlikely(atomic_dec_return(&sem->count) < 0))
116 __asm__ __volatile__ (
117 "# down_interruptible \n\t"
118 DCACHE_CLEAR("%0", "r4", "%1")
119 M32R_LOCK" %0, @%1; \n\t"
120 "addi %0, #-1; \n\t"
121 M32R_UNLOCK" %0, @%1; \n\t"
122 : "=&r" (count)
123 : "r" (&sem->count)
124 : "memory"
125#ifdef CONFIG_CHIP_M32700_TS1
126 , "r4"
127#endif /* CONFIG_CHIP_M32700_TS1 */
128 );
129 local_irq_restore(flags);
130
131 if (unlikely(count < 0))
132 result = __down_interruptible(sem); 95 result = __down_interruptible(sem);
133 96
134 return result; 97 return result;
@@ -174,26 +137,7 @@ static inline int down_trylock(struct semaphore * sem)
174 */ 137 */
175static inline void up(struct semaphore * sem) 138static inline void up(struct semaphore * sem)
176{ 139{
177 unsigned long flags; 140 if (unlikely(atomic_inc_return(&sem->count) <= 0))
178 long count;
179
180 local_irq_save(flags);
181 __asm__ __volatile__ (
182 "# up \n\t"
183 DCACHE_CLEAR("%0", "r4", "%1")
184 M32R_LOCK" %0, @%1; \n\t"
185 "addi %0, #1; \n\t"
186 M32R_UNLOCK" %0, @%1; \n\t"
187 : "=&r" (count)
188 : "r" (&sem->count)
189 : "memory"
190#ifdef CONFIG_CHIP_M32700_TS1
191 , "r4"
192#endif /* CONFIG_CHIP_M32700_TS1 */
193 );
194 local_irq_restore(flags);
195
196 if (unlikely(count <= 0))
197 __up(sem); 141 __up(sem);
198} 142}
199 143
diff --git a/include/asm-m32r/sigcontext.h b/include/asm-m32r/sigcontext.h
index c233e2def2a3..942b8a30937d 100644
--- a/include/asm-m32r/sigcontext.h
+++ b/include/asm-m32r/sigcontext.h
@@ -32,6 +32,8 @@ struct sigcontext {
32#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) 32#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
33 unsigned long sc_acch; 33 unsigned long sc_acch;
34 unsigned long sc_accl; 34 unsigned long sc_accl;
35 unsigned long sc_dummy_acc1h;
36 unsigned long sc_dummy_acc1l;
35#else 37#else
36#error unknown isa configuration 38#error unknown isa configuration
37#endif 39#endif
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index c5ab5da56d21..e55013f378e5 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -6,8 +6,8 @@
6 * License. See the file "COPYING" in the main directory of this archive 6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details. 7 * for more details.
8 * 8 *
9 * Copyright (C) 2001 by Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto 9 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> 10 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
@@ -19,49 +19,28 @@
19 * switch_to(prev, next) should switch from task `prev' to `next' 19 * switch_to(prev, next) should switch from task `prev' to `next'
20 * `prev' will never be the same as `next'. 20 * `prev' will never be the same as `next'.
21 * 21 *
22 * `next' and `prev' should be struct task_struct, but it isn't always defined 22 * `next' and `prev' should be task_t, but it isn't always defined
23 */ 23 */
24 24
25#define switch_to(prev, next, last) do { \ 25#define switch_to(prev, next, last) do { \
26 register unsigned long arg0 __asm__ ("r0") = (unsigned long)prev; \
27 register unsigned long arg1 __asm__ ("r1") = (unsigned long)next; \
28 register unsigned long *oldsp __asm__ ("r2") = &(prev->thread.sp); \
29 register unsigned long *newsp __asm__ ("r3") = &(next->thread.sp); \
30 register unsigned long *oldlr __asm__ ("r4") = &(prev->thread.lr); \
31 register unsigned long *newlr __asm__ ("r5") = &(next->thread.lr); \
32 register struct task_struct *__last __asm__ ("r6"); \
33 __asm__ __volatile__ ( \ 26 __asm__ __volatile__ ( \
34 "st r8, @-r15 \n\t" \ 27 " seth lr, #high(1f) \n" \
35 "st r9, @-r15 \n\t" \ 28 " or3 lr, lr, #low(1f) \n" \
36 "st r10, @-r15 \n\t" \ 29 " st lr, @%4 ; store old LR \n" \
37 "st r11, @-r15 \n\t" \ 30 " ld lr, @%5 ; load new LR \n" \
38 "st r12, @-r15 \n\t" \ 31 " st sp, @%2 ; store old SP \n" \
39 "st r13, @-r15 \n\t" \ 32 " ld sp, @%3 ; load new SP \n" \
40 "st r14, @-r15 \n\t" \ 33 " push %1 ; store `prev' on new stack \n" \
41 "seth r14, #high(1f) \n\t" \ 34 " jmp lr \n" \
42 "or3 r14, r14, #low(1f) \n\t" \ 35 " .fillinsn \n" \
43 "st r14, @r4 ; store old LR \n\t" \ 36 "1: \n" \
44 "st r15, @r2 ; store old SP \n\t" \ 37 " pop %0 ; restore `__last' from new stack \n" \
45 "ld r15, @r3 ; load new SP \n\t" \ 38 : "=r" (last) \
46 "st r0, @-r15 ; store 'prev' onto new stack \n\t" \ 39 : "0" (prev), \
47 "ld r14, @r5 ; load new LR \n\t" \ 40 "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
48 "jmp r14 \n\t" \ 41 "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
49 ".fillinsn \n " \ 42 : "memory", "lr" \
50 "1: \n\t" \
51 "ld r6, @r15+ ; load 'prev' from new stack \n\t" \
52 "ld r14, @r15+ \n\t" \
53 "ld r13, @r15+ \n\t" \
54 "ld r12, @r15+ \n\t" \
55 "ld r11, @r15+ \n\t" \
56 "ld r10, @r15+ \n\t" \
57 "ld r9, @r15+ \n\t" \
58 "ld r8, @r15+ \n\t" \
59 : "=&r" (__last) \
60 : "r" (arg0), "r" (arg1), "r" (oldsp), "r" (newsp), \
61 "r" (oldlr), "r" (newlr) \
62 : "memory" \
63 ); \ 43 ); \
64 last = __last; \
65} while(0) 44} while(0)
66 45
67/* 46/*
@@ -167,8 +146,8 @@ extern void __xchg_called_with_bad_pointer(void);
167#define DCACHE_CLEAR(reg0, reg1, addr) 146#define DCACHE_CLEAR(reg0, reg1, addr)
168#endif /* CONFIG_CHIP_M32700_TS1 */ 147#endif /* CONFIG_CHIP_M32700_TS1 */
169 148
170static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, 149static inline unsigned long
171 int size) 150__xchg(unsigned long x, volatile void * ptr, int size)
172{ 151{
173 unsigned long flags; 152 unsigned long flags;
174 unsigned long tmp = 0; 153 unsigned long tmp = 0;
@@ -220,7 +199,7 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
220 199
221#define __HAVE_ARCH_CMPXCHG 1 200#define __HAVE_ARCH_CMPXCHG 1
222 201
223static __inline__ unsigned long 202static inline unsigned long
224__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new) 203__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
225{ 204{
226 unsigned long flags; 205 unsigned long flags;
@@ -254,7 +233,7 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
254 if something tries to do an invalid cmpxchg(). */ 233 if something tries to do an invalid cmpxchg(). */
255extern void __cmpxchg_called_with_bad_pointer(void); 234extern void __cmpxchg_called_with_bad_pointer(void);
256 235
257static __inline__ unsigned long 236static inline unsigned long
258__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) 237__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
259{ 238{
260 switch (size) { 239 switch (size) {