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-rw-r--r--include/asm-m32r/checksum.h52
-rw-r--r--include/asm-m32r/device.h7
-rw-r--r--include/asm-m32r/ide.h3
-rw-r--r--include/asm-m32r/m32102.h7
-rw-r--r--include/asm-m32r/ptrace.h28
-rw-r--r--include/asm-m32r/setup.h9
-rw-r--r--include/asm-m32r/sigcontext.h13
-rw-r--r--include/asm-m32r/termbits.h11
-rw-r--r--include/asm-m32r/unistd.h111
9 files changed, 61 insertions, 180 deletions
diff --git a/include/asm-m32r/checksum.h b/include/asm-m32r/checksum.h
index 877ebf46e9ff..a7a7c4f44abe 100644
--- a/include/asm-m32r/checksum.h
+++ b/include/asm-m32r/checksum.h
@@ -31,8 +31,7 @@
31 * 31 *
32 * it's best to have buff aligned on a 32-bit boundary 32 * it's best to have buff aligned on a 32-bit boundary
33 */ 33 */
34asmlinkage unsigned int csum_partial(const unsigned char *buff, 34asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
35 int len, unsigned int sum);
36 35
37/* 36/*
38 * The same as csum_partial, but copies from src while it checksums. 37 * The same as csum_partial, but copies from src while it checksums.
@@ -40,24 +39,22 @@ asmlinkage unsigned int csum_partial(const unsigned char *buff,
40 * Here even more important to align src and dst on a 32-bit (or even 39 * Here even more important to align src and dst on a 32-bit (or even
41 * better 64-bit) boundary 40 * better 64-bit) boundary
42 */ 41 */
43extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, 42extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
44 unsigned char *dst, 43 int len, __wsum sum);
45 int len, unsigned int sum);
46 44
47/* 45/*
48 * This is a new version of the above that records errors it finds in *errp, 46 * This is a new version of the above that records errors it finds in *errp,
49 * but continues and zeros thre rest of the buffer. 47 * but continues and zeros thre rest of the buffer.
50 */ 48 */
51extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, 49extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
52 unsigned char *dst, 50 int len, __wsum sum,
53 int len, unsigned int sum,
54 int *err_ptr); 51 int *err_ptr);
55 52
56/* 53/*
57 * Fold a partial checksum 54 * Fold a partial checksum
58 */ 55 */
59 56
60static inline unsigned int csum_fold(unsigned int sum) 57static inline __sum16 csum_fold(__wsum sum)
61{ 58{
62 unsigned long tmpreg; 59 unsigned long tmpreg;
63 __asm__( 60 __asm__(
@@ -72,16 +69,17 @@ static inline unsigned int csum_fold(unsigned int sum)
72 : "0" (sum) 69 : "0" (sum)
73 : "cbit" 70 : "cbit"
74 ); 71 );
75 return sum; 72 return (__force __sum16)sum;
76} 73}
77 74
78/* 75/*
79 * This is a version of ip_compute_csum() optimized for IP headers, 76 * This is a version of ip_compute_csum() optimized for IP headers,
80 * which always checksum on 4 octet boundaries. 77 * which always checksum on 4 octet boundaries.
81 */ 78 */
82static inline unsigned short ip_fast_csum(unsigned char * iph, 79static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
83 unsigned int ihl) { 80{
84 unsigned long sum, tmpreg0, tmpreg1; 81 unsigned long tmpreg0, tmpreg1;
82 __wsum sum;
85 83
86 __asm__ __volatile__( 84 __asm__ __volatile__(
87 " ld %0, @%1+ \n" 85 " ld %0, @%1+ \n"
@@ -115,16 +113,15 @@ static inline unsigned short ip_fast_csum(unsigned char * iph,
115 return csum_fold(sum); 113 return csum_fold(sum);
116} 114}
117 115
118static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, 116static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
119 unsigned long daddr,
120 unsigned short len, 117 unsigned short len,
121 unsigned short proto, 118 unsigned short proto,
122 unsigned int sum) 119 __wsum sum)
123{ 120{
124#if defined(__LITTLE_ENDIAN) 121#if defined(__LITTLE_ENDIAN)
125 unsigned long len_proto = (ntohs(len)<<16)+proto*256; 122 unsigned long len_proto = (proto + len) << 8;
126#else 123#else
127 unsigned long len_proto = (proto<<16)+len; 124 unsigned long len_proto = proto + len;
128#endif 125#endif
129 unsigned long tmpreg; 126 unsigned long tmpreg;
130 127
@@ -147,11 +144,10 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
147 * computes the checksum of the TCP/UDP pseudo-header 144 * computes the checksum of the TCP/UDP pseudo-header
148 * returns a 16-bit checksum, already complemented 145 * returns a 16-bit checksum, already complemented
149 */ 146 */
150static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, 147static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
151 unsigned long daddr,
152 unsigned short len, 148 unsigned short len,
153 unsigned short proto, 149 unsigned short proto,
154 unsigned int sum) 150 __wsum sum)
155{ 151{
156 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); 152 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
157} 153}
@@ -161,16 +157,16 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr,
161 * in icmp.c 157 * in icmp.c
162 */ 158 */
163 159
164static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { 160static inline __sum16 ip_compute_csum(const void *buff, int len)
161{
165 return csum_fold (csum_partial(buff, len, 0)); 162 return csum_fold (csum_partial(buff, len, 0));
166} 163}
167 164
168#define _HAVE_ARCH_IPV6_CSUM 165#define _HAVE_ARCH_IPV6_CSUM
169static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, 166static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
170 struct in6_addr *daddr, 167 const struct in6_addr *daddr,
171 __u16 len, 168 __u32 len, unsigned short proto,
172 unsigned short proto, 169 __wsum sum)
173 unsigned int sum)
174{ 170{
175 unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3; 171 unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3;
176 __asm__( 172 __asm__(
@@ -197,7 +193,7 @@ static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
197 : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1), 193 : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1),
198 "=&r" (tmpreg2), "=&r" (tmpreg3) 194 "=&r" (tmpreg2), "=&r" (tmpreg3)
199 : "r" (saddr), "r" (daddr), 195 : "r" (saddr), "r" (daddr),
200 "r" (htonl((__u32) (len))), "r" (htonl(proto)), "0" (sum) 196 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
201 : "cbit" 197 : "cbit"
202 ); 198 );
203 199
diff --git a/include/asm-m32r/device.h b/include/asm-m32r/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/include/asm-m32r/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-m32r/ide.h b/include/asm-m32r/ide.h
index 219a0f74eff3..c82ebe8f250d 100644
--- a/include/asm-m32r/ide.h
+++ b/include/asm-m32r/ide.h
@@ -32,7 +32,8 @@
32static __inline__ int ide_default_irq(unsigned long base) 32static __inline__ int ide_default_irq(unsigned long base)
33{ 33{
34 switch (base) { 34 switch (base) {
35#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) 35#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) \
36 || defined(CONFIG_PLAT_OPSPUT)
36 case 0x1f0: return PLD_IRQ_CFIREQ; 37 case 0x1f0: return PLD_IRQ_CFIREQ;
37 default: 38 default:
38 return 0; 39 return 0;
diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h
index a1f0d1fe9eb8..52807f8db166 100644
--- a/include/asm-m32r/m32102.h
+++ b/include/asm-m32r/m32102.h
@@ -104,7 +104,8 @@
104#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ 104#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
105#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ 105#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
106 106
107#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32104) 107#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
108 || defined(CONFIG_CHIP_M32104)
108#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */ 109#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
109#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */ 110#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
110#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */ 111#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
@@ -117,7 +118,7 @@
117#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */ 118#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
118#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */ 119#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
119#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */ 120#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
120#else /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ 121#else
121#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ 122#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
122#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ 123#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
123#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ 124#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
@@ -130,7 +131,7 @@
130#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ 131#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
131#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ 132#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
132#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ 133#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
133#endif /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ 134#endif
134 135
135#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ 136#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
136#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ 137#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h
index 2d2a6c97331e..632b4ce4269a 100644
--- a/include/asm-m32r/ptrace.h
+++ b/include/asm-m32r/ptrace.h
@@ -33,21 +33,10 @@
33#define PT_R15 PT_SP 33#define PT_R15 PT_SP
34 34
35/* processor status and miscellaneous context registers. */ 35/* processor status and miscellaneous context registers. */
36#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
37#define PT_ACC0H 15 36#define PT_ACC0H 15
38#define PT_ACC0L 16 37#define PT_ACC0L 16
39#define PT_ACC1H 17 38#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
40#define PT_ACC1L 18 39#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
41#define PT_ACCH PT_ACC0H
42#define PT_ACCL PT_ACC0L
43#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
44#define PT_ACCH 15
45#define PT_ACCL 16
46#define PT_DUMMY_ACC1H 17
47#define PT_DUMMY_ACC1L 18
48#else
49#error unknown isa conifiguration
50#endif
51#define PT_PSW 19 40#define PT_PSW 19
52#define PT_BPC 20 41#define PT_BPC 20
53#define PT_BBPSW 21 42#define PT_BBPSW 21
@@ -103,19 +92,10 @@ struct pt_regs {
103 long syscall_nr; 92 long syscall_nr;
104 93
105 /* Saved main processor status and miscellaneous context registers. */ 94 /* Saved main processor status and miscellaneous context registers. */
106#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
107 unsigned long acc0h; 95 unsigned long acc0h;
108 unsigned long acc0l; 96 unsigned long acc0l;
109 unsigned long acc1h; 97 unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
110 unsigned long acc1l; 98 unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
111#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
112 unsigned long acch;
113 unsigned long accl;
114 unsigned long dummy_acc1h;
115 unsigned long dummy_acc1l;
116#else
117#error unknown isa configuration
118#endif
119 unsigned long psw; 99 unsigned long psw;
120 unsigned long bpc; /* saved PC for TRAP syscalls */ 100 unsigned long bpc; /* saved PC for TRAP syscalls */
121 unsigned long bbpsw; 101 unsigned long bbpsw;
diff --git a/include/asm-m32r/setup.h b/include/asm-m32r/setup.h
index 52f4fa29abfc..6a0b32202d4e 100644
--- a/include/asm-m32r/setup.h
+++ b/include/asm-m32r/setup.h
@@ -1,6 +1,11 @@
1/* 1/*
2 * This is set up by the setup-routine at boot-time 2 * This is set up by the setup-routine at boot-time
3 */ 3 */
4
5#define COMMAND_LINE_SIZE 512
6
7#ifdef __KERNEL__
8
4#define PARAM ((unsigned char *)empty_zero_page) 9#define PARAM ((unsigned char *)empty_zero_page)
5 10
6#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) 11#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
@@ -18,8 +23,6 @@
18 23
19#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200)) 24#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200))
20 25
21#define COMMAND_LINE_SIZE (512)
22
23#define RAMDISK_IMAGE_START_MASK (0x07FF) 26#define RAMDISK_IMAGE_START_MASK (0x07FF)
24#define RAMDISK_PROMPT_FLAG (0x8000) 27#define RAMDISK_PROMPT_FLAG (0x8000)
25#define RAMDISK_LOAD_FLAG (0x4000) 28#define RAMDISK_LOAD_FLAG (0x4000)
@@ -27,3 +30,5 @@
27extern unsigned long memory_start; 30extern unsigned long memory_start;
28extern unsigned long memory_end; 31extern unsigned long memory_end;
29 32
33#endif /* __KERNEL__ */
34
diff --git a/include/asm-m32r/sigcontext.h b/include/asm-m32r/sigcontext.h
index 73025c0c41a1..62537dc4dec9 100644
--- a/include/asm-m32r/sigcontext.h
+++ b/include/asm-m32r/sigcontext.h
@@ -23,19 +23,10 @@ struct sigcontext {
23 unsigned long sc_r12; 23 unsigned long sc_r12;
24 24
25 /* Saved main processor status and miscellaneous context registers. */ 25 /* Saved main processor status and miscellaneous context registers. */
26#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
27 unsigned long sc_acc0h; 26 unsigned long sc_acc0h;
28 unsigned long sc_acc0l; 27 unsigned long sc_acc0l;
29 unsigned long sc_acc1h; 28 unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */
30 unsigned long sc_acc1l; 29 unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */
31#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
32 unsigned long sc_acch;
33 unsigned long sc_accl;
34 unsigned long sc_dummy_acc1h;
35 unsigned long sc_dummy_acc1l;
36#else
37#error unknown isa configuration
38#endif
39 unsigned long sc_psw; 30 unsigned long sc_psw;
40 unsigned long sc_bpc; /* saved PC for TRAP syscalls */ 31 unsigned long sc_bpc; /* saved PC for TRAP syscalls */
41 unsigned long sc_bbpsw; 32 unsigned long sc_bbpsw;
diff --git a/include/asm-m32r/termbits.h b/include/asm-m32r/termbits.h
index 5ace3702df75..faf2bd0504c1 100644
--- a/include/asm-m32r/termbits.h
+++ b/include/asm-m32r/termbits.h
@@ -19,6 +19,17 @@ struct termios {
19 cc_t c_cc[NCCS]; /* control characters */ 19 cc_t c_cc[NCCS]; /* control characters */
20}; 20};
21 21
22struct ktermios {
23 tcflag_t c_iflag; /* input mode flags */
24 tcflag_t c_oflag; /* output mode flags */
25 tcflag_t c_cflag; /* control mode flags */
26 tcflag_t c_lflag; /* local mode flags */
27 cc_t c_line; /* line discipline */
28 cc_t c_cc[NCCS]; /* control characters */
29 speed_t c_ispeed; /* input speed */
30 speed_t c_ospeed; /* output speed */
31};
32
22/* c_cc characters */ 33/* c_cc characters */
23#define VINTR 0 34#define VINTR 0
24#define VQUIT 1 35#define VQUIT 1
diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h
index 95aa34298d82..5b66bd3c6ed6 100644
--- a/include/asm-m32r/unistd.h
+++ b/include/asm-m32r/unistd.h
@@ -296,117 +296,6 @@
296#ifdef __KERNEL__ 296#ifdef __KERNEL__
297 297
298#define NR_syscalls 285 298#define NR_syscalls 285
299#include <linux/err.h>
300
301/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see
302 * <asm-m32r/errno.h>
303 */
304
305#include <asm/syscall.h> /* SYSCALL_* */
306
307#define __syscall_return(type, res) \
308do { \
309 if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \
310 /* Avoid using "res" which is declared to be in register r0; \
311 errno might expand to a function call and clobber it. */ \
312 int __err = -(res); \
313 errno = __err; \
314 res = -1; \
315 } \
316 return (type) (res); \
317} while (0)
318
319#define _syscall0(type,name) \
320type name(void) \
321{ \
322register long __scno __asm__ ("r7") = __NR_##name; \
323register long __res __asm__("r0"); \
324__asm__ __volatile__ (\
325 "trap #" SYSCALL_VECTOR "|| nop"\
326 : "=r" (__res) \
327 : "r" (__scno) \
328 : "memory"); \
329__syscall_return(type,__res); \
330}
331
332#define _syscall1(type,name,type1,arg1) \
333type name(type1 arg1) \
334{ \
335register long __scno __asm__ ("r7") = __NR_##name; \
336register long __res __asm__ ("r0") = (long)(arg1); \
337__asm__ __volatile__ (\
338 "trap #" SYSCALL_VECTOR "|| nop"\
339 : "=r" (__res) \
340 : "r" (__scno), "0" (__res) \
341 : "memory"); \
342__syscall_return(type,__res); \
343}
344
345#define _syscall2(type,name,type1,arg1,type2,arg2) \
346type name(type1 arg1,type2 arg2) \
347{ \
348register long __scno __asm__ ("r7") = __NR_##name; \
349register long __arg2 __asm__ ("r1") = (long)(arg2); \
350register long __res __asm__ ("r0") = (long)(arg1); \
351__asm__ __volatile__ (\
352 "trap #" SYSCALL_VECTOR "|| nop"\
353 : "=r" (__res) \
354 : "r" (__scno), "0" (__res), "r" (__arg2) \
355 : "memory"); \
356__syscall_return(type,__res); \
357}
358
359#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
360type name(type1 arg1,type2 arg2,type3 arg3) \
361{ \
362register long __scno __asm__ ("r7") = __NR_##name; \
363register long __arg3 __asm__ ("r2") = (long)(arg3); \
364register long __arg2 __asm__ ("r1") = (long)(arg2); \
365register long __res __asm__ ("r0") = (long)(arg1); \
366__asm__ __volatile__ (\
367 "trap #" SYSCALL_VECTOR "|| nop"\
368 : "=r" (__res) \
369 : "r" (__scno), "0" (__res), "r" (__arg2), \
370 "r" (__arg3) \
371 : "memory"); \
372__syscall_return(type,__res); \
373}
374
375#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
376type name(type1 arg1,type2 arg2,type3 arg3,type4 arg4) \
377{ \
378register long __scno __asm__ ("r7") = __NR_##name; \
379register long __arg4 __asm__ ("r3") = (long)(arg4); \
380register long __arg3 __asm__ ("r2") = (long)(arg3); \
381register long __arg2 __asm__ ("r1") = (long)(arg2); \
382register long __res __asm__ ("r0") = (long)(arg1); \
383__asm__ __volatile__ (\
384 "trap #" SYSCALL_VECTOR "|| nop"\
385 : "=r" (__res) \
386 : "r" (__scno), "0" (__res), "r" (__arg2), \
387 "r" (__arg3), "r" (__arg4) \
388 : "memory"); \
389__syscall_return(type,__res); \
390}
391
392#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
393 type5,arg5) \
394type name(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
395{ \
396register long __scno __asm__ ("r7") = __NR_##name; \
397register long __arg5 __asm__ ("r4") = (long)(arg5); \
398register long __arg4 __asm__ ("r3") = (long)(arg4); \
399register long __arg3 __asm__ ("r2") = (long)(arg3); \
400register long __arg2 __asm__ ("r1") = (long)(arg2); \
401register long __res __asm__ ("r0") = (long)(arg1); \
402__asm__ __volatile__ (\
403 "trap #" SYSCALL_VECTOR "|| nop"\
404 : "=r" (__res) \
405 : "r" (__scno), "0" (__res), "r" (__arg2), \
406 "r" (__arg3), "r" (__arg4), "r" (__arg5) \
407 : "memory"); \
408__syscall_return(type,__res); \
409}
410 299
411#define __ARCH_WANT_IPC_PARSE_VERSION 300#define __ARCH_WANT_IPC_PARSE_VERSION
412#define __ARCH_WANT_STAT64 301#define __ARCH_WANT_STAT64