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Diffstat (limited to 'include/asm-m32r/system.h')
-rw-r--r--include/asm-m32r/system.h76
1 files changed, 68 insertions, 8 deletions
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index 73348c3f858b..dcf619a0a0b0 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#include <asm/assembler.h>
14 15
15#ifdef __KERNEL__ 16#ifdef __KERNEL__
16 17
@@ -68,12 +69,12 @@
68} while(0) 69} while(0)
69 70
70/* Interrupt Control */ 71/* Interrupt Control */
71#if !defined(CONFIG_CHIP_M32102) 72#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
72#define local_irq_enable() \ 73#define local_irq_enable() \
73 __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory") 74 __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
74#define local_irq_disable() \ 75#define local_irq_disable() \
75 __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory") 76 __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
76#else /* CONFIG_CHIP_M32102 */ 77#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
77static inline void local_irq_enable(void) 78static inline void local_irq_enable(void)
78{ 79{
79 unsigned long tmpreg; 80 unsigned long tmpreg;
@@ -95,7 +96,7 @@ static inline void local_irq_disable(void)
95 "mvtc %0, psw \n\t" 96 "mvtc %0, psw \n\t"
96 : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory"); 97 : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
97} 98}
98#endif /* CONFIG_CHIP_M32102 */ 99#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
99 100
100#define local_save_flags(x) \ 101#define local_save_flags(x) \
101 __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */) 102 __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
@@ -104,13 +105,13 @@ static inline void local_irq_disable(void)
104 __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \ 105 __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
105 : "r" (x) : "cbit", "memory") 106 : "r" (x) : "cbit", "memory")
106 107
107#if !defined(CONFIG_CHIP_M32102) 108#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
108#define local_irq_save(x) \ 109#define local_irq_save(x) \
109 __asm__ __volatile__( \ 110 __asm__ __volatile__( \
110 "mvfc %0, psw; \n\t" \ 111 "mvfc %0, psw; \n\t" \
111 "clrpsw #0x40 -> nop; \n\t" \ 112 "clrpsw #0x40 -> nop; \n\t" \
112 : "=r" (x) : /* no input */ : "memory") 113 : "=r" (x) : /* no input */ : "memory")
113#else /* CONFIG_CHIP_M32102 */ 114#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
114#define local_irq_save(x) \ 115#define local_irq_save(x) \
115 ({ \ 116 ({ \
116 unsigned long tmpreg; \ 117 unsigned long tmpreg; \
@@ -123,7 +124,7 @@ static inline void local_irq_disable(void)
123 : "=r" (x), "=&r" (tmpreg) \ 124 : "=r" (x), "=&r" (tmpreg) \
124 : : "cbit", "memory"); \ 125 : : "cbit", "memory"); \
125 }) 126 })
126#endif /* CONFIG_CHIP_M32102 */ 127#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
127 128
128#define irqs_disabled() \ 129#define irqs_disabled() \
129 ({ \ 130 ({ \
@@ -132,8 +133,6 @@ static inline void local_irq_disable(void)
132 !(flags & 0x40); \ 133 !(flags & 0x40); \
133 }) 134 })
134 135
135#endif /* __KERNEL__ */
136
137#define nop() __asm__ __volatile__ ("nop" : : ) 136#define nop() __asm__ __volatile__ ("nop" : : )
138 137
139#define xchg(ptr,x) \ 138#define xchg(ptr,x) \
@@ -213,6 +212,67 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
213 return (tmp); 212 return (tmp);
214} 213}
215 214
215#define __HAVE_ARCH_CMPXCHG 1
216
217static __inline__ unsigned long
218__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
219{
220 unsigned long flags;
221 unsigned int retval;
222
223 local_irq_save(flags);
224 __asm__ __volatile__ (
225 DCACHE_CLEAR("%0", "r4", "%1")
226 M32R_LOCK" %0, @%1; \n"
227 " bne %0, %2, 1f; \n"
228 M32R_UNLOCK" %3, @%1; \n"
229 " bra 2f; \n"
230 " .fillinsn \n"
231 "1:"
232 M32R_UNLOCK" %2, @%1; \n"
233 " .fillinsn \n"
234 "2:"
235 : "=&r" (retval)
236 : "r" (p), "r" (old), "r" (new)
237 : "cbit", "memory"
238#ifdef CONFIG_CHIP_M32700_TS1
239 , "r4"
240#endif /* CONFIG_CHIP_M32700_TS1 */
241 );
242 local_irq_restore(flags);
243
244 return retval;
245}
246
247/* This function doesn't exist, so you'll get a linker error
248 if something tries to do an invalid cmpxchg(). */
249extern void __cmpxchg_called_with_bad_pointer(void);
250
251static __inline__ unsigned long
252__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
253{
254 switch (size) {
255 case 4:
256 return __cmpxchg_u32(ptr, old, new);
257#if 0 /* we don't have __cmpxchg_u64 */
258 case 8:
259 return __cmpxchg_u64(ptr, old, new);
260#endif /* 0 */
261 }
262 __cmpxchg_called_with_bad_pointer();
263 return old;
264}
265
266#define cmpxchg(ptr,o,n) \
267 ({ \
268 __typeof__(*(ptr)) _o_ = (o); \
269 __typeof__(*(ptr)) _n_ = (n); \
270 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
271 (unsigned long)_n_, sizeof(*(ptr))); \
272 })
273
274#endif /* __KERNEL__ */
275
216/* 276/*
217 * Memory barrier. 277 * Memory barrier.
218 * 278 *