aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-m32r/m32104ut/m32104ut_pld.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-m32r/m32104ut/m32104ut_pld.h')
-rw-r--r--include/asm-m32r/m32104ut/m32104ut_pld.h163
1 files changed, 163 insertions, 0 deletions
diff --git a/include/asm-m32r/m32104ut/m32104ut_pld.h b/include/asm-m32r/m32104ut/m32104ut_pld.h
new file mode 100644
index 000000000000..a4eac20553df
--- /dev/null
+++ b/include/asm-m32r/m32104ut/m32104ut_pld.h
@@ -0,0 +1,163 @@
1/*
2 * include/asm/m32104ut/m32104ut_pld.h
3 *
4 * Definitions for Programable Logic Device(PLD) on M32104UT board.
5 * Based on m32700ut_pld.h
6 *
7 * Copyright (c) 2002 Takeo Takahashi
8 * Copyright (c) 2005 Naoto Sugai
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef _M32104UT_M32104UT_PLD_H
16#define _M32104UT_M32104UT_PLD_H
17
18#include <linux/config.h>
19
20#if defined(CONFIG_PLAT_M32104UT)
21#define PLD_PLAT_BASE 0x02c00000
22#else
23#error "no platform configuration"
24#endif
25
26#ifndef __ASSEMBLY__
27/*
28 * C functions use non-cache address.
29 */
30#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
31#define __reg8 (volatile unsigned char *)
32#define __reg16 (volatile unsigned short *)
33#define __reg32 (volatile unsigned int *)
34#else
35#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
36#define __reg8
37#define __reg16
38#define __reg32
39#endif /* __ASSEMBLY__ */
40
41/* CFC */
42#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
43#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
44#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
45#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
46
47/* MMC */
48#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
49#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
50#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
51#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
52#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
53#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
54#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
55#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
56#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
57#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
58#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
59#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
60
61/* ICU
62 * ICUISTS: status register
63 * ICUIREQ0: request register
64 * ICUIREQ1: request register
65 * ICUCR3: control register for CFIREQ# interrupt
66 * ICUCR4: control register for CFC Card insert interrupt
67 * ICUCR5: control register for CFC Card eject interrupt
68 * ICUCR6: control register for external interrupt
69 * ICUCR11: control register for MMC Card insert/eject interrupt
70 * ICUCR13: control register for SC error interrupt
71 * ICUCR14: control register for SC receive interrupt
72 * ICUCR15: control register for SC send interrupt
73 */
74
75#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
76#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
77#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
78#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
79#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
80#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
81#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
82#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
83#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
84
85#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
86#define PLD_ICUISTS_VECB_MASK (0xf000)
87#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
88#define PLD_ICUISTS_ISN_MASK (0x07c0)
89#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
90#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
91#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
92#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
93#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
94#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
95#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
96#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
97#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
98#define PLD_ICUCR_IEN (0x1000)
99#define PLD_ICUCR_IREQ (0x0100)
100#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
101#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
102#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
103#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
104#define PLD_ICUCR_ILEVEL0 (0x0000)
105#define PLD_ICUCR_ILEVEL1 (0x0001)
106#define PLD_ICUCR_ILEVEL2 (0x0002)
107#define PLD_ICUCR_ILEVEL3 (0x0003)
108#define PLD_ICUCR_ILEVEL4 (0x0004)
109#define PLD_ICUCR_ILEVEL5 (0x0005)
110#define PLD_ICUCR_ILEVEL6 (0x0006)
111#define PLD_ICUCR_ILEVEL7 (0x0007)
112
113/* Power Control of MMC and CF */
114#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
115#define PLD_CPCR_CDP 0x0001
116
117/* LED Control
118 *
119 * 1: DIP swich side
120 * 2: Reset switch side
121 */
122#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
123#define PLD_IOLED_1_ON 0x001
124#define PLD_IOLED_1_OFF 0x000
125#define PLD_IOLED_2_ON 0x002
126#define PLD_IOLED_2_OFF 0x000
127
128/* DIP Switch
129 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
130 * 1: -
131 * 2: -
132 * 3: -
133 */
134#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
135#define PLD_IOSWSTS_IOSW2 0x0200
136#define PLD_IOSWSTS_IOSW1 0x0100
137#define PLD_IOSWSTS_IOWP0 0x0001
138
139/* CRC */
140#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
141#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
142#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
143#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
144#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
145#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
146
147/* RTC */
148#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
149#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
150#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
151#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
152#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
153
154/* SIM Card */
155#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
156#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
157#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
158#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
159#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
160#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
161#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
162
163#endif /* _M32104UT_M32104UT_PLD_H */