diff options
Diffstat (limited to 'include/asm-m32r/assembler.h')
-rw-r--r-- | include/asm-m32r/assembler.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h index 47041d19d4a8..26351539b5ff 100644 --- a/include/asm-m32r/assembler.h +++ b/include/asm-m32r/assembler.h | |||
@@ -52,27 +52,27 @@ | |||
52 | .endm | 52 | .endm |
53 | 53 | ||
54 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | 54 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) |
55 | #define STI(reg) STI_M reg | 55 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg |
56 | .macro STI_M reg | 56 | .macro ENABLE_INTERRUPTS reg |
57 | setpsw #0x40 -> nop | 57 | setpsw #0x40 -> nop |
58 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | 58 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). |
59 | .endm | 59 | .endm |
60 | 60 | ||
61 | #define CLI(reg) CLI_M reg | 61 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg |
62 | .macro CLI_M reg | 62 | .macro DISABLE_INTERRUPTS reg |
63 | clrpsw #0x40 -> nop | 63 | clrpsw #0x40 -> nop |
64 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | 64 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). |
65 | .endm | 65 | .endm |
66 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | 66 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ |
67 | #define STI(reg) STI_M reg | 67 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg |
68 | .macro STI_M reg | 68 | .macro ENABLE_INTERRUPTS reg |
69 | mvfc \reg, psw | 69 | mvfc \reg, psw |
70 | or3 \reg, \reg, #0x0040 | 70 | or3 \reg, \reg, #0x0040 |
71 | mvtc \reg, psw | 71 | mvtc \reg, psw |
72 | .endm | 72 | .endm |
73 | 73 | ||
74 | #define CLI(reg) CLI_M reg | 74 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg |
75 | .macro CLI_M reg | 75 | .macro DISABLE_INTERRUPTS reg |
76 | mvfc \reg, psw | 76 | mvfc \reg, psw |
77 | and3 \reg, \reg, #0xffbf | 77 | and3 \reg, \reg, #0xffbf |
78 | mvtc \reg, psw | 78 | mvtc \reg, psw |