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-rw-r--r--include/asm-ia64/acpi-ext.h1
-rw-r--r--include/asm-ia64/auxvec.h11
-rw-r--r--include/asm-ia64/compat.h20
-rw-r--r--include/asm-ia64/elf.h8
-rw-r--r--include/asm-ia64/fcntl.h78
-rw-r--r--include/asm-ia64/futex.h53
-rw-r--r--include/asm-ia64/hdreg.h14
-rw-r--r--include/asm-ia64/hw_irq.h7
-rw-r--r--include/asm-ia64/iosapic.h4
-rw-r--r--include/asm-ia64/irq.h15
-rw-r--r--include/asm-ia64/kprobes.h1
-rw-r--r--include/asm-ia64/machvec_hpzx1.h21
-rw-r--r--include/asm-ia64/machvec_hpzx1_swiotlb.h3
-rw-r--r--include/asm-ia64/mca.h107
-rw-r--r--include/asm-ia64/mca_asm.h125
-rw-r--r--include/asm-ia64/meminit.h6
-rw-r--r--include/asm-ia64/mmzone.h10
-rw-r--r--include/asm-ia64/nodedata.h4
-rw-r--r--include/asm-ia64/page.h6
-rw-r--r--include/asm-ia64/pci.h13
-rw-r--r--include/asm-ia64/pgtable.h4
-rw-r--r--include/asm-ia64/processor.h3
-rw-r--r--include/asm-ia64/ptrace.h6
-rw-r--r--include/asm-ia64/sn/arch.h36
-rw-r--r--include/asm-ia64/sn/io.h11
-rw-r--r--include/asm-ia64/sn/klconfig.h34
-rw-r--r--include/asm-ia64/sn/l1.h12
-rw-r--r--include/asm-ia64/sn/nodepda.h1
-rw-r--r--include/asm-ia64/sn/sn_cpuid.h3
-rw-r--r--include/asm-ia64/sn/sn_feature_sets.h57
-rw-r--r--include/asm-ia64/sn/sn_sal.h95
-rw-r--r--include/asm-ia64/sn/tioca_provider.h14
-rw-r--r--include/asm-ia64/sn/tiocx.h3
-rw-r--r--include/asm-ia64/sn/xp.h2
-rw-r--r--include/asm-ia64/sparsemem.h20
-rw-r--r--include/asm-ia64/spinlock.h69
-rw-r--r--include/asm-ia64/spinlock_types.h21
-rw-r--r--include/asm-ia64/system.h1
-rw-r--r--include/asm-ia64/thread_info.h11
-rw-r--r--include/asm-ia64/topology.h23
-rw-r--r--include/asm-ia64/uaccess.h19
-rw-r--r--include/asm-ia64/unwind.h7
42 files changed, 499 insertions, 460 deletions
diff --git a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h
index 9271d74c64cc..56d2ddc97b30 100644
--- a/include/asm-ia64/acpi-ext.h
+++ b/include/asm-ia64/acpi-ext.h
@@ -11,6 +11,7 @@
11#define _ASM_IA64_ACPI_EXT_H 11#define _ASM_IA64_ACPI_EXT_H
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14#include <acpi/actypes.h>
14 15
15extern acpi_status hp_acpi_csr_space (acpi_handle, u64 *base, u64 *length); 16extern acpi_status hp_acpi_csr_space (acpi_handle, u64 *base, u64 *length);
16 17
diff --git a/include/asm-ia64/auxvec.h b/include/asm-ia64/auxvec.h
new file mode 100644
index 000000000000..23cebe5685b9
--- /dev/null
+++ b/include/asm-ia64/auxvec.h
@@ -0,0 +1,11 @@
1#ifndef _ASM_IA64_AUXVEC_H
2#define _ASM_IA64_AUXVEC_H
3
4/*
5 * Architecture-neutral AT_ values are in the range 0-17. Leave some room for more of
6 * them, start the architecture-specific ones at 32.
7 */
8#define AT_SYSINFO 32
9#define AT_SYSINFO_EHDR 33
10
11#endif /* _ASM_IA64_AUXVEC_H */
diff --git a/include/asm-ia64/compat.h b/include/asm-ia64/compat.h
index 0c05e5bad8a0..aaf11f4e9169 100644
--- a/include/asm-ia64/compat.h
+++ b/include/asm-ia64/compat.h
@@ -13,10 +13,10 @@ typedef s32 compat_time_t;
13typedef s32 compat_clock_t; 13typedef s32 compat_clock_t;
14typedef s32 compat_key_t; 14typedef s32 compat_key_t;
15typedef s32 compat_pid_t; 15typedef s32 compat_pid_t;
16typedef u16 compat_uid_t; 16typedef u16 __compat_uid_t;
17typedef u16 compat_gid_t; 17typedef u16 __compat_gid_t;
18typedef u32 compat_uid32_t; 18typedef u32 __compat_uid32_t;
19typedef u32 compat_gid32_t; 19typedef u32 __compat_gid32_t;
20typedef u16 compat_mode_t; 20typedef u16 compat_mode_t;
21typedef u32 compat_ino_t; 21typedef u32 compat_ino_t;
22typedef u16 compat_dev_t; 22typedef u16 compat_dev_t;
@@ -50,8 +50,8 @@ struct compat_stat {
50 compat_ino_t st_ino; 50 compat_ino_t st_ino;
51 compat_mode_t st_mode; 51 compat_mode_t st_mode;
52 compat_nlink_t st_nlink; 52 compat_nlink_t st_nlink;
53 compat_uid_t st_uid; 53 __compat_uid_t st_uid;
54 compat_gid_t st_gid; 54 __compat_gid_t st_gid;
55 compat_dev_t st_rdev; 55 compat_dev_t st_rdev;
56 u16 __pad2; 56 u16 __pad2;
57 u32 st_size; 57 u32 st_size;
@@ -120,10 +120,10 @@ typedef u32 compat_sigset_word;
120 120
121struct compat_ipc64_perm { 121struct compat_ipc64_perm {
122 compat_key_t key; 122 compat_key_t key;
123 compat_uid32_t uid; 123 __compat_uid32_t uid;
124 compat_gid32_t gid; 124 __compat_gid32_t gid;
125 compat_uid32_t cuid; 125 __compat_uid32_t cuid;
126 compat_gid32_t cgid; 126 __compat_gid32_t cgid;
127 unsigned short mode; 127 unsigned short mode;
128 unsigned short __pad1; 128 unsigned short __pad1;
129 unsigned short seq; 129 unsigned short seq;
diff --git a/include/asm-ia64/elf.h b/include/asm-ia64/elf.h
index 7d4ccc4b976e..446fce036fd9 100644
--- a/include/asm-ia64/elf.h
+++ b/include/asm-ia64/elf.h
@@ -12,6 +12,7 @@
12 12
13#include <asm/fpu.h> 13#include <asm/fpu.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/auxvec.h>
15 16
16/* 17/*
17 * This is used to ensure we don't load something for the wrong architecture. 18 * This is used to ensure we don't load something for the wrong architecture.
@@ -177,13 +178,6 @@ extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst);
177 relevant until we have real hardware to play with... */ 178 relevant until we have real hardware to play with... */
178#define ELF_PLATFORM NULL 179#define ELF_PLATFORM NULL
179 180
180/*
181 * Architecture-neutral AT_ values are in the range 0-17. Leave some room for more of
182 * them, start the architecture-specific ones at 32.
183 */
184#define AT_SYSINFO 32
185#define AT_SYSINFO_EHDR 33
186
187#ifdef __KERNEL__ 181#ifdef __KERNEL__
188#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) 182#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX)
189#define elf_read_implies_exec(ex, executable_stack) \ 183#define elf_read_implies_exec(ex, executable_stack) \
diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h
index cee16ea1780a..1dd275dc8f65 100644
--- a/include/asm-ia64/fcntl.h
+++ b/include/asm-ia64/fcntl.h
@@ -1,87 +1,13 @@
1#ifndef _ASM_IA64_FCNTL_H 1#ifndef _ASM_IA64_FCNTL_H
2#define _ASM_IA64_FCNTL_H 2#define _ASM_IA64_FCNTL_H
3/* 3/*
4 * Based on <asm-i386/fcntl.h>.
5 *
6 * Modified 1998-2000 4 * Modified 1998-2000
7 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co. 5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
8 */ 6 */
9 7
10/*
11 * open/fcntl - O_SYNC is only implemented on blocks devices and on
12 * files located on an ext2 file system
13 */
14#define O_ACCMODE 0003
15#define O_RDONLY 00
16#define O_WRONLY 01
17#define O_RDWR 02
18#define O_CREAT 0100 /* not fcntl */
19#define O_EXCL 0200 /* not fcntl */
20#define O_NOCTTY 0400 /* not fcntl */
21#define O_TRUNC 01000 /* not fcntl */
22#define O_APPEND 02000
23#define O_NONBLOCK 04000
24#define O_NDELAY O_NONBLOCK
25#define O_SYNC 010000
26#define FASYNC 020000 /* fcntl, for BSD compatibility */
27#define O_DIRECT 040000 /* direct disk access hint - currently ignored */
28#define O_LARGEFILE 0100000
29#define O_DIRECTORY 0200000 /* must be a directory */
30#define O_NOFOLLOW 0400000 /* don't follow links */
31#define O_NOATIME 01000000
32
33#define F_DUPFD 0 /* dup */
34#define F_GETFD 1 /* get close_on_exec */
35#define F_SETFD 2 /* set/clear close_on_exec */
36#define F_GETFL 3 /* get file->f_flags */
37#define F_SETFL 4 /* set file->f_flags */
38#define F_GETLK 5
39#define F_SETLK 6
40#define F_SETLKW 7
41
42#define F_SETOWN 8 /* for sockets. */
43#define F_GETOWN 9 /* for sockets. */
44#define F_SETSIG 10 /* for sockets. */
45#define F_GETSIG 11 /* for sockets. */
46
47/* for F_[GET|SET]FL */
48#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
49
50/* for posix fcntl() and lockf() */
51#define F_RDLCK 0
52#define F_WRLCK 1
53#define F_UNLCK 2
54
55/* for old implementation of bsd flock () */
56#define F_EXLCK 4 /* or 3 */
57#define F_SHLCK 8 /* or 4 */
58
59/* for leases */
60#define F_INPROGRESS 16
61
62/* operations for bsd flock(), also used by the kernel implementation */
63#define LOCK_SH 1 /* shared lock */
64#define LOCK_EX 2 /* exclusive lock */
65#define LOCK_NB 4 /* or'd with one of the above to prevent
66 blocking */
67#define LOCK_UN 8 /* remove lock */
68
69#define LOCK_MAND 32 /* This is a mandatory flock */
70#define LOCK_READ 64 /* ... Which allows concurrent read operations */
71#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
72#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
73
74struct flock {
75 short l_type;
76 short l_whence;
77 off_t l_start;
78 off_t l_len;
79 pid_t l_pid;
80};
81
82#define F_LINUX_SPECIFIC_BASE 1024
83
84#define force_o_largefile() \ 8#define force_o_largefile() \
85 (personality(current->personality) != PER_LINUX32) 9 (personality(current->personality) != PER_LINUX32)
86 10
11#include <asm-generic/fcntl.h>
12
87#endif /* _ASM_IA64_FCNTL_H */ 13#endif /* _ASM_IA64_FCNTL_H */
diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h
new file mode 100644
index 000000000000..9feff4ce1424
--- /dev/null
+++ b/include/asm-ia64/futex.h
@@ -0,0 +1,53 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 inc_preempt_count();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 dec_preempt_count();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52#endif
53#endif
diff --git a/include/asm-ia64/hdreg.h b/include/asm-ia64/hdreg.h
deleted file mode 100644
index 83b5161d2678..000000000000
--- a/include/asm-ia64/hdreg.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * linux/include/asm-ia64/hdreg.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7#warning this file is obsolete, please do not use it
8
9#ifndef __ASM_IA64_HDREG_H
10#define __ASM_IA64_HDREG_H
11
12typedef unsigned short ide_ioreg_t;
13
14#endif /* __ASM_IA64_HDREG_H */
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index 041ab8c51a64..0cf119b42f7d 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -116,13 +116,6 @@ __ia64_local_vector_to_irq (ia64_vector vec)
116 * and to obtain the irq descriptor for a given irq number. 116 * and to obtain the irq descriptor for a given irq number.
117 */ 117 */
118 118
119/* Return a pointer to the irq descriptor for IRQ. */
120static inline irq_desc_t *
121irq_descp (int irq)
122{
123 return irq_desc + irq;
124}
125
126/* Extract the IA-64 vector that corresponds to IRQ. */ 119/* Extract the IA-64 vector that corresponds to IRQ. */
127static inline ia64_vector 120static inline ia64_vector
128irq_to_vector (int irq) 121irq_to_vector (int irq)
diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h
index a429fe225b07..20f98f1751a1 100644
--- a/include/asm-ia64/iosapic.h
+++ b/include/asm-ia64/iosapic.h
@@ -80,12 +80,9 @@ extern int iosapic_remove (unsigned int gsi_base);
80#endif /* CONFIG_HOTPLUG */ 80#endif /* CONFIG_HOTPLUG */
81extern int gsi_to_vector (unsigned int gsi); 81extern int gsi_to_vector (unsigned int gsi);
82extern int gsi_to_irq (unsigned int gsi); 82extern int gsi_to_irq (unsigned int gsi);
83extern void iosapic_enable_intr (unsigned int vector);
84extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, 83extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity,
85 unsigned long trigger); 84 unsigned long trigger);
86#ifdef CONFIG_ACPI_DEALLOCATE_IRQ
87extern void iosapic_unregister_intr (unsigned int irq); 85extern void iosapic_unregister_intr (unsigned int irq);
88#endif
89extern void __init iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, 86extern void __init iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
90 unsigned long polarity, 87 unsigned long polarity,
91 unsigned long trigger); 88 unsigned long trigger);
@@ -97,7 +94,6 @@ extern int __init iosapic_register_platform_intr (u32 int_type,
97 unsigned long trigger); 94 unsigned long trigger);
98extern unsigned int iosapic_version (char __iomem *addr); 95extern unsigned int iosapic_version (char __iomem *addr);
99 96
100extern void iosapic_pci_fixup (int);
101#ifdef CONFIG_NUMA 97#ifdef CONFIG_NUMA
102extern void __devinit map_iosapic_to_node (unsigned int, int); 98extern void __devinit map_iosapic_to_node (unsigned int, int);
103#endif 99#endif
diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h
index bd07d11d9f37..dbe86c0bbce5 100644
--- a/include/asm-ia64/irq.h
+++ b/include/asm-ia64/irq.h
@@ -14,6 +14,11 @@
14#define NR_IRQS 256 14#define NR_IRQS 256
15#define NR_IRQ_VECTORS NR_IRQS 15#define NR_IRQ_VECTORS NR_IRQS
16 16
17/*
18 * IRQ line status macro IRQ_PER_CPU is used
19 */
20#define ARCH_HAS_IRQ_PER_CPU
21
17static __inline__ int 22static __inline__ int
18irq_canonicalize (int irq) 23irq_canonicalize (int irq)
19{ 24{
@@ -30,14 +35,4 @@ extern void disable_irq_nosync (unsigned int);
30extern void enable_irq (unsigned int); 35extern void enable_irq (unsigned int);
31extern void set_irq_affinity_info (unsigned int irq, int dest, int redir); 36extern void set_irq_affinity_info (unsigned int irq, int dest, int redir);
32 37
33#ifdef CONFIG_SMP
34extern void move_irq(int irq);
35#else
36#define move_irq(irq)
37#endif
38
39struct irqaction;
40struct pt_regs;
41int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
42
43#endif /* _ASM_IA64_IRQ_H */ 38#endif /* _ASM_IA64_IRQ_H */
diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h
index bf36a32e37e4..573a3574a24f 100644
--- a/include/asm-ia64/kprobes.h
+++ b/include/asm-ia64/kprobes.h
@@ -92,6 +92,7 @@ struct arch_specific_insn {
92 kprobe_opcode_t insn; 92 kprobe_opcode_t insn;
93 #define INST_FLAG_FIX_RELATIVE_IP_ADDR 1 93 #define INST_FLAG_FIX_RELATIVE_IP_ADDR 1
94 #define INST_FLAG_FIX_BRANCH_REG 2 94 #define INST_FLAG_FIX_BRANCH_REG 2
95 #define INST_FLAG_BREAK_INST 4
95 unsigned long inst_flag; 96 unsigned long inst_flag;
96 unsigned short target_br_reg; 97 unsigned short target_br_reg;
97}; 98};
diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h
index daafe504c5f4..e90daf9ce340 100644
--- a/include/asm-ia64/machvec_hpzx1.h
+++ b/include/asm-ia64/machvec_hpzx1.h
@@ -1,8 +1,7 @@
1#ifndef _ASM_IA64_MACHVEC_HPZX1_h 1#ifndef _ASM_IA64_MACHVEC_HPZX1_h
2#define _ASM_IA64_MACHVEC_HPZX1_h 2#define _ASM_IA64_MACHVEC_HPZX1_h
3 3
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_setup_t sba_setup;
6extern ia64_mv_dma_alloc_coherent sba_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
7extern ia64_mv_dma_free_coherent sba_free_coherent; 6extern ia64_mv_dma_free_coherent sba_free_coherent;
8extern ia64_mv_dma_map_single sba_map_single; 7extern ia64_mv_dma_map_single sba_map_single;
@@ -19,15 +18,15 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
19 * platform's machvec structure. When compiling a non-generic kernel, 18 * platform's machvec structure. When compiling a non-generic kernel,
20 * the macros are used directly. 19 * the macros are used directly.
21 */ 20 */
22#define platform_name "hpzx1" 21#define platform_name "hpzx1"
23#define platform_setup sba_setup 22#define platform_setup dig_setup
24#define platform_dma_init machvec_noop 23#define platform_dma_init machvec_noop
25#define platform_dma_alloc_coherent sba_alloc_coherent 24#define platform_dma_alloc_coherent sba_alloc_coherent
26#define platform_dma_free_coherent sba_free_coherent 25#define platform_dma_free_coherent sba_free_coherent
27#define platform_dma_map_single sba_map_single 26#define platform_dma_map_single sba_map_single
28#define platform_dma_unmap_single sba_unmap_single 27#define platform_dma_unmap_single sba_unmap_single
29#define platform_dma_map_sg sba_map_sg 28#define platform_dma_map_sg sba_map_sg
30#define platform_dma_unmap_sg sba_unmap_sg 29#define platform_dma_unmap_sg sba_unmap_sg
31#define platform_dma_sync_single_for_cpu machvec_dma_sync_single 30#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
32#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg 31#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
33#define platform_dma_sync_single_for_device machvec_dma_sync_single 32#define platform_dma_sync_single_for_device machvec_dma_sync_single
diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h
index 9924b1b00a6c..f00a34a148ff 100644
--- a/include/asm-ia64/machvec_hpzx1_swiotlb.h
+++ b/include/asm-ia64/machvec_hpzx1_swiotlb.h
@@ -2,7 +2,6 @@
2#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h 2#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
3 3
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_dma_init hwsw_init;
6extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
7extern ia64_mv_dma_free_coherent hwsw_free_coherent; 6extern ia64_mv_dma_free_coherent hwsw_free_coherent;
8extern ia64_mv_dma_map_single hwsw_map_single; 7extern ia64_mv_dma_map_single hwsw_map_single;
@@ -26,7 +25,7 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
26#define platform_name "hpzx1_swiotlb" 25#define platform_name "hpzx1_swiotlb"
27 26
28#define platform_setup dig_setup 27#define platform_setup dig_setup
29#define platform_dma_init hwsw_init 28#define platform_dma_init machvec_noop
30#define platform_dma_alloc_coherent hwsw_alloc_coherent 29#define platform_dma_alloc_coherent hwsw_alloc_coherent
31#define platform_dma_free_coherent hwsw_free_coherent 30#define platform_dma_free_coherent hwsw_free_coherent
32#define platform_dma_map_single hwsw_map_single 31#define platform_dma_map_single hwsw_map_single
diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h
index 149ad0118455..c7d9c9ed38ba 100644
--- a/include/asm-ia64/mca.h
+++ b/include/asm-ia64/mca.h
@@ -11,8 +11,6 @@
11#ifndef _ASM_IA64_MCA_H 11#ifndef _ASM_IA64_MCA_H
12#define _ASM_IA64_MCA_H 12#define _ASM_IA64_MCA_H
13 13
14#define IA64_MCA_STACK_SIZE 8192
15
16#if !defined(__ASSEMBLY__) 14#if !defined(__ASSEMBLY__)
17 15
18#include <linux/interrupt.h> 16#include <linux/interrupt.h>
@@ -48,7 +46,8 @@ typedef union cmcv_reg_u {
48 46
49enum { 47enum {
50 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0, 48 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
51 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1 49 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
50 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
52}; 51};
53 52
54/* Information maintained by the MC infrastructure */ 53/* Information maintained by the MC infrastructure */
@@ -63,18 +62,47 @@ typedef struct ia64_mc_info_s {
63 62
64} ia64_mc_info_t; 63} ia64_mc_info_t;
65 64
66typedef struct ia64_mca_sal_to_os_state_s { 65/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
67 u64 imsto_os_gp; /* GP of the os registered with the SAL */ 66 * Besides the handover state, it also contains some saved registers from the
68 u64 imsto_pal_proc; /* PAL_PROC entry point - physical addr */ 67 * time of the event.
69 u64 imsto_sal_proc; /* SAL_PROC entry point - physical addr */ 68 * Note: mca_asm.S depends on the precise layout of this structure.
70 u64 imsto_sal_gp; /* GP of the SAL - physical */ 69 */
71 u64 imsto_rendez_state; /* Rendez state information */ 70
72 u64 imsto_sal_check_ra; /* Return address in SAL_CHECK while going 71struct ia64_sal_os_state {
73 * back to SAL from OS after MCA handling. 72 /* SAL to OS, must be at offset 0 */
74 */ 73 u64 os_gp; /* GP of the os registered with the SAL, physical */
75 u64 pal_min_state; /* from PAL in r17 */ 74 u64 pal_proc; /* PAL_PROC entry point, physical */
76 u64 proc_state_param; /* from PAL in r18. See SDV 2:268 11.3.2.1 */ 75 u64 sal_proc; /* SAL_PROC entry point, physical */
77} ia64_mca_sal_to_os_state_t; 76 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
77 u64 proc_state_param; /* from R18 */
78 u64 monarch; /* 1 for a monarch event, 0 for a slave */
79 /* common, must follow SAL to OS */
80 u64 sal_ra; /* Return address in SAL, physical */
81 u64 sal_gp; /* GP of the SAL - physical */
82 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
83 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
84 * Note: if the MCA/INIT recovery code wants to resume to a new context
85 * then it must change these values to reflect the new kernel stack.
86 */
87 u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
88 u64 prev_IA64_KR_CURRENT_STACK;
89 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
90 /* Some interrupt registers are not saved in minstate, pt_regs or
91 * switch_stack. Because MCA/INIT can occur when interrupts are
92 * disabled, we need to save the additional interrupt registers over
93 * MCA/INIT and resume.
94 */
95 u64 isr;
96 u64 ifa;
97 u64 itir;
98 u64 iipa;
99 u64 iim;
100 u64 iha;
101 /* OS to SAL, must follow common */
102 u64 os_status; /* OS status to SAL, enum below */
103 u64 context; /* 0 if return to same context
104 1 if return to new context */
105};
78 106
79enum { 107enum {
80 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */ 108 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
@@ -84,35 +112,21 @@ enum {
84}; 112};
85 113
86enum { 114enum {
115 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
116 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
117};
118
119enum {
87 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */ 120 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
88 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */ 121 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
89}; 122};
90 123
91typedef struct ia64_mca_os_to_sal_state_s {
92 u64 imots_os_status; /* OS status to SAL as to what happened
93 * with the MCA handling.
94 */
95 u64 imots_sal_gp; /* GP of the SAL - physical */
96 u64 imots_context; /* 0 if return to same context
97 1 if return to new context */
98 u64 *imots_new_min_state; /* Pointer to structure containing
99 * new values of registers in the min state
100 * save area.
101 */
102 u64 imots_sal_check_ra; /* Return address in SAL_CHECK while going
103 * back to SAL from OS after MCA handling.
104 */
105} ia64_mca_os_to_sal_state_t;
106
107/* Per-CPU MCA state that is too big for normal per-CPU variables. */ 124/* Per-CPU MCA state that is too big for normal per-CPU variables. */
108 125
109struct ia64_mca_cpu { 126struct ia64_mca_cpu {
110 u64 stack[IA64_MCA_STACK_SIZE/8]; /* MCA memory-stack */ 127 u64 mca_stack[KERNEL_STACK_SIZE/8];
111 u64 proc_state_dump[512];
112 u64 stackframe[32];
113 u64 rbstore[IA64_MCA_STACK_SIZE/8]; /* MCA reg.-backing store */
114 u64 init_stack[KERNEL_STACK_SIZE/8]; 128 u64 init_stack[KERNEL_STACK_SIZE/8];
115} __attribute__ ((aligned(16))); 129};
116 130
117/* Array of physical addresses of each CPU's MCA area. */ 131/* Array of physical addresses of each CPU's MCA area. */
118extern unsigned long __per_cpu_mca[NR_CPUS]; 132extern unsigned long __per_cpu_mca[NR_CPUS];
@@ -121,12 +135,29 @@ extern void ia64_mca_init(void);
121extern void ia64_mca_cpu_init(void *); 135extern void ia64_mca_cpu_init(void *);
122extern void ia64_os_mca_dispatch(void); 136extern void ia64_os_mca_dispatch(void);
123extern void ia64_os_mca_dispatch_end(void); 137extern void ia64_os_mca_dispatch_end(void);
124extern void ia64_mca_ucmc_handler(void); 138extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
139extern void ia64_init_handler(struct pt_regs *,
140 struct switch_stack *,
141 struct ia64_sal_os_state *);
125extern void ia64_monarch_init_handler(void); 142extern void ia64_monarch_init_handler(void);
126extern void ia64_slave_init_handler(void); 143extern void ia64_slave_init_handler(void);
127extern void ia64_mca_cmc_vector_setup(void); 144extern void ia64_mca_cmc_vector_setup(void);
128extern int ia64_reg_MCA_extension(void*); 145extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
129extern void ia64_unreg_MCA_extension(void); 146extern void ia64_unreg_MCA_extension(void);
147extern u64 ia64_get_rnat(u64 *);
148
149#else /* __ASSEMBLY__ */
150
151#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
152#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
153#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
154#define IA64_MCA_HALT -3 /* System to be halted by SAL */
155
156#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
157#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
158
159#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
160#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
130 161
131#endif /* !__ASSEMBLY__ */ 162#endif /* !__ASSEMBLY__ */
132#endif /* _ASM_IA64_MCA_H */ 163#endif /* _ASM_IA64_MCA_H */
diff --git a/include/asm-ia64/mca_asm.h b/include/asm-ia64/mca_asm.h
index 836953e0f91f..27c9203d8ce3 100644
--- a/include/asm-ia64/mca_asm.h
+++ b/include/asm-ia64/mca_asm.h
@@ -8,6 +8,8 @@
8 * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com> 8 * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
9 * Copyright (C) 2002 Intel Corp. 9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com> 10 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
11 * Copyright (C) 2005 Silicon Graphics, Inc
12 * Copyright (C) 2005 Keith Owens <kaos@sgi.com>
11 */ 13 */
12#ifndef _ASM_IA64_MCA_ASM_H 14#ifndef _ASM_IA64_MCA_ASM_H
13#define _ASM_IA64_MCA_ASM_H 15#define _ASM_IA64_MCA_ASM_H
@@ -207,106 +209,33 @@
207 ;; 209 ;;
208 210
209/* 211/*
210 * The following offsets capture the order in which the 212 * The MCA and INIT stacks in struct ia64_mca_cpu look like normal kernel
211 * RSE related registers from the old context are 213 * stacks, except that the SAL/OS state and a switch_stack are stored near the
212 * saved onto the new stack frame. 214 * top of the MCA/INIT stack. To support concurrent entry to MCA or INIT, as
215 * well as MCA over INIT, each event needs its own SAL/OS state. All entries
216 * are 16 byte aligned.
213 * 217 *
214 * +-----------------------+ 218 * +---------------------------+
215 * |NDIRTY [BSP - BSPSTORE]| 219 * | pt_regs |
216 * +-----------------------+ 220 * +---------------------------+
217 * | RNAT | 221 * | switch_stack |
218 * +-----------------------+ 222 * +---------------------------+
219 * | BSPSTORE | 223 * | SAL/OS state |
220 * +-----------------------+ 224 * +---------------------------+
221 * | IFS | 225 * | 16 byte scratch area |
222 * +-----------------------+ 226 * +---------------------------+ <-------- SP at start of C MCA handler
223 * | PFS | 227 * | ..... |
224 * +-----------------------+ 228 * +---------------------------+
225 * | RSC | 229 * | RBS for MCA/INIT handler |
226 * +-----------------------+ <-------- Bottom of new stack frame 230 * +---------------------------+
231 * | struct task for MCA/INIT |
232 * +---------------------------+ <-------- Bottom of MCA/INIT stack
227 */ 233 */
228#define rse_rsc_offset 0
229#define rse_pfs_offset (rse_rsc_offset+0x08)
230#define rse_ifs_offset (rse_pfs_offset+0x08)
231#define rse_bspstore_offset (rse_ifs_offset+0x08)
232#define rse_rnat_offset (rse_bspstore_offset+0x08)
233#define rse_ndirty_offset (rse_rnat_offset+0x08)
234 234
235/* 235#define ALIGN16(x) ((x)&~15)
236 * rse_switch_context 236#define MCA_PT_REGS_OFFSET ALIGN16(KERNEL_STACK_SIZE-IA64_PT_REGS_SIZE)
237 * 237#define MCA_SWITCH_STACK_OFFSET ALIGN16(MCA_PT_REGS_OFFSET-IA64_SWITCH_STACK_SIZE)
238 * 1. Save old RSC onto the new stack frame 238#define MCA_SOS_OFFSET ALIGN16(MCA_SWITCH_STACK_OFFSET-IA64_SAL_OS_STATE_SIZE)
239 * 2. Save PFS onto new stack frame 239#define MCA_SP_OFFSET ALIGN16(MCA_SOS_OFFSET-16)
240 * 3. Cover the old frame and start a new frame.
241 * 4. Save IFS onto new stack frame
242 * 5. Save the old BSPSTORE on the new stack frame
243 * 6. Save the old RNAT on the new stack frame
244 * 7. Write BSPSTORE with the new backing store pointer
245 * 8. Read and save the new BSP to calculate the #dirty registers
246 * NOTE: Look at pages 11-10, 11-11 in PRM Vol 2
247 */
248#define rse_switch_context(temp,p_stackframe,p_bspstore) \
249 ;; \
250 mov temp=ar.rsc;; \
251 st8 [p_stackframe]=temp,8;; \
252 mov temp=ar.pfs;; \
253 st8 [p_stackframe]=temp,8; \
254 cover ;; \
255 mov temp=cr.ifs;; \
256 st8 [p_stackframe]=temp,8;; \
257 mov temp=ar.bspstore;; \
258 st8 [p_stackframe]=temp,8;; \
259 mov temp=ar.rnat;; \
260 st8 [p_stackframe]=temp,8; \
261 mov ar.bspstore=p_bspstore;; \
262 mov temp=ar.bsp;; \
263 sub temp=temp,p_bspstore;; \
264 st8 [p_stackframe]=temp,8;;
265
266/*
267 * rse_return_context
268 * 1. Allocate a zero-sized frame
269 * 2. Store the number of dirty registers RSC.loadrs field
270 * 3. Issue a loadrs to insure that any registers from the interrupted
271 * context which were saved on the new stack frame have been loaded
272 * back into the stacked registers
273 * 4. Restore BSPSTORE
274 * 5. Restore RNAT
275 * 6. Restore PFS
276 * 7. Restore IFS
277 * 8. Restore RSC
278 * 9. Issue an RFI
279 */
280#define rse_return_context(psr_mask_reg,temp,p_stackframe) \
281 ;; \
282 alloc temp=ar.pfs,0,0,0,0; \
283 add p_stackframe=rse_ndirty_offset,p_stackframe;; \
284 ld8 temp=[p_stackframe];; \
285 shl temp=temp,16;; \
286 mov ar.rsc=temp;; \
287 loadrs;; \
288 add p_stackframe=-rse_ndirty_offset+rse_bspstore_offset,p_stackframe;;\
289 ld8 temp=[p_stackframe];; \
290 mov ar.bspstore=temp;; \
291 add p_stackframe=-rse_bspstore_offset+rse_rnat_offset,p_stackframe;;\
292 ld8 temp=[p_stackframe];; \
293 mov ar.rnat=temp;; \
294 add p_stackframe=-rse_rnat_offset+rse_pfs_offset,p_stackframe;; \
295 ld8 temp=[p_stackframe];; \
296 mov ar.pfs=temp;; \
297 add p_stackframe=-rse_pfs_offset+rse_ifs_offset,p_stackframe;; \
298 ld8 temp=[p_stackframe];; \
299 mov cr.ifs=temp;; \
300 add p_stackframe=-rse_ifs_offset+rse_rsc_offset,p_stackframe;; \
301 ld8 temp=[p_stackframe];; \
302 mov ar.rsc=temp ; \
303 mov temp=psr;; \
304 or temp=temp,psr_mask_reg;; \
305 mov cr.ipsr=temp;; \
306 mov temp=ip;; \
307 add temp=0x30,temp;; \
308 mov cr.iip=temp;; \
309 srlz.i;; \
310 rfi;;
311 240
312#endif /* _ASM_IA64_MCA_ASM_H */ 241#endif /* _ASM_IA64_MCA_ASM_H */
diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h
index 1590dc65b30b..46501b01a5c5 100644
--- a/include/asm-ia64/meminit.h
+++ b/include/asm-ia64/meminit.h
@@ -16,10 +16,11 @@
16 * - initrd (optional) 16 * - initrd (optional)
17 * - command line string 17 * - command line string
18 * - kernel code & data 18 * - kernel code & data
19 * - Kernel memory map built from EFI memory map
19 * 20 *
20 * More could be added if necessary 21 * More could be added if necessary
21 */ 22 */
22#define IA64_MAX_RSVD_REGIONS 5 23#define IA64_MAX_RSVD_REGIONS 6
23 24
24struct rsvd_region { 25struct rsvd_region {
25 unsigned long start; /* virtual address of beginning of element */ 26 unsigned long start; /* virtual address of beginning of element */
@@ -33,6 +34,7 @@ extern void find_memory (void);
33extern void reserve_memory (void); 34extern void reserve_memory (void);
34extern void find_initrd (void); 35extern void find_initrd (void);
35extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); 36extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg);
37extern void efi_memmap_init(unsigned long *, unsigned long *);
36 38
37/* 39/*
38 * For rounding an address to the next IA64_GRANULE_SIZE or order 40 * For rounding an address to the next IA64_GRANULE_SIZE or order
@@ -41,7 +43,7 @@ extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg
41#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1)) 43#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1))
42#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1)) 44#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1))
43 45
44#ifdef CONFIG_DISCONTIGMEM 46#ifdef CONFIG_NUMA
45 extern void call_pernode_memory (unsigned long start, unsigned long len, void *func); 47 extern void call_pernode_memory (unsigned long start, unsigned long len, void *func);
46#else 48#else
47# define call_pernode_memory(start, len, func) (*func)(start, len, 0) 49# define call_pernode_memory(start, len, func) (*func)(start, len, 0)
diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h
index d32f51e3d6c2..34efe88eb849 100644
--- a/include/asm-ia64/mmzone.h
+++ b/include/asm-ia64/mmzone.h
@@ -15,7 +15,7 @@
15#include <asm/page.h> 15#include <asm/page.h>
16#include <asm/meminit.h> 16#include <asm/meminit.h>
17 17
18#ifdef CONFIG_DISCONTIGMEM 18#ifdef CONFIG_NUMA
19 19
20static inline int pfn_to_nid(unsigned long pfn) 20static inline int pfn_to_nid(unsigned long pfn)
21{ 21{
@@ -31,6 +31,10 @@ static inline int pfn_to_nid(unsigned long pfn)
31#endif 31#endif
32} 32}
33 33
34#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
35extern int early_pfn_to_nid(unsigned long pfn);
36#endif
37
34#ifdef CONFIG_IA64_DIG /* DIG systems are small */ 38#ifdef CONFIG_IA64_DIG /* DIG systems are small */
35# define MAX_PHYSNODE_ID 8 39# define MAX_PHYSNODE_ID 8
36# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) 40# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8)
@@ -39,8 +43,8 @@ static inline int pfn_to_nid(unsigned long pfn)
39# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) 43# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
40#endif 44#endif
41 45
42#else /* CONFIG_DISCONTIGMEM */ 46#else /* CONFIG_NUMA */
43# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) 47# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
44#endif /* CONFIG_DISCONTIGMEM */ 48#endif /* CONFIG_NUMA */
45 49
46#endif /* _ASM_IA64_MMZONE_H */ 50#endif /* _ASM_IA64_MMZONE_H */
diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h
index 6b0f3ed89b7e..9978c7ce7549 100644
--- a/include/asm-ia64/nodedata.h
+++ b/include/asm-ia64/nodedata.h
@@ -17,7 +17,7 @@
17#include <asm/percpu.h> 17#include <asm/percpu.h>
18#include <asm/mmzone.h> 18#include <asm/mmzone.h>
19 19
20#ifdef CONFIG_DISCONTIGMEM 20#ifdef CONFIG_NUMA
21 21
22/* 22/*
23 * Node Data. One of these structures is located on each node of a NUMA system. 23 * Node Data. One of these structures is located on each node of a NUMA system.
@@ -47,6 +47,6 @@ struct ia64_node_data {
47 */ 47 */
48#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid]) 48#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid])
49 49
50#endif /* CONFIG_DISCONTIGMEM */ 50#endif /* CONFIG_NUMA */
51 51
52#endif /* _ASM_IA64_NODEDATA_H */ 52#endif /* _ASM_IA64_NODEDATA_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 9edffad8c28b..ef436b9d06ad 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -102,15 +102,15 @@ do { \
102 102
103#ifdef CONFIG_VIRTUAL_MEM_MAP 103#ifdef CONFIG_VIRTUAL_MEM_MAP
104extern int ia64_pfn_valid (unsigned long pfn); 104extern int ia64_pfn_valid (unsigned long pfn);
105#else 105#elif defined(CONFIG_FLATMEM)
106# define ia64_pfn_valid(pfn) 1 106# define ia64_pfn_valid(pfn) 1
107#endif 107#endif
108 108
109#ifndef CONFIG_DISCONTIGMEM 109#ifdef CONFIG_FLATMEM
110# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn)) 110# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn))
111# define page_to_pfn(page) ((unsigned long) (page - mem_map)) 111# define page_to_pfn(page) ((unsigned long) (page - mem_map))
112# define pfn_to_page(pfn) (mem_map + (pfn)) 112# define pfn_to_page(pfn) (mem_map + (pfn))
113#else 113#elif defined(CONFIG_DISCONTIGMEM)
114extern struct page *vmem_map; 114extern struct page *vmem_map;
115extern unsigned long max_low_pfn; 115extern unsigned long max_low_pfn;
116# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) 116# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index dba9f220be71..ef616fd4cb1b 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -156,6 +156,19 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
156extern void pcibios_bus_to_resource(struct pci_dev *dev, 156extern void pcibios_bus_to_resource(struct pci_dev *dev,
157 struct resource *res, struct pci_bus_region *region); 157 struct resource *res, struct pci_bus_region *region);
158 158
159static inline struct resource *
160pcibios_select_root(struct pci_dev *pdev, struct resource *res)
161{
162 struct resource *root = NULL;
163
164 if (res->flags & IORESOURCE_IO)
165 root = &ioport_resource;
166 if (res->flags & IORESOURCE_MEM)
167 root = &iomem_resource;
168
169 return root;
170}
171
159#define pcibios_scan_all_fns(a, b) 0 172#define pcibios_scan_all_fns(a, b) 0
160 173
161#endif /* _ASM_IA64_PCI_H */ 174#endif /* _ASM_IA64_PCI_H */
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 2e34c06e6777..3339c7b55a6f 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -443,10 +443,6 @@ extern void paging_init (void);
443#define pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3) 443#define pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3)
444#define pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE }) 444#define pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE })
445 445
446/* XXX is this right? */
447#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
448 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
449
450#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 446#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
451 remap_pfn_range(vma, vaddr, pfn, size, prot) 447 remap_pfn_range(vma, vaddr, pfn, size, prot)
452 448
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 91bbd1f22461..94e07e727395 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -20,9 +20,6 @@
20#include <asm/ptrace.h> 20#include <asm/ptrace.h>
21#include <asm/ustack.h> 21#include <asm/ustack.h>
22 22
23/* Our arch specific arch_init_sched_domain is in arch/ia64/kernel/domain.c */
24#define ARCH_HAS_SCHED_DOMAIN
25
26#define IA64_NUM_DBG_REGS 8 23#define IA64_NUM_DBG_REGS 8
27/* 24/*
28 * Limits for PMC and PMD are set to less than maximum architected values 25 * Limits for PMC and PMD are set to less than maximum architected values
diff --git a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h
index 0bef19538406..a79d1a7ecc77 100644
--- a/include/asm-ia64/ptrace.h
+++ b/include/asm-ia64/ptrace.h
@@ -57,7 +57,9 @@
57#include <linux/config.h> 57#include <linux/config.h>
58 58
59#include <asm/fpu.h> 59#include <asm/fpu.h>
60#include <asm/offsets.h> 60#ifndef ASM_OFFSETS_C
61#include <asm/asm-offsets.h>
62#endif
61 63
62/* 64/*
63 * Base-2 logarithm of number of pages to allocate per task structure 65 * Base-2 logarithm of number of pages to allocate per task structure
@@ -119,7 +121,7 @@ struct pt_regs {
119 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */ 121 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
120 unsigned long ar_pfs; /* prev function state */ 122 unsigned long ar_pfs; /* prev function state */
121 unsigned long ar_rsc; /* RSE configuration */ 123 unsigned long ar_rsc; /* RSE configuration */
122 /* The following two are valid only if cr_ipsr.cpl > 0: */ 124 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
123 unsigned long ar_rnat; /* RSE NaT */ 125 unsigned long ar_rnat; /* RSE NaT */
124 unsigned long ar_bspstore; /* RSE bspstore */ 126 unsigned long ar_bspstore; /* RSE bspstore */
125 127
diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h
index ab827d298569..1a3831c04af6 100644
--- a/include/asm-ia64/sn/arch.h
+++ b/include/asm-ia64/sn/arch.h
@@ -18,6 +18,32 @@
18#include <asm/sn/sn_cpuid.h> 18#include <asm/sn/sn_cpuid.h>
19 19
20/* 20/*
21 * This is the maximum number of NUMALINK nodes that can be part of a single
22 * SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in
23 * remote partitions are NOT included in this number.
24 * The number of compact nodes cannot exceed size of a coherency domain.
25 * The purpose of this define is to specify a node count that includes
26 * all C/M/TIO nodes in an SSI system.
27 *
28 * SGI system can currently support up to 256 C/M nodes plus additional TIO nodes.
29 *
30 * Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade
31 * to ACPI3.0, this limit will be removed. The notion of "compact nodes"
32 * should be deleted and TIOs should be included in MAX_NUMNODES.
33 */
34#define MAX_COMPACT_NODES 512
35
36/*
37 * Maximum number of nodes in all partitions and in all coherency domains.
38 * This is the total number of nodes accessible in the numalink fabric. It
39 * includes all C & M bricks, plus all TIOs.
40 *
41 * This value is also the value of the maximum number of NASIDs in the numalink
42 * fabric.
43 */
44#define MAX_NUMALINK_NODES 16384
45
46/*
21 * The following defines attributes of the HUB chip. These attributes are 47 * The following defines attributes of the HUB chip. These attributes are
22 * frequently referenced. They are kept in the per-cpu data areas of each cpu. 48 * frequently referenced. They are kept in the per-cpu data areas of each cpu.
23 * They are kept together in a struct to minimize cache misses. 49 * They are kept together in a struct to minimize cache misses.
@@ -41,15 +67,6 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
41 67
42 68
43/* 69/*
44 * This is the maximum number of nodes that can be part of a kernel.
45 * Effectively, it's the maximum number of compact node ids (cnodeid_t).
46 * This is not necessarily the same as MAX_NASIDS.
47 */
48#define MAX_COMPACT_NODES 2048
49#define CPUS_PER_NODE 4
50
51
52/*
53 * Compact node ID to nasid mappings kept in the per-cpu data areas of each 70 * Compact node ID to nasid mappings kept in the per-cpu data areas of each
54 * cpu. 71 * cpu.
55 */ 72 */
@@ -57,7 +74,6 @@ DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
57#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0])) 74#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
58 75
59 76
60
61extern u8 sn_partition_id; 77extern u8 sn_partition_id;
62extern u8 sn_system_size; 78extern u8 sn_system_size;
63extern u8 sn_sharing_domain_size; 79extern u8 sn_sharing_domain_size;
diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h
index 42209733f6b1..41c73a735628 100644
--- a/include/asm-ia64/sn/io.h
+++ b/include/asm-ia64/sn/io.h
@@ -14,7 +14,7 @@
14extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */ 14extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */
15extern void __sn_mmiowb(void); /* Forward definition */ 15extern void __sn_mmiowb(void); /* Forward definition */
16 16
17extern int numionodes; 17extern int num_cnodes;
18 18
19#define __sn_mf_a() ia64_mfa() 19#define __sn_mf_a() ia64_mfa()
20 20
@@ -36,6 +36,15 @@ extern void sn_dma_flush(unsigned long);
36#define __sn_readq_relaxed ___sn_readq_relaxed 36#define __sn_readq_relaxed ___sn_readq_relaxed
37 37
38/* 38/*
39 * Convenience macros for setting/clearing bits using the above accessors
40 */
41
42#define __sn_setq_relaxed(addr, val) \
43 writeq((__sn_readq_relaxed(addr) | (val)), (addr))
44#define __sn_clrq_relaxed(addr, val) \
45 writeq((__sn_readq_relaxed(addr) & ~(val)), (addr))
46
47/*
39 * The following routines are SN Platform specific, called when 48 * The following routines are SN Platform specific, called when
40 * a reference is made to inX/outX set macros. SN Platform 49 * a reference is made to inX/outX set macros. SN Platform
41 * inX set of macros ensures that Posted DMA writes on the 50 * inX set of macros ensures that Posted DMA writes on the
diff --git a/include/asm-ia64/sn/klconfig.h b/include/asm-ia64/sn/klconfig.h
index 9f920c70a62a..bcbf209d63be 100644
--- a/include/asm-ia64/sn/klconfig.h
+++ b/include/asm-ia64/sn/klconfig.h
@@ -208,19 +208,6 @@ typedef struct lboard_s {
208 klconf_off_t brd_next_same; /* Next BOARD with same nasid */ 208 klconf_off_t brd_next_same; /* Next BOARD with same nasid */
209} lboard_t; 209} lboard_t;
210 210
211#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
212#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off))
213#define KLCF_NEXT(_brd) \
214 ((_brd)->brd_next_same ? \
215 (NODE_OFFSET_TO_LBOARD((_brd)->brd_next_same_host, (_brd)->brd_next_same)): NULL)
216#define KLCF_NEXT_ANY(_brd) \
217 ((_brd)->brd_next_any ? \
218 (NODE_OFFSET_TO_LBOARD(NASID_GET(_brd), (_brd)->brd_next_any)): NULL)
219#define KLCF_COMP(_brd, _ndx) \
220 ((((_brd)->brd_compts[(_ndx)]) == 0) ? 0 : \
221 (NODE_OFFSET_TO_KLINFO(NASID_GET(_brd), (_brd)->brd_compts[(_ndx)])))
222
223
224/* 211/*
225 * Generic info structure. This stores common info about a 212 * Generic info structure. This stores common info about a
226 * component. 213 * component.
@@ -249,24 +236,11 @@ typedef struct klinfo_s { /* Generic info */
249} klinfo_t ; 236} klinfo_t ;
250 237
251 238
252static inline lboard_t *find_lboard_any(lboard_t * start, unsigned char brd_type) 239static inline lboard_t *find_lboard_next(lboard_t * brd)
253{ 240{
254 /* Search all boards stored on this node. */ 241 if (brd && brd->brd_next_any)
255 242 return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any);
256 while (start) { 243 return NULL;
257 if (start->brd_type == brd_type)
258 return start;
259 start = KLCF_NEXT_ANY(start);
260 }
261 /* Didn't find it. */
262 return (lboard_t *) NULL;
263} 244}
264 245
265
266/* external declarations of Linux kernel functions. */
267
268extern lboard_t *root_lboard[];
269extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
270extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
271
272#endif /* _ASM_IA64_SN_KLCONFIG_H */ 246#endif /* _ASM_IA64_SN_KLCONFIG_H */
diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h
index 2e5f0aa38889..e3b819110d47 100644
--- a/include/asm-ia64/sn/l1.h
+++ b/include/asm-ia64/sn/l1.h
@@ -35,4 +35,16 @@
35#define L1_BRICKTYPE_ATHENA 0x2b /* + */ 35#define L1_BRICKTYPE_ATHENA 0x2b /* + */
36#define L1_BRICKTYPE_DAYTONA 0x7a /* z */ 36#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
37 37
38/* board type response codes */
39#define L1_BOARDTYPE_IP69 0x0100 /* CA */
40#define L1_BOARDTYPE_IP63 0x0200 /* CB */
41#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */
42#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */
43#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */
44#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */
45#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */
46#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */
47#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */
48
49
38#endif /* _ASM_IA64_SN_L1_H */ 50#endif /* _ASM_IA64_SN_L1_H */
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h
index 47bb8100fd00..6f6d69e39ff5 100644
--- a/include/asm-ia64/sn/nodepda.h
+++ b/include/asm-ia64/sn/nodepda.h
@@ -55,7 +55,6 @@ struct nodepda_s {
55 */ 55 */
56 struct phys_cpuid phys_cpuid[NR_CPUS]; 56 struct phys_cpuid phys_cpuid[NR_CPUS];
57 spinlock_t ptc_lock ____cacheline_aligned_in_smp; 57 spinlock_t ptc_lock ____cacheline_aligned_in_smp;
58 spinlock_t bist_lock;
59}; 58};
60 59
61typedef struct nodepda_s nodepda_t; 60typedef struct nodepda_s nodepda_t;
diff --git a/include/asm-ia64/sn/sn_cpuid.h b/include/asm-ia64/sn/sn_cpuid.h
index d2c1d34dcce4..749deb2ca6c1 100644
--- a/include/asm-ia64/sn/sn_cpuid.h
+++ b/include/asm-ia64/sn/sn_cpuid.h
@@ -105,7 +105,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
105#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid) 105#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid)
106#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode) 106#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode)
107#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice) 107#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice)
108#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)])
109 108
110 109
111/* 110/*
@@ -113,8 +112,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
113 * of potentially large tables. 112 * of potentially large tables.
114 */ 113 */
115extern int nasid_slice_to_cpuid(int, int); 114extern int nasid_slice_to_cpuid(int, int);
116#define nasid_slice_to_cpu_physical_id(nasid, slice) \
117 cpu_physical_id(nasid_slice_to_cpuid(nasid, slice))
118 115
119/* 116/*
120 * cnodeid_to_nasid - convert a cnodeid to a NASID 117 * cnodeid_to_nasid - convert a cnodeid to a NASID
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
new file mode 100644
index 000000000000..e68a80853d5d
--- /dev/null
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -0,0 +1,57 @@
1#ifndef _ASM_IA64_SN_FEATURE_SETS_H
2#define _ASM_IA64_SN_FEATURE_SETS_H
3
4/*
5 * SN PROM Features
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved.
12 */
13
14
15#include <asm/types.h>
16#include <asm/bitops.h>
17
18/* --------------------- PROM Features -----------------------------*/
19extern int sn_prom_feature_available(int id);
20
21#define MAX_PROM_FEATURE_SETS 2
22
23/*
24 * The following defines features that may or may not be supported by the
25 * current PROM. The OS uses sn_prom_feature_available(feature) to test for
26 * the presence of a PROM feature. Down rev (old) PROMs will always test
27 * "false" for new features.
28 *
29 * Use:
30 * if (sn_prom_feature_available(PRF_FEATURE_XXX))
31 * ...
32 */
33
34/*
35 * Example: feature XXX
36 */
37#define PRF_FEATURE_XXX 0
38
39
40
41/* --------------------- OS Features -------------------------------*/
42
43/*
44 * The following defines OS features that are optionally present in
45 * the operating system.
46 * During boot, PROM is notified of these features via a series of calls:
47 *
48 * ia64_sn_set_os_feature(feature1);
49 *
50 * Once enabled, a feature cannot be disabled.
51 *
52 * By default, features are disabled unless explicitly enabled.
53 */
54#define OSF_MCA_SLV_TO_OS_INIT_SLV 0
55#define OSF_FEAT_LOG_SBES 1
56
57#endif /* _ASM_IA64_SN_FEATURE_SETS_H */
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index e67825ad1930..3f7564dc0aa9 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -47,6 +47,7 @@
47#define SN_SAL_CONSOLE_PUTB 0x02000028 47#define SN_SAL_CONSOLE_PUTB 0x02000028
48#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a 48#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
49#define SN_SAL_CONSOLE_READC 0x0200002b 49#define SN_SAL_CONSOLE_READC 0x0200002b
50#define SN_SAL_SYSCTL_OP 0x02000030
50#define SN_SAL_SYSCTL_MODID_GET 0x02000031 51#define SN_SAL_SYSCTL_MODID_GET 0x02000031
51#define SN_SAL_SYSCTL_GET 0x02000032 52#define SN_SAL_SYSCTL_GET 0x02000032
52#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 53#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
@@ -67,7 +68,7 @@
67#define SN_SAL_IOIF_INTERRUPT 0x0200004a 68#define SN_SAL_IOIF_INTERRUPT 0x0200004a
68#define SN_SAL_HWPERF_OP 0x02000050 // lock 69#define SN_SAL_HWPERF_OP 0x02000050 // lock
69#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 70#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
70 71#define SN_SAL_IOIF_PCI_SAFE 0x02000052
71#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 72#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
72#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 73#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
73#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 74#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
@@ -80,6 +81,9 @@
80#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 81#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
81#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064 82#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
82 83
84#define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
85#define SN_SAL_SET_OS_FEATURE_SET 0x02000066
86
83/* 87/*
84 * Service-specific constants 88 * Service-specific constants
85 */ 89 */
@@ -98,6 +102,13 @@
98#define SAL_INTR_FREE 2 102#define SAL_INTR_FREE 2
99 103
100/* 104/*
105 * operations available on the generic SN_SAL_SYSCTL_OP
106 * runtime service
107 */
108#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
109#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
110
111/*
101 * IRouter (i.e. generalized system controller) operations 112 * IRouter (i.e. generalized system controller) operations
102 */ 113 */
103#define SAL_IROUTER_OPEN 0 /* open a subchannel */ 114#define SAL_IROUTER_OPEN 0 /* open a subchannel */
@@ -118,8 +129,8 @@
118/* 129/*
119 * Error Handling Features 130 * Error Handling Features
120 */ 131 */
121#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 132#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
122#define SAL_ERR_FEAT_LOG_SBES 0x2 133#define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
123#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4 134#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
124#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000 135#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
125 136
@@ -152,12 +163,6 @@ sn_sal_rev(void)
152} 163}
153 164
154/* 165/*
155 * Specify the minimum PROM revsion required for this kernel.
156 * Note that they're stored in hex format...
157 */
158#define SN_SAL_MIN_VERSION 0x0404
159
160/*
161 * Returns the master console nasid, if the call fails, return an illegal 166 * Returns the master console nasid, if the call fails, return an illegal
162 * value. 167 * value.
163 */ 168 */
@@ -201,26 +206,16 @@ ia64_sn_get_master_baseio_nasid(void)
201 return ret_stuff.v0; 206 return ret_stuff.v0;
202} 207}
203 208
204static inline char * 209static inline void *
205ia64_sn_get_klconfig_addr(nasid_t nasid) 210ia64_sn_get_klconfig_addr(nasid_t nasid)
206{ 211{
207 struct ia64_sal_retval ret_stuff; 212 struct ia64_sal_retval ret_stuff;
208 int cnodeid;
209 213
210 cnodeid = nasid_to_cnodeid(nasid);
211 ret_stuff.status = 0; 214 ret_stuff.status = 0;
212 ret_stuff.v0 = 0; 215 ret_stuff.v0 = 0;
213 ret_stuff.v1 = 0; 216 ret_stuff.v1 = 0;
214 ret_stuff.v2 = 0; 217 ret_stuff.v2 = 0;
215 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); 218 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
216
217 /*
218 * We should panic if a valid cnode nasid does not produce
219 * a klconfig address.
220 */
221 if (ret_stuff.status != 0) {
222 panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
223 }
224 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; 219 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
225} 220}
226 221
@@ -336,7 +331,7 @@ ia64_sn_plat_cpei_handler(void)
336} 331}
337 332
338/* 333/*
339 * Set Error Handling Features 334 * Set Error Handling Features (Obsolete)
340 */ 335 */
341static inline u64 336static inline u64
342ia64_sn_plat_set_error_handling_features(void) 337ia64_sn_plat_set_error_handling_features(void)
@@ -697,12 +692,10 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
697 unsigned long irq_flags; 692 unsigned long irq_flags;
698 693
699 cnodeid = nasid_to_cnodeid(get_node_number(paddr)); 694 cnodeid = nasid_to_cnodeid(get_node_number(paddr));
700 // spin_lock(&NODEPDA(cnodeid)->bist_lock);
701 local_irq_save(irq_flags); 695 local_irq_save(irq_flags);
702 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, 696 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
703 (u64)nasid_array, perms, 0, 0, 0); 697 (u64)nasid_array, perms, 0, 0, 0);
704 local_irq_restore(irq_flags); 698 local_irq_restore(irq_flags);
705 // spin_unlock(&NODEPDA(cnodeid)->bist_lock);
706 return ret_stuff.status; 699 return ret_stuff.status;
707} 700}
708#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 701#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
@@ -876,6 +869,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid)
876 return (int) rv.v0; 869 return (int) rv.v0;
877} 870}
878 871
872/*
873 * Ask the system controller on the specified nasid to reset
874 * the CX corelet clock. Only valid on TIO nodes.
875 */
876static inline int
877ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
878{
879 struct ia64_sal_retval rv;
880 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
881 nasid, 0, 0, 0, 0, 0);
882 if (rv.status != 0)
883 return (int)rv.status;
884 if (rv.v0 != 0)
885 return (int)rv.v0;
886
887 return 0;
888}
889
890/*
891 * Get the associated ioboard type for a given nasid.
892 */
893static inline int
894ia64_sn_sysctl_ioboard_get(nasid_t nasid)
895{
896 struct ia64_sal_retval rv;
897 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
898 nasid, 0, 0, 0, 0, 0);
899 if (rv.v0 != 0)
900 return (int)rv.v0;
901 if (rv.v1 != 0)
902 return (int)rv.v1;
903
904 return 0;
905}
906
879/** 907/**
880 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header 908 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
881 * @nasid: NASID of node to read 909 * @nasid: NASID of node to read
@@ -1052,4 +1080,25 @@ ia64_sn_is_fake_prom(void)
1052 return (rv.status == 0); 1080 return (rv.status == 0);
1053} 1081}
1054 1082
1083static inline int
1084ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set)
1085{
1086 struct ia64_sal_retval rv;
1087
1088 SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0);
1089 if (rv.status != 0)
1090 return rv.status;
1091 *feature_set = rv.v0;
1092 return 0;
1093}
1094
1095static inline int
1096ia64_sn_set_os_feature(int feature)
1097{
1098 struct ia64_sal_retval rv;
1099
1100 SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0);
1101 return rv.status;
1102}
1103
1055#endif /* _ASM_IA64_SN_SN_SAL_H */ 1104#endif /* _ASM_IA64_SN_SN_SAL_H */
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h
index 5ccec608d325..b532ef6148ed 100644
--- a/include/asm-ia64/sn/tioca_provider.h
+++ b/include/asm-ia64/sn/tioca_provider.h
@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
182 * touch every CL aligned GART entry. 182 * touch every CL aligned GART entry.
183 */ 183 */
184 184
185 ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM); 185 __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
186 ca_base->ca_control2 |= CA_GART_FLUSH_TLB; 186 __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
187 ca_base->ca_control2 |= 187 __sn_setq_relaxed(&ca_base->ca_control2,
188 (0x2ull << CA_GART_MEM_PARAM_SHFT); 188 (0x2ull << CA_GART_MEM_PARAM_SHFT));
189 tmp = ca_base->ca_control2; 189 tmp = __sn_readq_relaxed(&ca_base->ca_control2);
190 } 190 }
191 191
192 return; 192 return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
196 * Gart in uncached mode ... need an explicit flush. 196 * Gart in uncached mode ... need an explicit flush.
197 */ 197 */
198 198
199 ca_base->ca_control2 |= CA_GART_FLUSH_TLB; 199 __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
200 tmp = ca_base->ca_control2; 200 tmp = __sn_readq_relaxed(&ca_base->ca_control2);
201} 201}
202 202
203extern uint32_t tioca_gart_found; 203extern uint32_t tioca_gart_found;
diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h
index c5447a504509..5699e75e5024 100644
--- a/include/asm-ia64/sn/tiocx.h
+++ b/include/asm-ia64/sn/tiocx.h
@@ -19,6 +19,7 @@ struct cx_id_s {
19 19
20struct cx_dev { 20struct cx_dev {
21 struct cx_id_s cx_id; 21 struct cx_id_s cx_id;
22 int bt; /* board/blade type */
22 void *soft; /* driver specific */ 23 void *soft; /* driver specific */
23 struct hubdev_info *hubdev; 24 struct hubdev_info *hubdev;
24 struct device dev; 25 struct device dev;
@@ -59,7 +60,7 @@ struct cx_drv {
59extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int); 60extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int);
60extern void tiocx_irq_free(struct sn_irq_info *); 61extern void tiocx_irq_free(struct sn_irq_info *);
61extern int cx_device_unregister(struct cx_dev *); 62extern int cx_device_unregister(struct cx_dev *);
62extern int cx_device_register(nasid_t, int, int, struct hubdev_info *); 63extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
63extern int cx_driver_unregister(struct cx_drv *); 64extern int cx_driver_unregister(struct cx_drv *);
64extern int cx_driver_register(struct cx_drv *); 65extern int cx_driver_register(struct cx_drv *);
65extern uint64_t tiocx_dma_addr(uint64_t addr); 66extern uint64_t tiocx_dma_addr(uint64_t addr);
diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h
index 30312be31206..49faf8f26430 100644
--- a/include/asm-ia64/sn/xp.h
+++ b/include/asm-ia64/sn/xp.h
@@ -49,7 +49,7 @@
49 * C-brick nasids, thus the need for bitmaps which don't account for 49 * C-brick nasids, thus the need for bitmaps which don't account for
50 * odd-numbered (non C-brick) nasids. 50 * odd-numbered (non C-brick) nasids.
51 */ 51 */
52#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2) 52#define XP_MAX_PHYSNODE_ID (MAX_NUMALINK_NODES / 2)
53#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8) 53#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8)
54#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64) 54#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64)
55 55
diff --git a/include/asm-ia64/sparsemem.h b/include/asm-ia64/sparsemem.h
new file mode 100644
index 000000000000..67a7c40ec27f
--- /dev/null
+++ b/include/asm-ia64/sparsemem.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_IA64_SPARSEMEM_H
2#define _ASM_IA64_SPARSEMEM_H
3
4#ifdef CONFIG_SPARSEMEM
5/*
6 * SECTION_SIZE_BITS 2^N: how big each section will be
7 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
8 */
9
10#define SECTION_SIZE_BITS (30)
11#define MAX_PHYSMEM_BITS (50)
12#ifdef CONFIG_FORCE_MAX_ZONEORDER
13#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS)
14#undef SECTION_SIZE_BITS
15#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT)
16#endif
17#endif
18
19#endif /* CONFIG_SPARSEMEM */
20#endif /* _ASM_IA64_SPARSEMEM_H */
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h
index d2430aa0d49d..5b78611411c3 100644
--- a/include/asm-ia64/spinlock.h
+++ b/include/asm-ia64/spinlock.h
@@ -17,28 +17,20 @@
17#include <asm/intrinsics.h> 17#include <asm/intrinsics.h>
18#include <asm/system.h> 18#include <asm/system.h>
19 19
20typedef struct { 20#define __raw_spin_lock_init(x) ((x)->lock = 0)
21 volatile unsigned int lock;
22#ifdef CONFIG_PREEMPT
23 unsigned int break_lock;
24#endif
25} spinlock_t;
26
27#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
28#define spin_lock_init(x) ((x)->lock = 0)
29 21
30#ifdef ASM_SUPPORTED 22#ifdef ASM_SUPPORTED
31/* 23/*
32 * Try to get the lock. If we fail to get the lock, make a non-standard call to 24 * Try to get the lock. If we fail to get the lock, make a non-standard call to
33 * ia64_spinlock_contention(). We do not use a normal call because that would force all 25 * ia64_spinlock_contention(). We do not use a normal call because that would force all
34 * callers of spin_lock() to be non-leaf routines. Instead, ia64_spinlock_contention() is 26 * callers of __raw_spin_lock() to be non-leaf routines. Instead, ia64_spinlock_contention() is
35 * carefully coded to touch only those registers that spin_lock() marks "clobbered". 27 * carefully coded to touch only those registers that __raw_spin_lock() marks "clobbered".
36 */ 28 */
37 29
38#define IA64_SPINLOCK_CLOBBERS "ar.ccv", "ar.pfs", "p14", "p15", "r27", "r28", "r29", "r30", "b6", "memory" 30#define IA64_SPINLOCK_CLOBBERS "ar.ccv", "ar.pfs", "p14", "p15", "r27", "r28", "r29", "r30", "b6", "memory"
39 31
40static inline void 32static inline void
41_raw_spin_lock_flags (spinlock_t *lock, unsigned long flags) 33__raw_spin_lock_flags (raw_spinlock_t *lock, unsigned long flags)
42{ 34{
43 register volatile unsigned int *ptr asm ("r31") = &lock->lock; 35 register volatile unsigned int *ptr asm ("r31") = &lock->lock;
44 36
@@ -94,17 +86,17 @@ _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
94#endif 86#endif
95} 87}
96 88
97#define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0) 89#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
98 90
99/* Unlock by doing an ordered store and releasing the cacheline with nta */ 91/* Unlock by doing an ordered store and releasing the cacheline with nta */
100static inline void _raw_spin_unlock(spinlock_t *x) { 92static inline void __raw_spin_unlock(raw_spinlock_t *x) {
101 barrier(); 93 barrier();
102 asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x)); 94 asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x));
103} 95}
104 96
105#else /* !ASM_SUPPORTED */ 97#else /* !ASM_SUPPORTED */
106#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) 98#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
107# define _raw_spin_lock(x) \ 99# define __raw_spin_lock(x) \
108do { \ 100do { \
109 __u32 *ia64_spinlock_ptr = (__u32 *) (x); \ 101 __u32 *ia64_spinlock_ptr = (__u32 *) (x); \
110 __u64 ia64_spinlock_val; \ 102 __u64 ia64_spinlock_val; \
@@ -117,29 +109,20 @@ do { \
117 } while (ia64_spinlock_val); \ 109 } while (ia64_spinlock_val); \
118 } \ 110 } \
119} while (0) 111} while (0)
120#define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0) 112#define __raw_spin_unlock(x) do { barrier(); ((raw_spinlock_t *) x)->lock = 0; } while (0)
121#endif /* !ASM_SUPPORTED */ 113#endif /* !ASM_SUPPORTED */
122 114
123#define spin_is_locked(x) ((x)->lock != 0) 115#define __raw_spin_is_locked(x) ((x)->lock != 0)
124#define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) 116#define __raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0)
125#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) 117#define __raw_spin_unlock_wait(lock) \
126 118 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
127typedef struct {
128 volatile unsigned int read_counter : 24;
129 volatile unsigned int write_lock : 8;
130#ifdef CONFIG_PREEMPT
131 unsigned int break_lock;
132#endif
133} rwlock_t;
134#define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 }
135 119
136#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0) 120#define __raw_read_can_lock(rw) (*(volatile int *)(rw) >= 0)
137#define read_can_lock(rw) (*(volatile int *)(rw) >= 0) 121#define __raw_write_can_lock(rw) (*(volatile int *)(rw) == 0)
138#define write_can_lock(rw) (*(volatile int *)(rw) == 0)
139 122
140#define _raw_read_lock(rw) \ 123#define __raw_read_lock(rw) \
141do { \ 124do { \
142 rwlock_t *__read_lock_ptr = (rw); \ 125 raw_rwlock_t *__read_lock_ptr = (rw); \
143 \ 126 \
144 while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, acq) < 0)) { \ 127 while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, acq) < 0)) { \
145 ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ 128 ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \
@@ -148,14 +131,14 @@ do { \
148 } \ 131 } \
149} while (0) 132} while (0)
150 133
151#define _raw_read_unlock(rw) \ 134#define __raw_read_unlock(rw) \
152do { \ 135do { \
153 rwlock_t *__read_lock_ptr = (rw); \ 136 raw_rwlock_t *__read_lock_ptr = (rw); \
154 ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ 137 ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \
155} while (0) 138} while (0)
156 139
157#ifdef ASM_SUPPORTED 140#ifdef ASM_SUPPORTED
158#define _raw_write_lock(rw) \ 141#define __raw_write_lock(rw) \
159do { \ 142do { \
160 __asm__ __volatile__ ( \ 143 __asm__ __volatile__ ( \
161 "mov ar.ccv = r0\n" \ 144 "mov ar.ccv = r0\n" \
@@ -170,7 +153,7 @@ do { \
170 :: "r"(rw) : "ar.ccv", "p7", "r2", "r29", "memory"); \ 153 :: "r"(rw) : "ar.ccv", "p7", "r2", "r29", "memory"); \
171} while(0) 154} while(0)
172 155
173#define _raw_write_trylock(rw) \ 156#define __raw_write_trylock(rw) \
174({ \ 157({ \
175 register long result; \ 158 register long result; \
176 \ 159 \
@@ -182,7 +165,7 @@ do { \
182 (result == 0); \ 165 (result == 0); \
183}) 166})
184 167
185static inline void _raw_write_unlock(rwlock_t *x) 168static inline void __raw_write_unlock(raw_rwlock_t *x)
186{ 169{
187 u8 *y = (u8 *)x; 170 u8 *y = (u8 *)x;
188 barrier(); 171 barrier();
@@ -191,7 +174,7 @@ static inline void _raw_write_unlock(rwlock_t *x)
191 174
192#else /* !ASM_SUPPORTED */ 175#else /* !ASM_SUPPORTED */
193 176
194#define _raw_write_lock(l) \ 177#define __raw_write_lock(l) \
195({ \ 178({ \
196 __u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \ 179 __u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \
197 __u32 *ia64_write_lock_ptr = (__u32 *) (l); \ 180 __u32 *ia64_write_lock_ptr = (__u32 *) (l); \
@@ -202,7 +185,7 @@ static inline void _raw_write_unlock(rwlock_t *x)
202 } while (ia64_val); \ 185 } while (ia64_val); \
203}) 186})
204 187
205#define _raw_write_trylock(rw) \ 188#define __raw_write_trylock(rw) \
206({ \ 189({ \
207 __u64 ia64_val; \ 190 __u64 ia64_val; \
208 __u64 ia64_set_val = ia64_dep_mi(-1, 0, 31,1); \ 191 __u64 ia64_set_val = ia64_dep_mi(-1, 0, 31,1); \
@@ -210,7 +193,7 @@ static inline void _raw_write_unlock(rwlock_t *x)
210 (ia64_val == 0); \ 193 (ia64_val == 0); \
211}) 194})
212 195
213static inline void _raw_write_unlock(rwlock_t *x) 196static inline void __raw_write_unlock(raw_rwlock_t *x)
214{ 197{
215 barrier(); 198 barrier();
216 x->write_lock = 0; 199 x->write_lock = 0;
@@ -218,6 +201,6 @@ static inline void _raw_write_unlock(rwlock_t *x)
218 201
219#endif /* !ASM_SUPPORTED */ 202#endif /* !ASM_SUPPORTED */
220 203
221#define _raw_read_trylock(lock) generic_raw_read_trylock(lock) 204#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
222 205
223#endif /* _ASM_IA64_SPINLOCK_H */ 206#endif /* _ASM_IA64_SPINLOCK_H */
diff --git a/include/asm-ia64/spinlock_types.h b/include/asm-ia64/spinlock_types.h
new file mode 100644
index 000000000000..474e46f1ab4a
--- /dev/null
+++ b/include/asm-ia64/spinlock_types.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_IA64_SPINLOCK_TYPES_H
2#define _ASM_IA64_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile unsigned int lock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 volatile unsigned int read_counter : 31;
16 volatile unsigned int write_lock : 1;
17} raw_rwlock_t;
18
19#define __RAW_RW_LOCK_UNLOCKED { 0, 0 }
20
21#endif
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 33256db4a7cf..635235fa1e32 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -275,6 +275,7 @@ extern void ia64_load_extra (struct task_struct *task);
275 */ 275 */
276#define __ARCH_WANT_UNLOCKED_CTXSW 276#define __ARCH_WANT_UNLOCKED_CTXSW
277 277
278#define ARCH_HAS_PREFETCH_SWITCH_STACK
278#define ia64_platform_is(x) (strcmp(x, platform_name) == 0) 279#define ia64_platform_is(x) (strcmp(x, platform_name) == 0)
279 280
280void cpu_idle_wait(void); 281void cpu_idle_wait(void);
diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h
index 7dc8951708a3..171b2207bde4 100644
--- a/include/asm-ia64/thread_info.h
+++ b/include/asm-ia64/thread_info.h
@@ -5,7 +5,9 @@
5#ifndef _ASM_IA64_THREAD_INFO_H 5#ifndef _ASM_IA64_THREAD_INFO_H
6#define _ASM_IA64_THREAD_INFO_H 6#define _ASM_IA64_THREAD_INFO_H
7 7
8#include <asm/offsets.h> 8#ifndef ASM_OFFSETS_C
9#include <asm/asm-offsets.h>
10#endif
9#include <asm/processor.h> 11#include <asm/processor.h>
10#include <asm/ptrace.h> 12#include <asm/ptrace.h>
11 13
@@ -51,9 +53,14 @@ struct thread_info {
51 }, \ 53 }, \
52} 54}
53 55
56#ifndef ASM_OFFSETS_C
54/* how to get the thread information struct from C */ 57/* how to get the thread information struct from C */
55#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) 58#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE))
56#define alloc_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) 59#define alloc_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE))
60#else
61#define current_thread_info() ((struct thread_info *) 0)
62#define alloc_thread_info(tsk) ((struct thread_info *) 0)
63#endif
57#define free_thread_info(ti) /* nothing */ 64#define free_thread_info(ti) /* nothing */
58 65
59#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR 66#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR
@@ -76,6 +83,7 @@ struct thread_info {
76#define TIF_SIGDELAYED 5 /* signal delayed from MCA/INIT/NMI/PMI context */ 83#define TIF_SIGDELAYED 5 /* signal delayed from MCA/INIT/NMI/PMI context */
77#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 84#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
78#define TIF_MEMDIE 17 85#define TIF_MEMDIE 17
86#define TIF_MCA_INIT 18 /* this task is processing MCA or INIT */
79 87
80#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 88#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
81#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 89#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
@@ -85,6 +93,7 @@ struct thread_info {
85#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 93#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
86#define _TIF_SIGDELAYED (1 << TIF_SIGDELAYED) 94#define _TIF_SIGDELAYED (1 << TIF_SIGDELAYED)
87#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 95#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
96#define _TIF_MCA_INIT (1 << TIF_MCA_INIT)
88 97
89/* "work to do on user-return" bits */ 98/* "work to do on user-return" bits */
90#define TIF_ALLWORK_MASK (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SIGDELAYED) 99#define TIF_ALLWORK_MASK (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SIGDELAYED)
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index 399bc29729fd..a9f738bf18a7 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -98,29 +98,6 @@ void build_cpu_to_node_map(void);
98 .nr_balance_failed = 0, \ 98 .nr_balance_failed = 0, \
99} 99}
100 100
101/* sched_domains SD_ALLNODES_INIT for IA64 NUMA machines */
102#define SD_ALLNODES_INIT (struct sched_domain) { \
103 .span = CPU_MASK_NONE, \
104 .parent = NULL, \
105 .groups = NULL, \
106 .min_interval = 64, \
107 .max_interval = 64*num_online_cpus(), \
108 .busy_factor = 128, \
109 .imbalance_pct = 133, \
110 .cache_hot_time = (10*1000000), \
111 .cache_nice_tries = 1, \
112 .busy_idx = 3, \
113 .idle_idx = 3, \
114 .newidle_idx = 0, /* unused */ \
115 .wake_idx = 0, /* unused */ \
116 .forkexec_idx = 0, /* unused */ \
117 .per_cpu_gain = 100, \
118 .flags = SD_LOAD_BALANCE, \
119 .last_balance = jiffies, \
120 .balance_interval = 64, \
121 .nr_balance_failed = 0, \
122}
123
124#endif /* CONFIG_NUMA */ 101#endif /* CONFIG_NUMA */
125 102
126#include <asm-generic/topology.h> 103#include <asm-generic/topology.h>
diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h
index 8edd9a90949c..9adb51211c22 100644
--- a/include/asm-ia64/uaccess.h
+++ b/include/asm-ia64/uaccess.h
@@ -72,13 +72,6 @@
72}) 72})
73#define access_ok(type, addr, size) __access_ok((addr), (size), get_fs()) 73#define access_ok(type, addr, size) __access_ok((addr), (size), get_fs())
74 74
75/* this function will go away soon - use access_ok() instead */
76static inline int __deprecated
77verify_area (int type, const void __user *addr, unsigned long size)
78{
79 return access_ok(type, addr, size) ? 0 : -EFAULT;
80}
81
82/* 75/*
83 * These are the main single-value transfer routines. They automatically 76 * These are the main single-value transfer routines. They automatically
84 * use the right size if we just have the right pointer type. 77 * use the right size if we just have the right pointer type.
@@ -194,8 +187,8 @@ extern void __get_user_unknown (void);
194({ \ 187({ \
195 const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ 188 const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
196 __typeof__ (size) __gu_size = (size); \ 189 __typeof__ (size) __gu_size = (size); \
197 long __gu_err = -EFAULT, __gu_val = 0; \ 190 long __gu_err = -EFAULT; \
198 \ 191 unsigned long __gu_val = 0; \
199 if (!check || __access_ok(__gu_ptr, size, segment)) \ 192 if (!check || __access_ok(__gu_ptr, size, segment)) \
200 switch (__gu_size) { \ 193 switch (__gu_size) { \
201 case 1: __get_user_size(__gu_val, __gu_ptr, 1, __gu_err); break; \ 194 case 1: __get_user_size(__gu_val, __gu_ptr, 1, __gu_err); break; \
@@ -247,13 +240,13 @@ extern unsigned long __must_check __copy_user (void __user *to, const void __use
247static inline unsigned long 240static inline unsigned long
248__copy_to_user (void __user *to, const void *from, unsigned long count) 241__copy_to_user (void __user *to, const void *from, unsigned long count)
249{ 242{
250 return __copy_user(to, (void __user *) from, count); 243 return __copy_user(to, (__force void __user *) from, count);
251} 244}
252 245
253static inline unsigned long 246static inline unsigned long
254__copy_from_user (void *to, const void __user *from, unsigned long count) 247__copy_from_user (void *to, const void __user *from, unsigned long count)
255{ 248{
256 return __copy_user((void __user *) to, from, count); 249 return __copy_user((__force void __user *) to, from, count);
257} 250}
258 251
259#define __copy_to_user_inatomic __copy_to_user 252#define __copy_to_user_inatomic __copy_to_user
@@ -265,7 +258,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count)
265 long __cu_len = (n); \ 258 long __cu_len = (n); \
266 \ 259 \
267 if (__access_ok(__cu_to, __cu_len, get_fs())) \ 260 if (__access_ok(__cu_to, __cu_len, get_fs())) \
268 __cu_len = __copy_user(__cu_to, (void __user *) __cu_from, __cu_len); \ 261 __cu_len = __copy_user(__cu_to, (__force void __user *) __cu_from, __cu_len); \
269 __cu_len; \ 262 __cu_len; \
270}) 263})
271 264
@@ -277,7 +270,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count)
277 \ 270 \
278 __chk_user_ptr(__cu_from); \ 271 __chk_user_ptr(__cu_from); \
279 if (__access_ok(__cu_from, __cu_len, get_fs())) \ 272 if (__access_ok(__cu_from, __cu_len, get_fs())) \
280 __cu_len = __copy_user((void __user *) __cu_to, __cu_from, __cu_len); \ 273 __cu_len = __copy_user((__force void __user *) __cu_to, __cu_from, __cu_len); \
281 __cu_len; \ 274 __cu_len; \
282}) 275})
283 276
diff --git a/include/asm-ia64/unwind.h b/include/asm-ia64/unwind.h
index 61426ad3ecdb..5df0276b0493 100644
--- a/include/asm-ia64/unwind.h
+++ b/include/asm-ia64/unwind.h
@@ -114,13 +114,6 @@ extern void unw_remove_unwind_table (void *handle);
114 */ 114 */
115extern void unw_init_from_blocked_task (struct unw_frame_info *info, struct task_struct *t); 115extern void unw_init_from_blocked_task (struct unw_frame_info *info, struct task_struct *t);
116 116
117/*
118 * Prepare to unwind from interruption. The pt-regs and switch-stack structures must have
119 * be "adjacent" (no state modifications between pt-regs and switch-stack).
120 */
121extern void unw_init_from_interruption (struct unw_frame_info *info, struct task_struct *t,
122 struct pt_regs *pt, struct switch_stack *sw);
123
124extern void unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t, 117extern void unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t,
125 struct switch_stack *sw); 118 struct switch_stack *sw);
126 119
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 05:15:42 -0500