8 files changed, 175 insertions, 21 deletions
diff --git a/include/asm-ia64/esi.h b/include/asm-ia64/esi.h
new file mode 100644
index 000000000000..84aac0e0b583
--- /dev/null
+++ b/include/asm-ia64/esi.h
@@ -0,0 +1,30 @@
+/*
+ * ESI service calls.
+ *
+ * Copyright (c) Copyright 2005-2006 Hewlett-Packard Development Company, L.P.
+ *      Alex Williamson <alex.williamson@hp.com>
+ */
+#ifndef esi_h
+#define esi_h
+#include <linux/efi.h>
+#define ESI_QUERY                       0x00000001
+#define ESI_OPEN_HANDLE                 0x02000000
+#define ESI_CLOSE_HANDLE                0x02000001
+enum esi_proc_type {
+        ESI_PROC_SERIALIZED,    /* calls need to be serialized */
+        ESI_PROC_MP_SAFE,       /* MP-safe, but not reentrant */
+        ESI_PROC_REENTRANT      /* MP-safe and reentrant */
+};
+extern int ia64_esi_init (void);
+extern struct ia64_sal_retval esi_call_phys (void *, u64 *);
+extern int ia64_esi_call(efi_guid_t, struct ia64_sal_retval *,
+                         enum esi_proc_type,
+                         u64, u64, u64, u64, u64, u64, u64, u64);
+extern int ia64_esi_call_phys(efi_guid_t, struct ia64_sal_retval *, u64, u64,
+                              u64, u64, u64, u64, u64, u64);
+#endif /* esi_h */
diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h
index 6a332a9f099c..07d77f3a8cbe 100644
--- a/include/asm-ia64/futex.h
+++ b/include/asm-ia64/futex.h
@@ -1,6 +1,124 @@
 #ifndef _ASM_FUTEX_H
 #define _ASM_FUTEX_H
-#include <asm-generic/futex.h>
+#include <linux/futex.h>
+#include <asm/errno.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
-#endif
+#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
+do {                                                                    \
+        register unsigned long r8 __asm ("r8") = 0;                     \
+        __asm__ __volatile__(                                           \
+                "       mf;;                                    \n"     \
+                "[1:] " insn ";;                                \n"     \
+                "       .xdata4 \"__ex_table\", 1b-., 2f-.      \n"     \
+                "[2:]"                                                  \
+                : "+r" (r8), "=r" (oldval)                              \
+                : "r" (uaddr), "r" (oparg)                              \
+                : "memory");                                            \
+        ret = r8;                                                       \
+} while (0)
+#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
+do {                                                                    \
+        register unsigned long r8 __asm ("r8") = 0;                     \
+        int val, newval;                                                \
+        do {                                                            \
+                __asm__ __volatile__(                                   \
+                        "       mf;;                              \n"   \
+                        "[1:]   ld4 %3=[%4];;                     \n"   \
+                        "       mov %2=%3                         \n"   \
+                                insn    ";;                       \n"   \
+                        "       mov ar.ccv=%2;;                   \n"   \
+                        "[2:]   cmpxchg4.acq %1=[%4],%3,ar.ccv;;  \n"   \
+                        "       .xdata4 \"__ex_table\", 1b-., 3f-.\n"   \
+                        "       .xdata4 \"__ex_table\", 2b-., 3f-.\n"   \
+                        "[3:]"                                          \
+                        : "+r" (r8), "=r" (val), "=&r" (oldval),        \
+                           "=&r" (newval)                               \
+                        : "r" (uaddr), "r" (oparg)                      \
+                        : "memory");                                    \
+                if (unlikely (r8))                                      \
+                        break;                                          \
+        } while (unlikely (val != oldval));                             \
+        ret = r8;                                                       \
+} while (0)
+static inline int
+futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+{
+        int op = (encoded_op >> 28) & 7;
+        int cmp = (encoded_op >> 24) & 15;
+        int oparg = (encoded_op << 8) >> 20;
+        int cmparg = (encoded_op << 20) >> 20;
+        int oldval = 0, ret;
+        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+                oparg = 1 << oparg;
+        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
+                return -EFAULT;
+        inc_preempt_count();
+        switch (op) {
+        case FUTEX_OP_SET:
+                __futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr,
+                                   oparg);
+                break;
+        case FUTEX_OP_ADD:
+                __futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_OR:
+                __futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_ANDN:
+                __futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr,
+                                   ~oparg);
+                break;
+        case FUTEX_OP_XOR:
+                __futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        default:
+                ret = -ENOSYS;
+        }
+        dec_preempt_count();
+        if (!ret) {
+                switch (cmp) {
+                case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
+                case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
+                case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
+                case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
+                case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
+                case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
+                default: ret = -ENOSYS;
+                }
+        }
+        return ret;
+}
+static inline int
+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+{
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+                return -EFAULT;
+        {
+                register unsigned long r8 __asm ("r8");
+                __asm__ __volatile__(
+                        "       mf;;                                    \n"
+                        "       mov ar.ccv=%3;;                         \n"
+                        "[1:]   cmpxchg4.acq %0=[%1],%2,ar.ccv          \n"
+                        "       .xdata4 \"__ex_table\", 1b-., 2f-.      \n"
+                        "[2:]"
+                        : "=r" (r8)
+                        : "r" (uaddr), "r" (newval),
+                          "rO" ((long) (unsigned) oldval)
+                        : "memory");
+                return r8;
+        }
+}
+#endif /* _ASM_FUTEX_H */
diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h
index 938904910115..1b45b71c79b9 100644
--- a/include/asm-ia64/kprobes.h
+++ b/include/asm-ia64/kprobes.h
@@ -29,7 +29,8 @@
 #include <linux/percpu.h>
 #include <asm/break.h>
-#define MAX_INSN_SIZE   16
+#define __ARCH_WANT_KPROBES_INSN_SLOT
+#define MAX_INSN_SIZE   1
 #define BREAK_INST      (long)(__IA64_BREAK_KPROBE << 6)
 typedef union cmp_inst {
@@ -94,7 +95,7 @@ struct kprobe_ctlblk {
 #define IP_RELATIVE_PREDICT_OPCODE      (7)
 #define LONG_BRANCH_OPCODE              (0xC)
 #define LONG_CALL_OPCODE                (0xD)
-#define arch_remove_kprobe(p)           do {} while (0)
+#define flush_insn_slot(p)              do { } while (0)
 typedef struct kprobe_opcode {
        bundle_t bundle;
@@ -108,7 +109,7 @@ struct fnptr {
 /* Architecture specific copy of original instruction*/
 struct arch_specific_insn {
        /* copy of the instruction to be emulated */
-        kprobe_opcode_t insn;
+        kprobe_opcode_t *insn;
 #define INST_FLAG_FIX_RELATIVE_IP_ADDR         1
 #define INST_FLAG_FIX_BRANCH_REG               2
 #define INST_FLAG_BREAK_INST                   4
@@ -125,6 +126,6 @@ static inline void jprobe_return(void)
 }
 extern void invalidate_stacked_regs(void);
 extern void flush_register_stack(void);
-extern void flush_insn_slot(struct kprobe *p);
+extern void arch_remove_kprobe(struct kprobe *p);
 #endif                          /* _ASM_KPROBES_H */
diff --git a/include/asm-ia64/mca_asm.h b/include/asm-ia64/mca_asm.h
index 27c9203d8ce3..76203f9a8718 100644
--- a/include/asm-ia64/mca_asm.h
+++ b/include/asm-ia64/mca_asm.h
@@ -197,9 +197,9 @@
        movl    temp2 = start_addr;                             \
        ;;                                                      \
        mov     cr.iip = temp2;                                 \
+        movl    gp = __gp                                       \
        ;;                                                      \
        DATA_PA_TO_VA(sp, temp1);                               \
-        DATA_PA_TO_VA(gp, temp2);                               \
        srlz.i;                                                 \
        ;;                                                      \
        nop     1;                                              \
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 20a8d618c845..2c8fd92d0ece 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -78,6 +78,7 @@
 #define PAL_VM_TR_READ          261     /* read contents of translation register */
 #define PAL_GET_PSTATE          262     /* get the current P-state */
 #define PAL_SET_PSTATE          263     /* set the P-state */
+#define PAL_BRAND_INFO          274     /* Processor branding information */
 #ifndef __ASSEMBLY__
@@ -963,7 +964,8 @@ static inline s64
 ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
 {
        struct ia64_pal_retval iprv;
-        PAL_CALL(iprv, PAL_CACHE_READ, line_id.pclid_data, physical_addr, 0);
+        PAL_CALL_PHYS_STK(iprv, PAL_CACHE_READ, line_id.pclid_data,
+                                physical_addr, 0);
        return iprv.status;
 }
@@ -985,7 +987,8 @@ static inline s64
 ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data)
 {
        struct ia64_pal_retval iprv;
-        PAL_CALL(iprv, PAL_CACHE_WRITE, line_id.pclid_data, physical_addr, data);
+        PAL_CALL_PHYS_STK(iprv, PAL_CACHE_WRITE, line_id.pclid_data,
+                                physical_addr, data);
        return iprv.status;
 }
@@ -1133,6 +1136,15 @@ ia64_pal_set_pstate (u64 pstate_index)
        return iprv.status;
 }
+/* Processor branding information*/
+static inline s64
+ia64_pal_get_brand_info (char *brand_info)
+{
+        struct ia64_pal_retval iprv;
+        PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0);
+        return iprv.status;
+}
 /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
 * suspended, but cache and TLB coherency is maintained.
 */
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 265f4824db0e..5830d36fd8e6 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -20,12 +20,6 @@
 #include <asm/ustack.h>
 #define IA64_NUM_DBG_REGS       8
-/*
- * Limits for PMC and PMD are set to less than maximum architected values
- * but should be sufficient for a while
- */
-#define IA64_NUM_PMC_REGS       64
-#define IA64_NUM_PMD_REGS       64
 #define DEFAULT_MAP_BASE        __IA64_UL_CONST(0x2000000000000000)
 #define DEFAULT_TASK_SIZE       __IA64_UL_CONST(0xa000000000000000)
@@ -163,6 +157,7 @@ struct cpuinfo_ia64 {
        __u8 family;
        __u8 archrev;
        char vendor[16];
+        char *model_name;
 #ifdef CONFIG_NUMA
        struct ia64_node_data *node_data;
@@ -262,13 +257,9 @@ struct thread_struct {
 # define INIT_THREAD_IA32
 #endif /* CONFIG_IA32_SUPPORT */
 #ifdef CONFIG_PERFMON
-        __u64 pmcs[IA64_NUM_PMC_REGS];
-        __u64 pmds[IA64_NUM_PMD_REGS];
        void *pfm_context;                   /* pointer to detailed PMU context */
        unsigned long pfm_needs_checking;    /* when >0, pending perfmon work on kernel exit */
-# define INIT_THREAD_PM         .pmcs =                 {0UL, },  \
+# define INIT_THREAD_PM         .pfm_context =          NULL,     \
-                                .pmds =                 {0UL, },  \
-                                .pfm_context =          NULL,     \
                                .pfm_needs_checking =   0UL,
 #else
 # define INIT_THREAD_PM
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index 74bde1c2bb1a..60fd4ae014f6 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -126,6 +126,7 @@ extern void smp_send_reschedule (int cpu);
 extern void lock_ipi_calllock(void);
 extern void unlock_ipi_calllock(void);
 extern void identify_siblings (struct cpuinfo_ia64 *);
+extern int is_multithreading_enabled(void);
 #else
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index f581662c5ab8..bb0eb727dcd0 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -286,7 +286,8 @@
 /* 1294, 1295 reserved for pselect/ppoll */
 #define __NR_unshare                    1296
 #define __NR_splice                     1297
-/* 1298, 1299 reserved for set_robust_list/get_robust_list */
+#define __NR_set_robust_list            1298
+#define __NR_get_robust_list            1299
 #define __NR_sync_file_range            1300
 #define __NR_tee                        1301
 #define __NR_vmsplice                   1302

diff --git a/include/asm-ia64/esi.h b/include/asm-ia64/esi.h new file mode 100644 index 000000000000..84aac0e0b583 --- /dev/null +++ b/include/asm-ia64/esi.h
@@ -0,0 +1,30 @@
		1	/*
		2	* ESI service calls.
		3	*
		4	* Copyright (c) Copyright 2005-2006 Hewlett-Packard Development Company, L.P.
		5	* Alex Williamson <alex.williamson@hp.com>
		6	*/
		7	#ifndef esi_h
		8	#define esi_h
		9
		10	#include <linux/efi.h>
		11
		12	#define ESI_QUERY 0x00000001
		13	#define ESI_OPEN_HANDLE 0x02000000
		14	#define ESI_CLOSE_HANDLE 0x02000001
		15
		16	enum esi_proc_type {
		17	ESI_PROC_SERIALIZED, /* calls need to be serialized */
		18	ESI_PROC_MP_SAFE, /* MP-safe, but not reentrant */
		19	ESI_PROC_REENTRANT /* MP-safe and reentrant */
		20	};
		21
		22	extern int ia64_esi_init (void);
		23	extern struct ia64_sal_retval esi_call_phys (void , u64 );
		24	extern int ia64_esi_call(efi_guid_t, struct ia64_sal_retval *,
		25	enum esi_proc_type,
		26	u64, u64, u64, u64, u64, u64, u64, u64);
		27	extern int ia64_esi_call_phys(efi_guid_t, struct ia64_sal_retval *, u64, u64,
		28	u64, u64, u64, u64, u64, u64);
		29
		30	#endif /* esi_h */


diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h index 6a332a9f099c..07d77f3a8cbe 100644 --- a/include/asm-ia64/futex.h +++ b/include/asm-ia64/futex.h
@@ -1,6 +1,124 @@
1	#ifndef _ASM_FUTEX_H	1	#ifndef _ASM_FUTEX_H
2	#define _ASM_FUTEX_H	2	#define _ASM_FUTEX_H
3		3
4	#include <asm-generic/futex.h>	4	#include <linux/futex.h>
		5	#include <asm/errno.h>
		6	#include <asm/system.h>
		7	#include <asm/uaccess.h>
5		8
6	#endif	9	#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
		10	do { \
		11	register unsigned long r8 __asm ("r8") = 0; \
		12	__asm__ __volatile__( \
		13	" mf;; \n" \
		14	"[1:] " insn ";; \n" \
		15	" .xdata4 \"__ex_table\", 1b-., 2f-. \n" \
		16	"[2:]" \
		17	: "+r" (r8), "=r" (oldval) \
		18	: "r" (uaddr), "r" (oparg) \
		19	: "memory"); \
		20	ret = r8; \
		21	} while (0)
		22
		23	#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
		24	do { \
		25	register unsigned long r8 __asm ("r8") = 0; \
		26	int val, newval; \
		27	do { \
		28	__asm__ __volatile__( \
		29	" mf;; \n" \
		30	"[1:] ld4 %3=[%4];; \n" \
		31	" mov %2=%3 \n" \
		32	insn ";; \n" \
		33	" mov ar.ccv=%2;; \n" \
		34	"[2:] cmpxchg4.acq %1=[%4],%3,ar.ccv;; \n" \
		35	" .xdata4 \"__ex_table\", 1b-., 3f-.\n" \
		36	" .xdata4 \"__ex_table\", 2b-., 3f-.\n" \
		37	"[3:]" \
		38	: "+r" (r8), "=r" (val), "=&r" (oldval), \
		39	"=&r" (newval) \
		40	: "r" (uaddr), "r" (oparg) \
		41	: "memory"); \
		42	if (unlikely (r8)) \
		43	break; \
		44	} while (unlikely (val != oldval)); \
		45	ret = r8; \
		46	} while (0)
		47
		48	static inline int
		49	futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
		50	{
		51	int op = (encoded_op >> 28) & 7;
		52	int cmp = (encoded_op >> 24) & 15;
		53	int oparg = (encoded_op << 8) >> 20;
		54	int cmparg = (encoded_op << 20) >> 20;
		55	int oldval = 0, ret;
		56	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
		57	oparg = 1 << oparg;
		58
		59	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
		60	return -EFAULT;
		61
		62	inc_preempt_count();
		63
		64	switch (op) {
		65	case FUTEX_OP_SET:
		66	__futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr,
		67	oparg);
		68	break;
		69	case FUTEX_OP_ADD:
		70	__futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg);
		71	break;
		72	case FUTEX_OP_OR:
		73	__futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg);
		74	break;
		75	case FUTEX_OP_ANDN:
		76	__futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr,
		77	~oparg);
		78	break;
		79	case FUTEX_OP_XOR:
		80	__futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg);
		81	break;
		82	default:
		83	ret = -ENOSYS;
		84	}
		85
		86	dec_preempt_count();
		87
		88	if (!ret) {
		89	switch (cmp) {
		90	case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
		91	case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
		92	case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
		93	case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
		94	case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
		95	case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
		96	default: ret = -ENOSYS;
		97	}
		98	}
		99	return ret;
		100	}
		101
		102	static inline int
		103	futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
		104	{
		105	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
		106	return -EFAULT;
		107
		108	{
		109	register unsigned long r8 __asm ("r8");
		110	__asm__ __volatile__(
		111	" mf;; \n"
		112	" mov ar.ccv=%3;; \n"
		113	"[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
		114	" .xdata4 \"__ex_table\", 1b-., 2f-. \n"
		115	"[2:]"
		116	: "=r" (r8)
		117	: "r" (uaddr), "r" (newval),
		118	"rO" ((long) (unsigned) oldval)
		119	: "memory");
		120	return r8;
		121	}
		122	}
		123
		124	#endif /* _ASM_FUTEX_H */


diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h index 938904910115..1b45b71c79b9 100644 --- a/include/asm-ia64/kprobes.h +++ b/include/asm-ia64/kprobes.h
@@ -29,7 +29,8 @@
29	#include <linux/percpu.h>	29	#include <linux/percpu.h>
30	#include <asm/break.h>	30	#include <asm/break.h>
31		31
32	#define MAX_INSN_SIZE 16	32	#define __ARCH_WANT_KPROBES_INSN_SLOT
		33	#define MAX_INSN_SIZE 1
33	#define BREAK_INST (long)(__IA64_BREAK_KPROBE << 6)	34	#define BREAK_INST (long)(__IA64_BREAK_KPROBE << 6)
34		35
35	typedef union cmp_inst {	36	typedef union cmp_inst {
@@ -94,7 +95,7 @@ struct kprobe_ctlblk {
94	#define IP_RELATIVE_PREDICT_OPCODE (7)	95	#define IP_RELATIVE_PREDICT_OPCODE (7)
95	#define LONG_BRANCH_OPCODE (0xC)	96	#define LONG_BRANCH_OPCODE (0xC)
96	#define LONG_CALL_OPCODE (0xD)	97	#define LONG_CALL_OPCODE (0xD)
97	#define arch_remove_kprobe(p) do {} while (0)	98	#define flush_insn_slot(p) do { } while (0)
98		99
99	typedef struct kprobe_opcode {	100	typedef struct kprobe_opcode {
100	bundle_t bundle;	101	bundle_t bundle;
@@ -108,7 +109,7 @@ struct fnptr {
108	/* Architecture specific copy of original instruction*/	109	/* Architecture specific copy of original instruction*/
109	struct arch_specific_insn {	110	struct arch_specific_insn {
110	/* copy of the instruction to be emulated */	111	/* copy of the instruction to be emulated */
111	kprobe_opcode_t insn;	112	kprobe_opcode_t *insn;
112	#define INST_FLAG_FIX_RELATIVE_IP_ADDR 1	113	#define INST_FLAG_FIX_RELATIVE_IP_ADDR 1
113	#define INST_FLAG_FIX_BRANCH_REG 2	114	#define INST_FLAG_FIX_BRANCH_REG 2
114	#define INST_FLAG_BREAK_INST 4	115	#define INST_FLAG_BREAK_INST 4
@@ -125,6 +126,6 @@ static inline void jprobe_return(void)
125	}	126	}
126	extern void invalidate_stacked_regs(void);	127	extern void invalidate_stacked_regs(void);
127	extern void flush_register_stack(void);	128	extern void flush_register_stack(void);
128	extern void flush_insn_slot(struct kprobe *p);	129	extern void arch_remove_kprobe(struct kprobe *p);
129		130
130	#endif /* _ASM_KPROBES_H */	131	#endif /* _ASM_KPROBES_H */


diff --git a/include/asm-ia64/mca_asm.h b/include/asm-ia64/mca_asm.h index 27c9203d8ce3..76203f9a8718 100644 --- a/include/asm-ia64/mca_asm.h +++ b/include/asm-ia64/mca_asm.h
@@ -197,9 +197,9 @@
197	movl temp2 = start_addr; \	197	movl temp2 = start_addr; \
198	;; \	198	;; \
199	mov cr.iip = temp2; \	199	mov cr.iip = temp2; \
		200	movl gp = __gp \
200	;; \	201	;; \
201	DATA_PA_TO_VA(sp, temp1); \	202	DATA_PA_TO_VA(sp, temp1); \
202	DATA_PA_TO_VA(gp, temp2); \
203	srlz.i; \	203	srlz.i; \
204	;; \	204	;; \
205	nop 1; \	205	nop 1; \


diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 20a8d618c845..2c8fd92d0ece 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h
@@ -78,6 +78,7 @@
78	#define PAL_VM_TR_READ 261 /* read contents of translation register */	78	#define PAL_VM_TR_READ 261 /* read contents of translation register */
79	#define PAL_GET_PSTATE 262 /* get the current P-state */	79	#define PAL_GET_PSTATE 262 /* get the current P-state */
80	#define PAL_SET_PSTATE 263 /* set the P-state */	80	#define PAL_SET_PSTATE 263 /* set the P-state */
		81	#define PAL_BRAND_INFO 274 /* Processor branding information */
81		82
82	#ifndef __ASSEMBLY__	83	#ifndef __ASSEMBLY__
83		84
@@ -963,7 +964,8 @@ static inline s64
963	ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)	964	ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
964	{	965	{
965	struct ia64_pal_retval iprv;	966	struct ia64_pal_retval iprv;
966	PAL_CALL(iprv, PAL_CACHE_READ, line_id.pclid_data, physical_addr, 0);	967	PAL_CALL_PHYS_STK(iprv, PAL_CACHE_READ, line_id.pclid_data,
		968	physical_addr, 0);
967	return iprv.status;	969	return iprv.status;
968	}	970	}
969		971
@@ -985,7 +987,8 @@ static inline s64
985	ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data)	987	ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data)
986	{	988	{
987	struct ia64_pal_retval iprv;	989	struct ia64_pal_retval iprv;
988	PAL_CALL(iprv, PAL_CACHE_WRITE, line_id.pclid_data, physical_addr, data);	990	PAL_CALL_PHYS_STK(iprv, PAL_CACHE_WRITE, line_id.pclid_data,
		991	physical_addr, data);
989	return iprv.status;	992	return iprv.status;
990	}	993	}
991		994
@@ -1133,6 +1136,15 @@ ia64_pal_set_pstate (u64 pstate_index)
1133	return iprv.status;	1136	return iprv.status;
1134	}	1137	}
1135		1138
		1139	/* Processor branding information*/
		1140	static inline s64
		1141	ia64_pal_get_brand_info (char *brand_info)
		1142	{
		1143	struct ia64_pal_retval iprv;
		1144	PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0);
		1145	return iprv.status;
		1146	}
		1147
1136	/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are	1148	/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
1137	* suspended, but cache and TLB coherency is maintained.	1149	* suspended, but cache and TLB coherency is maintained.
1138	*/	1150	*/


diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index 265f4824db0e..5830d36fd8e6 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h
@@ -20,12 +20,6 @@
20	#include <asm/ustack.h>	20	#include <asm/ustack.h>
21		21
22	#define IA64_NUM_DBG_REGS 8	22	#define IA64_NUM_DBG_REGS 8
23	/*
24	* Limits for PMC and PMD are set to less than maximum architected values
25	* but should be sufficient for a while
26	*/
27	#define IA64_NUM_PMC_REGS 64
28	#define IA64_NUM_PMD_REGS 64
29		23
30	#define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000)	24	#define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000)
31	#define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000)	25	#define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000)
@@ -163,6 +157,7 @@ struct cpuinfo_ia64 {
163	__u8 family;	157	__u8 family;
164	__u8 archrev;	158	__u8 archrev;
165	char vendor[16];	159	char vendor[16];
		160	char *model_name;
166		161
167	#ifdef CONFIG_NUMA	162	#ifdef CONFIG_NUMA
168	struct ia64_node_data *node_data;	163	struct ia64_node_data *node_data;
@@ -262,13 +257,9 @@ struct thread_struct {
262	# define INIT_THREAD_IA32	257	# define INIT_THREAD_IA32
263	#endif /* CONFIG_IA32_SUPPORT */	258	#endif /* CONFIG_IA32_SUPPORT */
264	#ifdef CONFIG_PERFMON	259	#ifdef CONFIG_PERFMON
265	__u64 pmcs[IA64_NUM_PMC_REGS];
266	__u64 pmds[IA64_NUM_PMD_REGS];
267	void pfm_context; / pointer to detailed PMU context */	260	void pfm_context; / pointer to detailed PMU context */
268	unsigned long pfm_needs_checking; /* when >0, pending perfmon work on kernel exit */	261	unsigned long pfm_needs_checking; /* when >0, pending perfmon work on kernel exit */
269	# define INIT_THREAD_PM .pmcs = {0UL, }, \	262	# define INIT_THREAD_PM .pfm_context = NULL, \
270	.pmds = {0UL, }, \
271	.pfm_context = NULL, \
272	.pfm_needs_checking = 0UL,	263	.pfm_needs_checking = 0UL,
273	#else	264	#else
274	# define INIT_THREAD_PM	265	# define INIT_THREAD_PM


diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h index 74bde1c2bb1a..60fd4ae014f6 100644 --- a/include/asm-ia64/smp.h +++ b/include/asm-ia64/smp.h
@@ -126,6 +126,7 @@ extern void smp_send_reschedule (int cpu);
126	extern void lock_ipi_calllock(void);	126	extern void lock_ipi_calllock(void);
127	extern void unlock_ipi_calllock(void);	127	extern void unlock_ipi_calllock(void);
128	extern void identify_siblings (struct cpuinfo_ia64 *);	128	extern void identify_siblings (struct cpuinfo_ia64 *);
		129	extern int is_multithreading_enabled(void);
129		130
130	#else	131	#else
131		132


diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h index f581662c5ab8..bb0eb727dcd0 100644 --- a/include/asm-ia64/unistd.h +++ b/include/asm-ia64/unistd.h
@@ -286,7 +286,8 @@
286	/* 1294, 1295 reserved for pselect/ppoll */	286	/* 1294, 1295 reserved for pselect/ppoll */
287	#define __NR_unshare 1296	287	#define __NR_unshare 1296
288	#define __NR_splice 1297	288	#define __NR_splice 1297
289	/* 1298, 1299 reserved for set_robust_list/get_robust_list */	289	#define __NR_set_robust_list 1298
		290	#define __NR_get_robust_list 1299
290	#define __NR_sync_file_range 1300	291	#define __NR_sync_file_range 1300
291	#define __NR_tee 1301	292	#define __NR_tee 1301
292	#define __NR_vmsplice 1302	293	#define __NR_vmsplice 1302