22 files changed, 248 insertions, 160 deletions
diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h
index 3a544ffc5008..f7a517654308 100644
--- a/include/asm-ia64/acpi.h
+++ b/include/asm-ia64/acpi.h
@@ -106,6 +106,8 @@ extern unsigned int can_cpei_retarget(void);
 extern unsigned int is_cpu_cpei_target(unsigned int cpu);
 extern void set_cpei_target_cpu(unsigned int cpu);
 extern unsigned int get_cpei_target_cpu(void);
+extern void prefill_possible_map(void);
+extern int additional_cpus;
 #ifdef CONFIG_ACPI_NUMA
 /* Proximity bitmap length; _PXM is at most 255 (8 bit)*/
diff --git a/include/asm-ia64/ide.h b/include/asm-ia64/ide.h
index e62b95301d51..93f45c5f189f 100644
--- a/include/asm-ia64/ide.h
+++ b/include/asm-ia64/ide.h
@@ -17,14 +17,6 @@
 #include <linux/irq.h>
-#ifndef MAX_HWIFS
-# ifdef CONFIG_PCI
-#define MAX_HWIFS       10
-# else
-#define MAX_HWIFS       6
-# endif
-#endif
 #define IDE_ARCH_OBSOLETE_DEFAULTS
 static inline int ide_default_irq(unsigned long base)
diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h
index 6f0021bb3874..da1d43755afe 100644
--- a/include/asm-ia64/machvec_sn2.h
+++ b/include/asm-ia64/machvec_sn2.h
@@ -20,11 +20,6 @@
 * License along with this program; if not, write the Free Software 
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 * 
- * Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, 
- * Mountain View, CA  94043, or:
- * 
- * http://www.sgi.com 
- * 
 * For further information regarding this notice, see: 
 * 
 * http://oss.sgi.com/projects/GenInfo/NoticeExplan
diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h
index c7d9c9ed38ba..bfbbb8da79c7 100644
--- a/include/asm-ia64/mca.h
+++ b/include/asm-ia64/mca.h
@@ -131,6 +131,8 @@ struct ia64_mca_cpu {
 /* Array of physical addresses of each CPU's MCA area.  */
 extern unsigned long __per_cpu_mca[NR_CPUS];
+extern int cpe_vector;
+extern int ia64_cpe_irq;
 extern void ia64_mca_init(void);
 extern void ia64_mca_cpu_init(void *);
 extern void ia64_os_mca_dispatch(void);
diff --git a/include/asm-ia64/mman.h b/include/asm-ia64/mman.h
index 828beb24a20e..6ba179f12718 100644
--- a/include/asm-ia64/mman.h
+++ b/include/asm-ia64/mman.h
@@ -8,19 +8,7 @@
 *      David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
 */
-#define PROT_READ       0x1             /* page can be read */
+#include <asm-generic/mman.h>
-#define PROT_WRITE      0x2             /* page can be written */
-#define PROT_EXEC       0x4             /* page can be executed */
-#define PROT_SEM        0x8             /* page may be used for atomic ops */
-#define PROT_NONE       0x0             /* page can not be accessed */
-#define PROT_GROWSDOWN  0x01000000      /* mprotect flag: extend change to start of growsdown vma */
-#define PROT_GROWSUP    0x02000000      /* mprotect flag: extend change to end of growsup vma */
-#define MAP_SHARED      0x01            /* Share changes */
-#define MAP_PRIVATE     0x02            /* Changes are private */
-#define MAP_TYPE        0x0f            /* Mask for type of mapping */
-#define MAP_FIXED       0x10            /* Interpret addr exactly */
-#define MAP_ANONYMOUS   0x20            /* don't use a file */
 #define MAP_GROWSDOWN   0x00100         /* stack-like segment */
 #define MAP_GROWSUP     0x00200         /* register stack-like segment */
@@ -31,22 +19,7 @@
 #define MAP_POPULATE    0x08000         /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x10000         /* do not block on IO */
-#define MS_ASYNC        1               /* sync memory asynchronously */
-#define MS_INVALIDATE   2               /* invalidate the caches */
-#define MS_SYNC         4               /* synchronous memory sync */
 #define MCL_CURRENT     1               /* lock all current mappings */
 #define MCL_FUTURE      2               /* lock all future mappings */
-#define MADV_NORMAL     0x0             /* default page-in behavior */
-#define MADV_RANDOM     0x1             /* page-in minimum required */
-#define MADV_SEQUENTIAL 0x2             /* read-ahead aggressively */
-#define MADV_WILLNEED   0x3             /* pre-fault pages */
-#define MADV_DONTNEED   0x4             /* discard these pages */
-#define MADV_REMOVE     0x5             /* remove these pages & resources */
-/* compatibility flags */
-#define MAP_ANON        MAP_ANONYMOUS
-#define MAP_FILE        0
 #endif /* _ASM_IA64_MMAN_H */
diff --git a/include/asm-ia64/mutex.h b/include/asm-ia64/mutex.h
index 458c1f7fbc18..5a3224f6af38 100644
--- a/include/asm-ia64/mutex.h
+++ b/include/asm-ia64/mutex.h
@@ -1,9 +1,92 @@
 /*
- * Pull in the generic implementation for the mutex fastpath.
+ * ia64 implementation of the mutex fastpath.
 *
- * TODO: implement optimized primitives instead, or leave the generic
+ * Copyright (C) 2006 Ken Chen <kenneth.w.chen@intel.com>
- * implementation in place, or pick the atomic_xchg() based generic
+ *
- * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+#ifndef _ASM_MUTEX_H
+#define _ASM_MUTEX_H
+/**
+ *  __mutex_fastpath_lock - try to take the lock by moving the count
+ *                          from 1 to a 0 value
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 1
+ *
+ * Change the count from 1 to a value lower than 1, and call <fail_fn> if
+ * it wasn't 1 originally. This function MUST leave the value lower than
+ * 1 even when the "1" assertion wasn't true.
+ */
+static inline void
+__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        if (unlikely(ia64_fetchadd4_acq(count, -1) != 1))
+                fail_fn(count);
+}
+/**
+ *  __mutex_fastpath_lock_retval - try to take the lock by moving the count
+ *                                 from 1 to a 0 value
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 1
+ *
+ * Change the count from 1 to a value lower than 1, and call <fail_fn> if
+ * it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
+ * or anything the slow path function returns.
+ */
+static inline int
+__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        if (unlikely(ia64_fetchadd4_acq(count, -1) != 1))
+                return fail_fn(count);
+        return 0;
+}
+/**
+ *  __mutex_fastpath_unlock - try to promote the count from 0 to 1
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 0
+ *
+ * Try to promote the count from 0 to 1. If it wasn't 0, call <fail_fn>.
+ * In the failure case, this function is allowed to either set the value to
+ * 1, or to set it to a value lower than 1.
+ *
+ * If the implementation sets it to a value of lower than 1, then the
+ * __mutex_slowpath_needs_to_unlock() macro needs to return 1, it needs
+ * to return 0 otherwise.
+ */
+static inline void
+__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        int ret = ia64_fetchadd4_rel(count, 1);
+        if (unlikely(ret < 0))
+                fail_fn(count);
+}
+#define __mutex_slowpath_needs_to_unlock()              1
+/**
+ * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
+ *
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: fallback function
+ *
+ * Change the count from 1 to a value lower than 1, and return 0 (failure)
+ * if it wasn't 1 originally, or return 1 (success) otherwise. This function
+ * MUST leave the value lower than 1 even when the "1" assertion wasn't true.
+ * Additionally, if the value was < 0 originally, this function must not leave
+ * it to 0 on failure.
+ *
+ * If the architecture has no effective trylock variant, it should call the
+ * <fail_fn> spinlock-based trylock variant unconditionally.
 */
+static inline int
+__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        if (likely(cmpxchg_acq(count, 1, 0)) == 1)
+                return 1;
+        return 0;
+}
-#include <asm-generic/mutex-dec.h>
+#endif
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 29d5574d4375..128fefd8056f 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -560,6 +560,23 @@ ia64_eoi (void)
 #define cpu_relax()     ia64_hint(ia64_hint_pause)
+static inline int
+ia64_get_irr(unsigned int vector)
+{
+        unsigned int reg = vector / 64;
+        unsigned int bit = vector % 64;
+        u64 irr;
+        switch (reg) {
+        case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
+        case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
+        case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
+        case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
+        }
+        return test_bit(bit, &irr);
+}
 static inline void
 ia64_set_lrr0 (unsigned long val)
 {
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 313cad0628d0..0b210abbe003 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -658,15 +658,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
        return isrv.status;
 }
-/* Flush all the processor and platform level instruction and/or data caches */
+extern s64 ia64_sal_cache_flush (u64 cache_type);
-static inline s64
-ia64_sal_cache_flush (u64 cache_type)
-{
-        struct ia64_sal_retval isrv;
-        SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
-        return isrv.status;
-}
 /* Initialize all the processor and platform level instruction and data caches */
 static inline s64
diff --git a/include/asm-ia64/signal.h b/include/asm-ia64/signal.h
index 608168d713d3..5e328ed5d01d 100644
--- a/include/asm-ia64/signal.h
+++ b/include/asm-ia64/signal.h
@@ -158,8 +158,6 @@ struct k_sigaction {
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
-void set_sigdelayed(pid_t pid, int signo, int code, void __user *addr);
 #endif /* __KERNEL__ */
 # endif /* !__ASSEMBLY__ */
diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h
index 2c32e4b77b54..1d9efe541662 100644
--- a/include/asm-ia64/sn/addrs.h
+++ b/include/asm-ia64/sn/addrs.h
@@ -283,5 +283,13 @@
 #define REMOTE_HUB_L(n, a)              HUB_L(REMOTE_HUB_ADDR((n), (a)))
 #define REMOTE_HUB_S(n, a, d)           HUB_S(REMOTE_HUB_ADDR((n), (a)), (d))
+/*
+ * Coretalk address breakdown
+ */
+#define CTALK_NASID_SHFT                40
+#define CTALK_NASID_MASK                (0x3FFFULL << CTALK_NASID_SHFT)
+#define CTALK_CID_SHFT                  38
+#define CTALK_CID_MASK                  (0x3ULL << CTALK_CID_SHFT)
+#define CTALK_NODE_OFFSET               0x3FFFFFFFFF
 #endif /* _ASM_IA64_SN_ADDRS_H */
diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h
index 1a3831c04af6..16adc93d7a72 100644
--- a/include/asm-ia64/sn/arch.h
+++ b/include/asm-ia64/sn/arch.h
@@ -31,7 +31,8 @@
 *      to ACPI3.0, this limit will be removed. The notion of "compact nodes"
 *      should be deleted and TIOs should be included in MAX_NUMNODES.
 */
-#define MAX_COMPACT_NODES       512
+#define MAX_TIO_NODES           MAX_NUMNODES
+#define MAX_COMPACT_NODES       (MAX_NUMNODES + MAX_TIO_NODES)
 /*
 * Maximum number of nodes in all partitions and in all coherency domains.
@@ -70,7 +71,7 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
 * Compact node ID to nasid mappings kept in the per-cpu data areas of each
 * cpu.
 */
-DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
+DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]);
 #define sn_cnodeid_to_nasid     (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h
index f50da3d91d07..5335d87ca5f8 100644
--- a/include/asm-ia64/sn/bte.h
+++ b/include/asm-ia64/sn/bte.h
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (c) 2000-2005 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2000-2006 Silicon Graphics, Inc.  All Rights Reserved.
 */
@@ -46,7 +46,7 @@
 #define BTES_PER_NODE (is_shub2() ? 4 : 2)
 #define MAX_BTES_PER_NODE 4
-#define BTE2OFF_CTRL    (0)
+#define BTE2OFF_CTRL    0
 #define BTE2OFF_SRC     (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0)
 #define BTE2OFF_DEST    (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0)
 #define BTE2OFF_NOTIFY  (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0)
@@ -75,11 +75,11 @@
                : base + (BTEOFF_NOTIFY/8))
 /* Define hardware modes */
-#define BTE_NOTIFY (IBCT_NOTIFY)
+#define BTE_NOTIFY IBCT_NOTIFY
 #define BTE_NORMAL BTE_NOTIFY
 #define BTE_ZERO_FILL (BTE_NOTIFY | IBCT_ZFIL_MODE)
 /* Use a reserved bit to let the caller specify a wait for any BTE */
-#define BTE_WACQUIRE (0x4000)
+#define BTE_WACQUIRE 0x4000
 /* Use the BTE on the node with the destination memory */
 #define BTE_USE_DEST (BTE_WACQUIRE << 1)
 /* Use any available BTE interface on any node for the transfer */
@@ -100,13 +100,28 @@
 #define BTE_LNSTAT_STORE(_bte, _x)                                      \
                        HUB_S(_bte->bte_base_addr, (_x))
 #define BTE_SRC_STORE(_bte, _x)                                         \
-                        HUB_S(_bte->bte_source_addr, (_x))
+({                                                                      \
+                u64 __addr = ((_x) & ~AS_MASK);                         \
+                if (is_shub2())                                         \
+                        __addr = SH2_TIO_PHYS_TO_DMA(__addr);           \
+                HUB_S(_bte->bte_source_addr, __addr);                   \
+})
 #define BTE_DEST_STORE(_bte, _x)                                        \
-                        HUB_S(_bte->bte_destination_addr, (_x))
+({                                                                      \
+                u64 __addr = ((_x) & ~AS_MASK);                         \
+                if (is_shub2())                                         \
+                        __addr = SH2_TIO_PHYS_TO_DMA(__addr);           \
+                HUB_S(_bte->bte_destination_addr, __addr);              \
+})
 #define BTE_CTRL_STORE(_bte, _x)                                        \
                        HUB_S(_bte->bte_control_addr, (_x))
 #define BTE_NOTIF_STORE(_bte, _x)                                       \
-                        HUB_S(_bte->bte_notify_addr, (_x))
+({                                                                      \
+                u64 __addr = ia64_tpa((_x) & ~AS_MASK);                 \
+                if (is_shub2())                                         \
+                        __addr = SH2_TIO_PHYS_TO_DMA(__addr);           \
+                HUB_S(_bte->bte_notify_addr, __addr);                   \
+})
 #define BTE_START_TRANSFER(_bte, _len, _mode)                           \
        is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h
index a3431372c6e7..60a51a406eec 100644
--- a/include/asm-ia64/sn/intr.h
+++ b/include/asm-ia64/sn/intr.h
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
 */
 #ifndef _ASM_IA64_SN_INTR_H
@@ -11,26 +11,26 @@
 #include <linux/rcupdate.h>
-#define SGI_UART_VECTOR         (0xe9)
+#define SGI_UART_VECTOR         0xe9
 /* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */
-#define SGI_XPC_ACTIVATE                (0x30)
+#define SGI_XPC_ACTIVATE        0x30
-#define SGI_II_ERROR                    (0x31)
+#define SGI_II_ERROR            0x31
-#define SGI_XBOW_ERROR                  (0x32)
+#define SGI_XBOW_ERROR          0x32
-#define SGI_PCIASIC_ERROR               (0x33)
+#define SGI_PCIASIC_ERROR       0x33
-#define SGI_ACPI_SCI_INT                (0x34)
+#define SGI_ACPI_SCI_INT        0x34
-#define SGI_TIOCA_ERROR                 (0x35)
+#define SGI_TIOCA_ERROR         0x35
-#define SGI_TIO_ERROR                   (0x36)
+#define SGI_TIO_ERROR           0x36
-#define SGI_TIOCX_ERROR                 (0x37)
+#define SGI_TIOCX_ERROR         0x37
-#define SGI_MMTIMER_VECTOR              (0x38)
+#define SGI_MMTIMER_VECTOR      0x38
-#define SGI_XPC_NOTIFY                  (0xe7)
+#define SGI_XPC_NOTIFY          0xe7
-#define IA64_SN2_FIRST_DEVICE_VECTOR    (0x3c)
+#define IA64_SN2_FIRST_DEVICE_VECTOR    0x3c
-#define IA64_SN2_LAST_DEVICE_VECTOR     (0xe6)
+#define IA64_SN2_LAST_DEVICE_VECTOR     0xe6
-#define SN2_IRQ_RESERVED        (0x1)
+#define SN2_IRQ_RESERVED        0x1
-#define SN2_IRQ_CONNECTED       (0x2)
+#define SN2_IRQ_CONNECTED       0x2
-#define SN2_IRQ_SHARED          (0x4)
+#define SN2_IRQ_SHARED          0x4
 // The SN PROM irq struct
 struct sn_irq_info {
diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h
index 9334078b089a..a601d3af39b6 100644
--- a/include/asm-ia64/sn/pcibr_provider.h
+++ b/include/asm-ia64/sn/pcibr_provider.h
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992-1997,2000-2006 Silicon Graphics, Inc. All rights reserved.
 */
 #ifndef _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H
 #define _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H
@@ -115,18 +115,6 @@ struct pcibus_info {
        spinlock_t              pbi_lock;
 };
-/*
- * pcibus_info structure locking macros
- */
-inline static unsigned long
-pcibr_lock(struct pcibus_info *pcibus_info)
-{
-        unsigned long flag;
-        spin_lock_irqsave(&pcibus_info->pbi_lock, flag);
-        return(flag);
-}
-#define pcibr_unlock(pcibus_info, flag)  spin_unlock_irqrestore(&pcibus_info->pbi_lock, flag)
 extern int  pcibr_init_provider(void);
 extern void *pcibr_bus_fixup(struct pcibus_bussoft *, struct pci_controller *);
 extern dma_addr_t pcibr_dma_map(struct pci_dev *, unsigned long, size_t);
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index e68a80853d5d..ff33e3bd3f8e 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -8,13 +8,10 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (c) 2005 Silicon Graphics, Inc.  All rights reserved.
+ * Copyright (c) 2005-2006 Silicon Graphics, Inc.  All rights reserved.
 */
-#include <asm/types.h>
-#include <asm/bitops.h>
 /* --------------------- PROM Features -----------------------------*/
 extern int sn_prom_feature_available(int id);
@@ -27,14 +24,12 @@ extern int sn_prom_feature_available(int id);
 * "false" for new features.
 *
 * Use:
- *              if (sn_prom_feature_available(PRF_FEATURE_XXX))
+ *              if (sn_prom_feature_available(PRF_XXX))
 *                      ...
 */
-/*
+#define PRF_PAL_CACHE_FLUSH_SAFE        0
- * Example: feature XXX
+#define PRF_DEVICE_FLUSH_LIST           1
- */
-#define PRF_FEATURE_XXX         0
@@ -51,7 +46,7 @@ extern int sn_prom_feature_available(int id);
 *
 * By default, features are disabled unless explicitly enabled.
 */
-#define  OSF_MCA_SLV_TO_OS_INIT_SLV             0
+#define  OSF_MCA_SLV_TO_OS_INIT_SLV     0
-#define  OSF_FEAT_LOG_SBES                      1
+#define  OSF_FEAT_LOG_SBES              1
 #endif /* _ASM_IA64_SN_FEATURE_SETS_H */
diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h
index d4c990712eac..893468e1b41b 100644
--- a/include/asm-ia64/sn/tioce.h
+++ b/include/asm-ia64/sn/tioce.h
@@ -11,7 +11,7 @@
 /* CE ASIC part & mfgr information  */
 #define TIOCE_PART_NUM                  0xCE00
-#define TIOCE_MFGR_NUM                  0x36
+#define TIOCE_SRC_ID                    0x01
 #define TIOCE_REV_A                     0x1
 /* CE Virtual PPB Vendor/Device IDs */
@@ -20,7 +20,7 @@
 /* CE Host Bridge Vendor/Device IDs */
 #define CE_HOST_BRIDGE_VENDOR_ID        0x10a9
-#define CE_HOST_BRIDGE_DEVICE_ID        0x4003
+#define CE_HOST_BRIDGE_DEVICE_ID        0x4001
 #define TIOCE_NUM_M40_ATES              4096
@@ -463,6 +463,25 @@ typedef volatile struct tioce {
        u64     ce_end_of_struct;                       /* 0x044400 */
 } tioce_t;
+/* ce_lsiX_gb_cfg1 register bit masks & shifts */
+#define CE_LSI_GB_CFG1_RXL0S_THS_SHFT   0
+#define CE_LSI_GB_CFG1_RXL0S_THS_MASK   (0xffULL << 0)
+#define CE_LSI_GB_CFG1_RXL0S_SMP_SHFT   8
+#define CE_LSI_GB_CFG1_RXL0S_SMP_MASK   (0xfULL << 8);
+#define CE_LSI_GB_CFG1_RXL0S_ADJ_SHFT   12
+#define CE_LSI_GB_CFG1_RXL0S_ADJ_MASK   (0x7ULL << 12)
+#define CE_LSI_GB_CFG1_RXL0S_FLT_SHFT   15
+#define CE_LSI_GB_CFG1_RXL0S_FLT_MASK   (0x1ULL << 15)
+#define CE_LSI_GB_CFG1_LPBK_SEL_SHFT    16
+#define CE_LSI_GB_CFG1_LPBK_SEL_MASK    (0x3ULL << 16)
+#define CE_LSI_GB_CFG1_LPBK_EN_SHFT     18
+#define CE_LSI_GB_CFG1_LPBK_EN_MASK     (0x1ULL << 18)
+#define CE_LSI_GB_CFG1_RVRS_LB_SHFT     19
+#define CE_LSI_GB_CFG1_RVRS_LB_MASK     (0x1ULL << 19)
+#define CE_LSI_GB_CFG1_RVRS_CLK_SHFT    20
+#define CE_LSI_GB_CFG1_RVRS_CLK_MASK    (0x3ULL << 20)
+#define CE_LSI_GB_CFG1_SLF_TS_SHFT      24
+#define CE_LSI_GB_CFG1_SLF_TS_MASK      (0xfULL << 24)
 /* ce_adm_int_mask/ce_adm_int_status register bit defines */
 #define CE_ADM_INT_CE_ERROR_SHFT                0
@@ -592,6 +611,11 @@ typedef volatile struct tioce {
 #define CE_URE_RD_MRG_ENABLE            (0x1ULL << 0)
 #define CE_URE_WRT_MRG_ENABLE1          (0x1ULL << 4)
 #define CE_URE_WRT_MRG_ENABLE2          (0x1ULL << 5)
+#define CE_URE_WRT_MRG_TIMER_SHFT       12
+#define CE_URE_WRT_MRG_TIMER_MASK       (0x7FFULL << CE_URE_WRT_MRG_TIMER_SHFT)
+#define CE_URE_WRT_MRG_TIMER(x)         (((u64)(x) << \
+                                          CE_URE_WRT_MRG_TIMER_SHFT) & \
+                                         CE_URE_WRT_MRG_TIMER_MASK)
 #define CE_URE_RSPQ_BYPASS_DISABLE      (0x1ULL << 24)
 #define CE_URE_UPS_DAT1_PAR_DISABLE     (0x1ULL << 32)
 #define CE_URE_UPS_HDR1_PAR_DISABLE     (0x1ULL << 33)
@@ -653,8 +677,12 @@ typedef volatile struct tioce {
 #define CE_URE_SI                       (0x1ULL << 0)
 #define CE_URE_ELAL_SHFT                4
 #define CE_URE_ELAL_MASK                (0x7ULL << CE_URE_ELAL_SHFT)
+#define CE_URE_ELAL_SET(n)              (((u64)(n) << CE_URE_ELAL_SHFT) & \
+                                         CE_URE_ELAL_MASK)
 #define CE_URE_ELAL1_SHFT               8
 #define CE_URE_ELAL1_MASK               (0x7ULL << CE_URE_ELAL1_SHFT)
+#define CE_URE_ELAL1_SET(n)             (((u64)(n) << CE_URE_ELAL1_SHFT) & \
+                                         CE_URE_ELAL1_MASK)
 #define CE_URE_SCC                      (0x1ULL << 12)
 #define CE_URE_PN1_SHFT                 16
 #define CE_URE_PN1_MASK                 (0xFFULL << CE_URE_PN1_SHFT)
@@ -675,8 +703,12 @@ typedef volatile struct tioce {
 #define CE_URE_HPC                      (0x1ULL << 6)
 #define CE_URE_SPLV_SHFT                7
 #define CE_URE_SPLV_MASK                (0xFFULL << CE_URE_SPLV_SHFT)
+#define CE_URE_SPLV_SET(n)              (((u64)(n) << CE_URE_SPLV_SHFT) & \
+                                         CE_URE_SPLV_MASK)
 #define CE_URE_SPLS_SHFT                15
 #define CE_URE_SPLS_MASK                (0x3ULL << CE_URE_SPLS_SHFT)
+#define CE_URE_SPLS_SET(n)              (((u64)(n) << CE_URE_SPLS_SHFT) & \
+                                         CE_URE_SPLS_MASK)
 #define CE_URE_PSN1_SHFT                19
 #define CE_URE_PSN1_MASK                (0x1FFFULL << CE_URE_PSN1_SHFT)
 #define CE_URE_PSN2_SHFT                32
diff --git a/include/asm-ia64/sn/xpc.h b/include/asm-ia64/sn/xpc.h
index 0c36928ffd8b..df7f5f4f3cde 100644
--- a/include/asm-ia64/sn/xpc.h
+++ b/include/asm-ia64/sn/xpc.h
@@ -508,19 +508,24 @@ struct xpc_channel {
 #define XPC_C_OPENREQUEST       0x00000010 /* local open channel request */
 #define XPC_C_SETUP             0x00000020 /* channel's msgqueues are alloc'd */
-#define XPC_C_CONNECTCALLOUT    0x00000040 /* channel connected callout made */
+#define XPC_C_CONNECTEDCALLOUT  0x00000040 /* connected callout initiated */
-#define XPC_C_CONNECTED         0x00000080 /* local channel is connected */
+#define XPC_C_CONNECTEDCALLOUT_MADE \
-#define XPC_C_CONNECTING        0x00000100 /* channel is being connected */
+                                0x00000080 /* connected callout completed */
+#define XPC_C_CONNECTED         0x00000100 /* local channel is connected */
-#define XPC_C_RCLOSEREPLY       0x00000200 /* remote close channel reply */
+#define XPC_C_CONNECTING        0x00000200 /* channel is being connected */
-#define XPC_C_CLOSEREPLY        0x00000400 /* local close channel reply */
-#define XPC_C_RCLOSEREQUEST     0x00000800 /* remote close channel request */
+#define XPC_C_RCLOSEREPLY       0x00000400 /* remote close channel reply */
-#define XPC_C_CLOSEREQUEST      0x00001000 /* local close channel request */
+#define XPC_C_CLOSEREPLY        0x00000800 /* local close channel reply */
+#define XPC_C_RCLOSEREQUEST     0x00001000 /* remote close channel request */
-#define XPC_C_DISCONNECTED      0x00002000 /* channel is disconnected */
+#define XPC_C_CLOSEREQUEST      0x00002000 /* local close channel request */
-#define XPC_C_DISCONNECTING     0x00004000 /* channel is being disconnected */
-#define XPC_C_DISCONNECTCALLOUT 0x00008000 /* chan disconnected callout made */
+#define XPC_C_DISCONNECTED      0x00004000 /* channel is disconnected */
-#define XPC_C_WDISCONNECT       0x00010000 /* waiting for channel disconnect */
+#define XPC_C_DISCONNECTING     0x00008000 /* channel is being disconnected */
+#define XPC_C_DISCONNECTINGCALLOUT \
+                                0x00010000 /* disconnecting callout initiated */
+#define XPC_C_DISCONNECTINGCALLOUT_MADE \
+                                0x00020000 /* disconnecting callout completed */
+#define XPC_C_WDISCONNECT       0x00040000 /* waiting for channel disconnect */
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 99b6f307e94b..cd4233d66f15 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -256,32 +256,7 @@ extern void ia64_load_extra (struct task_struct *task);
 # define switch_to(prev,next,last)      __switch_to(prev, next, last)
 #endif
-/*
- * On IA-64, we don't want to hold the runqueue's lock during the low-level context-switch,
- * because that could cause a deadlock.  Here is an example by Erich Focht:
- *
- * Example:
- * CPU#0:
- * schedule()
- *    -> spin_lock_irq(&rq->lock)
- *    -> context_switch()
- *       -> wrap_mmu_context()
- *          -> read_lock(&tasklist_lock)
- *
- * CPU#1:
- * sys_wait4() or release_task() or forget_original_parent()
- *    -> write_lock(&tasklist_lock)
- *    -> do_notify_parent()
- *       -> wake_up_parent()
- *          -> try_to_wake_up()
- *             -> spin_lock_irq(&parent_rq->lock)
- *
- * If the parent's rq happens to be on CPU#0, we'll wait for the rq->lock
- * of that CPU which will not be released, because there we wait for the
- * tasklist_lock to become available.
- */
 #define __ARCH_WANT_UNLOCKED_CTXSW
 #define ARCH_HAS_PREFETCH_SWITCH_STACK
 #define ia64_platform_is(x) (strcmp(x, platform_name) == 0)
diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h
index 81641a6905d1..56394a2c7055 100644
--- a/include/asm-ia64/thread_info.h
+++ b/include/asm-ia64/thread_info.h
@@ -30,13 +30,6 @@ struct thread_info {
        mm_segment_t addr_limit;        /* user-level address space limit */
        int preempt_count;              /* 0=premptable, <0=BUG; will also serve as bh-counter */
        struct restart_block restart_block;
-        struct {
-                int signo;
-                int code;
-                void __user *addr;
-                unsigned long start_time;
-                pid_t pid;
-        } sigdelayed;                   /* Saved information for TIF_SIGDELAYED */
 };
 #define THREAD_SIZE                     KERNEL_STACK_SIZE
@@ -90,7 +83,6 @@ struct thread_info {
 #define TIF_NEED_RESCHED        2       /* rescheduling necessary */
 #define TIF_SYSCALL_TRACE       3       /* syscall trace active */
 #define TIF_SYSCALL_AUDIT       4       /* syscall auditing active */
-#define TIF_SIGDELAYED          5       /* signal delayed from MCA/INIT/NMI/PMI context */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              17
 #define TIF_MCA_INIT            18      /* this task is processing MCA or INIT */
@@ -102,13 +94,12 @@ struct thread_info {
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
-#define _TIF_SIGDELAYED         (1 << TIF_SIGDELAYED)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_MCA_INIT           (1 << TIF_MCA_INIT)
 #define _TIF_DB_DISABLED        (1 << TIF_DB_DISABLED)
 /* "work to do on user-return" bits */
-#define TIF_ALLWORK_MASK        (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SIGDELAYED)
+#define TIF_ALLWORK_MASK        (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
 /* like TIF_ALLWORK_BITS but sans TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT */
 #define TIF_WORK_MASK           (TIF_ALLWORK_MASK&~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT))
diff --git a/include/asm-ia64/timex.h b/include/asm-ia64/timex.h
index 414aae060440..05a6baf8a472 100644
--- a/include/asm-ia64/timex.h
+++ b/include/asm-ia64/timex.h
@@ -15,6 +15,8 @@
 typedef unsigned long cycles_t;
+extern void (*ia64_udelay)(unsigned long usecs);
 /*
 * For performance reasons, we don't want to define CLOCK_TICK_TRATE as
 * local_cpu_data->itc_rate.  Fortunately, we don't have to, either: according to George
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index 412ef8e493a8..3ee19dfa46df 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -102,6 +102,13 @@ void build_cpu_to_node_map(void);
 #endif /* CONFIG_NUMA */
+#ifdef CONFIG_SMP
+#define topology_physical_package_id(cpu)       (cpu_data(cpu)->socket_id)
+#define topology_core_id(cpu)                   (cpu_data(cpu)->core_id)
+#define topology_core_siblings(cpu)             (cpu_core_map[cpu])
+#define topology_thread_siblings(cpu)           (cpu_sibling_map[cpu])
+#endif
 #include <asm-generic/topology.h>
 #endif /* _ASM_IA64_TOPOLOGY_H */
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index 962f9bd1bdff..019956c613e4 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -270,12 +270,27 @@
 #define __NR_inotify_add_watch          1278
 #define __NR_inotify_rm_watch           1279
 #define __NR_migrate_pages              1280
+#define __NR_openat                     1281
+#define __NR_mkdirat                    1282
+#define __NR_mknodat                    1283
+#define __NR_fchownat                   1284
+#define __NR_futimesat                  1285
+#define __NR_newfstatat                 1286
+#define __NR_unlinkat                   1287
+#define __NR_renameat                   1288
+#define __NR_linkat                     1289
+#define __NR_symlinkat                  1290
+#define __NR_readlinkat                 1291
+#define __NR_fchmodat                   1292
+#define __NR_faccessat                  1293
+/* 1294, 1295 reserved for pselect/ppoll */
+#define __NR_unshare                    1296
 #ifdef __KERNEL__
 #include <linux/config.h>
-#define NR_syscalls                     270 /* length of syscall table */
+#define NR_syscalls                     273 /* length of syscall table */
 #define __ARCH_WANT_SYS_RT_SIGACTION