diff options
Diffstat (limited to 'include/asm-ia64')
| -rw-r--r-- | include/asm-ia64/system.h | 10 | ||||
| -rw-r--r-- | include/asm-ia64/topology.h | 61 |
2 files changed, 48 insertions, 23 deletions
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h index 6f516e76d1f0..cd2cf76b2db1 100644 --- a/include/asm-ia64/system.h +++ b/include/asm-ia64/system.h | |||
| @@ -183,8 +183,6 @@ do { \ | |||
| 183 | 183 | ||
| 184 | #ifdef __KERNEL__ | 184 | #ifdef __KERNEL__ |
| 185 | 185 | ||
| 186 | #define prepare_to_switch() do { } while(0) | ||
| 187 | |||
| 188 | #ifdef CONFIG_IA32_SUPPORT | 186 | #ifdef CONFIG_IA32_SUPPORT |
| 189 | # define IS_IA32_PROCESS(regs) (ia64_psr(regs)->is != 0) | 187 | # define IS_IA32_PROCESS(regs) (ia64_psr(regs)->is != 0) |
| 190 | #else | 188 | #else |
| @@ -274,13 +272,7 @@ extern void ia64_load_extra (struct task_struct *task); | |||
| 274 | * of that CPU which will not be released, because there we wait for the | 272 | * of that CPU which will not be released, because there we wait for the |
| 275 | * tasklist_lock to become available. | 273 | * tasklist_lock to become available. |
| 276 | */ | 274 | */ |
| 277 | #define prepare_arch_switch(rq, next) \ | 275 | #define __ARCH_WANT_UNLOCKED_CTXSW |
| 278 | do { \ | ||
| 279 | spin_lock(&(next)->switch_lock); \ | ||
| 280 | spin_unlock(&(rq)->lock); \ | ||
| 281 | } while (0) | ||
| 282 | #define finish_arch_switch(rq, prev) spin_unlock_irq(&(prev)->switch_lock) | ||
| 283 | #define task_running(rq, p) ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock)) | ||
| 284 | 276 | ||
| 285 | #define ia64_platform_is(x) (strcmp(x, platform_name) == 0) | 277 | #define ia64_platform_is(x) (strcmp(x, platform_name) == 0) |
| 286 | 278 | ||
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h index 21cf351fd05c..4e64c2a6b369 100644 --- a/include/asm-ia64/topology.h +++ b/include/asm-ia64/topology.h | |||
| @@ -42,25 +42,54 @@ | |||
| 42 | 42 | ||
| 43 | void build_cpu_to_node_map(void); | 43 | void build_cpu_to_node_map(void); |
| 44 | 44 | ||
| 45 | #define SD_CPU_INIT (struct sched_domain) { \ | ||
| 46 | .span = CPU_MASK_NONE, \ | ||
| 47 | .parent = NULL, \ | ||
| 48 | .groups = NULL, \ | ||
| 49 | .min_interval = 1, \ | ||
| 50 | .max_interval = 4, \ | ||
| 51 | .busy_factor = 64, \ | ||
| 52 | .imbalance_pct = 125, \ | ||
| 53 | .cache_hot_time = (10*1000000), \ | ||
| 54 | .per_cpu_gain = 100, \ | ||
| 55 | .cache_nice_tries = 2, \ | ||
| 56 | .busy_idx = 2, \ | ||
| 57 | .idle_idx = 1, \ | ||
| 58 | .newidle_idx = 2, \ | ||
| 59 | .wake_idx = 1, \ | ||
| 60 | .forkexec_idx = 1, \ | ||
| 61 | .flags = SD_LOAD_BALANCE \ | ||
| 62 | | SD_BALANCE_NEWIDLE \ | ||
| 63 | | SD_BALANCE_EXEC \ | ||
| 64 | | SD_WAKE_AFFINE, \ | ||
| 65 | .last_balance = jiffies, \ | ||
| 66 | .balance_interval = 1, \ | ||
| 67 | .nr_balance_failed = 0, \ | ||
| 68 | } | ||
| 69 | |||
| 45 | /* sched_domains SD_NODE_INIT for IA64 NUMA machines */ | 70 | /* sched_domains SD_NODE_INIT for IA64 NUMA machines */ |
| 46 | #define SD_NODE_INIT (struct sched_domain) { \ | 71 | #define SD_NODE_INIT (struct sched_domain) { \ |
| 47 | .span = CPU_MASK_NONE, \ | 72 | .span = CPU_MASK_NONE, \ |
| 48 | .parent = NULL, \ | 73 | .parent = NULL, \ |
| 49 | .groups = NULL, \ | 74 | .groups = NULL, \ |
| 50 | .min_interval = 80, \ | 75 | .min_interval = 8, \ |
| 51 | .max_interval = 320, \ | 76 | .max_interval = 8*(min(num_online_cpus(), 32)), \ |
| 52 | .busy_factor = 320, \ | 77 | .busy_factor = 64, \ |
| 53 | .imbalance_pct = 125, \ | 78 | .imbalance_pct = 125, \ |
| 54 | .cache_hot_time = (10*1000000), \ | 79 | .cache_hot_time = (10*1000000), \ |
| 55 | .cache_nice_tries = 1, \ | 80 | .cache_nice_tries = 2, \ |
| 81 | .busy_idx = 3, \ | ||
| 82 | .idle_idx = 2, \ | ||
| 83 | .newidle_idx = 0, /* unused */ \ | ||
| 84 | .wake_idx = 1, \ | ||
| 85 | .forkexec_idx = 1, \ | ||
| 56 | .per_cpu_gain = 100, \ | 86 | .per_cpu_gain = 100, \ |
| 57 | .flags = SD_LOAD_BALANCE \ | 87 | .flags = SD_LOAD_BALANCE \ |
| 58 | | SD_BALANCE_EXEC \ | 88 | | SD_BALANCE_EXEC \ |
| 59 | | SD_BALANCE_NEWIDLE \ | 89 | | SD_BALANCE_FORK \ |
| 60 | | SD_WAKE_IDLE \ | ||
| 61 | | SD_WAKE_BALANCE, \ | 90 | | SD_WAKE_BALANCE, \ |
| 62 | .last_balance = jiffies, \ | 91 | .last_balance = jiffies, \ |
| 63 | .balance_interval = 1, \ | 92 | .balance_interval = 64, \ |
| 64 | .nr_balance_failed = 0, \ | 93 | .nr_balance_failed = 0, \ |
| 65 | } | 94 | } |
| 66 | 95 | ||
| @@ -69,17 +98,21 @@ void build_cpu_to_node_map(void); | |||
| 69 | .span = CPU_MASK_NONE, \ | 98 | .span = CPU_MASK_NONE, \ |
| 70 | .parent = NULL, \ | 99 | .parent = NULL, \ |
| 71 | .groups = NULL, \ | 100 | .groups = NULL, \ |
| 72 | .min_interval = 80, \ | 101 | .min_interval = 64, \ |
| 73 | .max_interval = 320, \ | 102 | .max_interval = 64*num_online_cpus(), \ |
| 74 | .busy_factor = 320, \ | 103 | .busy_factor = 128, \ |
| 75 | .imbalance_pct = 125, \ | 104 | .imbalance_pct = 133, \ |
| 76 | .cache_hot_time = (10*1000000), \ | 105 | .cache_hot_time = (10*1000000), \ |
| 77 | .cache_nice_tries = 1, \ | 106 | .cache_nice_tries = 1, \ |
| 107 | .busy_idx = 3, \ | ||
| 108 | .idle_idx = 3, \ | ||
| 109 | .newidle_idx = 0, /* unused */ \ | ||
| 110 | .wake_idx = 0, /* unused */ \ | ||
| 111 | .forkexec_idx = 0, /* unused */ \ | ||
| 78 | .per_cpu_gain = 100, \ | 112 | .per_cpu_gain = 100, \ |
| 79 | .flags = SD_LOAD_BALANCE \ | 113 | .flags = SD_LOAD_BALANCE, \ |
| 80 | | SD_BALANCE_EXEC, \ | ||
| 81 | .last_balance = jiffies, \ | 114 | .last_balance = jiffies, \ |
| 82 | .balance_interval = 100*(63+num_online_cpus())/64, \ | 115 | .balance_interval = 64, \ |
| 83 | .nr_balance_failed = 0, \ | 116 | .nr_balance_failed = 0, \ |
| 84 | } | 117 | } |
| 85 | 118 | ||