18 files changed, 68 insertions, 27 deletions

diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h
index f7a517654308..d734585a23cf 100644
--- a/include/asm-ia64/acpi.h
+++ b/include/asm-ia64/acpi.h
@@ -111,7 +111,11 @@ extern int additional_cpus;
 
 #ifdef CONFIG_ACPI_NUMA
 /* Proximity bitmap length; _PXM is at most 255 (8 bit)*/
+#ifdef CONFIG_IA64_NR_NODES
+#define MAX_PXM_DOMAINS CONFIG_IA64_NR_NODES
+#else
 #define MAX_PXM_DOMAINS (256)
+#endif
 extern int __devinitdata pxm_to_nid_map[MAX_PXM_DOMAINS];
 extern int __initdata nid_to_pxm_map[MAX_NUMNODES];
 #endif
diff --git a/include/asm-ia64/asmmacro.h b/include/asm-ia64/asmmacro.h
index 77af457f4ad7..d4cec32083d8 100644
--- a/include/asm-ia64/asmmacro.h
+++ b/include/asm-ia64/asmmacro.h
@@ -51,6 +51,17 @@ name:
   [99:] x
 
 /*
+ * Tag MCA recoverable instruction ranges.
+ */
+
+        .section "__mca_table", "a"             // declare section & section attributes
+        .previous
+
+# define MCA_RECOVER_RANGE(y)                   \
+        .xdata4 "__mca_table", y-., 99f-.;      \
+  [99:]
+
+/*
  * Mark instructions that need a load of a virtual address patched to be
  * a load of a physical address.  We use this either in critical performance
  * path (ivt.S - TLB miss processing) or in places where it might not be
diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h
index d3e0dfa99e1f..569ec7574baf 100644
--- a/include/asm-ia64/atomic.h
+++ b/include/asm-ia64/atomic.h
@@ -95,8 +95,14 @@ ia64_atomic64_sub (__s64 i, atomic64_t *v)
 ({                                                              \
         int c, old;                                             \
         c = atomic_read(v);                                     \
-        while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
+        for (;;) {                                              \
+                if (unlikely(c == (u)))                         \
+                        break;                                  \
+                old = atomic_cmpxchg((v), c, c + (a));          \
+                if (likely(old == c))                           \
+                        break;                                  \
                 c = old;                                        \
+        }                                                       \
         c != (u);                                               \
 })
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
diff --git a/include/asm-ia64/cache.h b/include/asm-ia64/cache.h
index 40dd25195d65..f0a104db8f20 100644
--- a/include/asm-ia64/cache.h
+++ b/include/asm-ia64/cache.h
@@ -25,4 +25,6 @@
 # define SMP_CACHE_BYTES        (1 << 3)
 #endif
 
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
 #endif /* _ASM_IA64_CACHE_H */
diff --git a/include/asm-ia64/linkage.h b/include/asm-ia64/linkage.h
index 14cd72cd8007..ef22a45c1890 100644
--- a/include/asm-ia64/linkage.h
+++ b/include/asm-ia64/linkage.h
@@ -1,6 +1,14 @@
 #ifndef __ASM_LINKAGE_H
 #define __ASM_LINKAGE_H
 
+#ifndef __ASSEMBLY__
+
 #define asmlinkage CPP_ASMLINKAGE __attribute__((syscall_linkage))
 
+#else
+
+#include <asm/asmmacro.h>
+
+#endif
+
 #endif
diff --git a/include/asm-ia64/machvec_dig.h b/include/asm-ia64/machvec_dig.h
index 4dc8522c974f..8a0752f40987 100644
--- a/include/asm-ia64/machvec_dig.h
+++ b/include/asm-ia64/machvec_dig.h
@@ -2,7 +2,6 @@
 #define _ASM_IA64_MACHVEC_DIG_h
 
 extern ia64_mv_setup_t dig_setup;
-extern ia64_mv_irq_init_t dig_irq_init;
 
 /*
  * This stuff has dual use!
@@ -13,6 +12,5 @@ extern ia64_mv_irq_init_t dig_irq_init;
  */
 #define platform_name           "dig"
 #define platform_setup          dig_setup
-#define platform_irq_init       dig_irq_init
 
 #endif /* _ASM_IA64_MACHVEC_DIG_h */
diff --git a/include/asm-ia64/numa.h b/include/asm-ia64/numa.h
index 3ae128fe0823..dae6aeb7b119 100644
--- a/include/asm-ia64/numa.h
+++ b/include/asm-ia64/numa.h
@@ -23,7 +23,7 @@
 
 #include <asm/mmzone.h>
 
-extern u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
+extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
 extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
 
 /* Stuff below this line could be architecture independent */
diff --git a/include/asm-ia64/numnodes.h b/include/asm-ia64/numnodes.h
index 21cff4da5485..e9d356f549d9 100644
--- a/include/asm-ia64/numnodes.h
+++ b/include/asm-ia64/numnodes.h
@@ -3,13 +3,18 @@
 
 #ifdef CONFIG_IA64_DIG
 /* Max 8 Nodes */
-#define NODES_SHIFT     3
+#  define NODES_SHIFT   3
 #elif defined(CONFIG_IA64_HP_ZX1) || defined(CONFIG_IA64_HP_ZX1_SWIOTLB)
 /* Max 32 Nodes */
-#define NODES_SHIFT     5
+#  define NODES_SHIFT   5
 #elif defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
-/* Max 256 Nodes */
-#define NODES_SHIFT     8
+#  if CONFIG_IA64_NR_NODES == 256
+#    define NODES_SHIFT 8
+#  elif CONFIG_IA64_NR_NODES <= 512
+#    define NODES_SHIFT    9
+#  elif CONFIG_IA64_NR_NODES <= 1024
+#    define NODES_SHIFT    10
+#  endif
 #endif
 
 #endif /* _ASM_MAX_NUMNODES_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 3ab27333dae4..6e9aa23250c4 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -149,7 +149,7 @@ typedef union ia64_va {
                                  | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
 # define HUGETLB_PAGE_ORDER     (HPAGE_SHIFT - PAGE_SHIFT)
 # define is_hugepage_only_range(mm, addr, len)          \
-         (REGION_NUMBER(addr) == RGN_HPAGE &&   \
+         (REGION_NUMBER(addr) == RGN_HPAGE ||   \
           REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE)
 extern unsigned int hpage_shift;
 #endif
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 7708ec669a33..4e7e6f23b08c 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -1640,8 +1640,7 @@ ia64_pal_logical_to_phys(u64 proc_number, pal_logical_to_physical_t *mapping)
 
         if (iprv.status == PAL_STATUS_SUCCESS)
         {
-                if (proc_number == 0)
-                        mapping->overview.overview_data = iprv.v0;
+                mapping->overview.overview_data = iprv.v0;
                 mapping->ppli1.ppli1_data = iprv.v1;
                 mapping->ppli2.ppli2_data = iprv.v2;
         }
diff --git a/include/asm-ia64/poll.h b/include/asm-ia64/poll.h
index 160258a0528d..bcaf9f140242 100644
--- a/include/asm-ia64/poll.h
+++ b/include/asm-ia64/poll.h
@@ -21,6 +21,7 @@
 #define POLLWRBAND      0x0200
 #define POLLMSG         0x0400
 #define POLLREMOVE      0x1000
+#define POLLRDHUP       0x2000
 
 struct pollfd {
         int fd;
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 128fefd8056f..b3bd58e80690 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -181,7 +181,6 @@ DECLARE_PER_CPU(struct cpuinfo_ia64, cpu_info);
 #define local_cpu_data          (&__ia64_per_cpu_var(cpu_info))
 #define cpu_data(cpu)           (&per_cpu(cpu_info, cpu))
 
-extern void identify_cpu (struct cpuinfo_ia64 *);
 extern void print_cpu_info (struct cpuinfo_ia64 *);
 
 typedef struct {
diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h
index e3b819110d47..344bf44bb356 100644
--- a/include/asm-ia64/sn/l1.h
+++ b/include/asm-ia64/sn/l1.h
@@ -34,6 +34,8 @@
 #define L1_BRICKTYPE_IA         0x6b            /* k */
 #define L1_BRICKTYPE_ATHENA     0x2b            /* + */
 #define L1_BRICKTYPE_DAYTONA    0x7a            /* z */
+#define L1_BRICKTYPE_1932       0x2c            /* . */
+#define L1_BRICKTYPE_191010     0x2e            /* , */
 
 /* board type response codes */
 #define L1_BOARDTYPE_IP69       0x0100          /* CA */
@@ -46,5 +48,4 @@
 #define L1_BOARDTYPE_DAYTONA    0x0800          /* AD */
 #define L1_BOARDTYPE_INVAL      (-1)            /* invalid brick type */
 
-
 #endif /* _ASM_IA64_SN_L1_H */
diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h
index a601d3af39b6..51260ab70d91 100644
--- a/include/asm-ia64/sn/pcibr_provider.h
+++ b/include/asm-ia64/sn/pcibr_provider.h
@@ -144,4 +144,5 @@ extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device,
                                  void *resp);
 extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device,
                                   int action, void *resp);
+extern u16 sn_ioboard_to_pci_bus(struct pci_bus *pci_bus);
 #endif
diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h
index 38cdffbc4c7b..eac3561574be 100644
--- a/include/asm-ia64/sn/pcidev.h
+++ b/include/asm-ia64/sn/pcidev.h
@@ -76,6 +76,7 @@ extern void sn_pci_controller_fixup(int segment, int busnum,
                                     struct pci_bus *bus);
 extern void sn_bus_store_sysdata(struct pci_dev *dev);
 extern void sn_bus_free_sysdata(void);
+extern void sn_generate_path(struct pci_bus *pci_bus, char *address);
 extern void sn_pci_fixup_slot(struct pci_dev *dev);
 extern void sn_pci_unfixup_slot(struct pci_dev *dev);
 extern void sn_irq_lh_init(void);
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index ff33e3bd3f8e..30dcfa442e53 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -30,8 +30,7 @@ extern int sn_prom_feature_available(int id);
 
 #define PRF_PAL_CACHE_FLUSH_SAFE        0
 #define PRF_DEVICE_FLUSH_LIST           1
-
-
+#define PRF_HOTPLUG_SUPPORT             2
 
 /* --------------------- OS Features -------------------------------*/
 
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index e77f0c9b7d3d..244449df7411 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -907,18 +907,22 @@ ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
 /*
  * Get the associated ioboard type for a given nasid.
  */
-static inline int
-ia64_sn_sysctl_ioboard_get(nasid_t nasid)
+static inline s64
+ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
 {
-        struct ia64_sal_retval rv;
-        SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
-                        nasid, 0, 0, 0, 0, 0);
-        if (rv.v0 != 0)
-                return (int)rv.v0;
-        if (rv.v1 != 0)
-                return (int)rv.v1;
-
-        return 0;
+        struct ia64_sal_retval isrv;
+        SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
+                           nasid, 0, 0, 0, 0, 0);
+        if (isrv.v0 != 0) {
+                *ioboard = isrv.v0;
+                return isrv.status;
+        }
+        if (isrv.v1 != 0) {
+                *ioboard = isrv.v1;
+                return isrv.status;
+        }
+
+        return isrv.status;
 }
 
 /**
@@ -1037,7 +1041,7 @@ ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
 
 /***** BEGIN HACK - temp til old proms no longer supported ********/
         if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
-                int nasid = get_sapicid() & 0xfff;;
+                int nasid = get_sapicid() & 0xfff;
 #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
 #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
                 if (shubtype) *shubtype = 0;
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index cd4233d66f15..2f3620593687 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -265,6 +265,8 @@ void sched_cacheflush(void);
 
 #define arch_align_stack(x) (x)
 
+void default_idle(void);
+
 #endif /* __KERNEL__ */
 
 #endif /* __ASSEMBLY__ */