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-rw-r--r--include/asm-ia64/ide.h8
-rw-r--r--include/asm-ia64/processor.h17
-rw-r--r--include/asm-ia64/sal.h10
-rw-r--r--include/asm-ia64/sn/bte.h23
-rw-r--r--include/asm-ia64/sn/intr.h38
-rw-r--r--include/asm-ia64/sn/sn_feature_sets.h14
-rw-r--r--include/asm-ia64/system.h25
-rw-r--r--include/asm-ia64/topology.h7
8 files changed, 69 insertions, 73 deletions
diff --git a/include/asm-ia64/ide.h b/include/asm-ia64/ide.h
index e62b95301d51..93f45c5f189f 100644
--- a/include/asm-ia64/ide.h
+++ b/include/asm-ia64/ide.h
@@ -17,14 +17,6 @@
17 17
18#include <linux/irq.h> 18#include <linux/irq.h>
19 19
20#ifndef MAX_HWIFS
21# ifdef CONFIG_PCI
22#define MAX_HWIFS 10
23# else
24#define MAX_HWIFS 6
25# endif
26#endif
27
28#define IDE_ARCH_OBSOLETE_DEFAULTS 20#define IDE_ARCH_OBSOLETE_DEFAULTS
29 21
30static inline int ide_default_irq(unsigned long base) 22static inline int ide_default_irq(unsigned long base)
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 09b99029ac1a..23c8e1be1911 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -559,6 +559,23 @@ ia64_eoi (void)
559 559
560#define cpu_relax() ia64_hint(ia64_hint_pause) 560#define cpu_relax() ia64_hint(ia64_hint_pause)
561 561
562static inline int
563ia64_get_irr(unsigned int vector)
564{
565 unsigned int reg = vector / 64;
566 unsigned int bit = vector % 64;
567 u64 irr;
568
569 switch (reg) {
570 case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
571 case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
572 case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
573 case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
574 }
575
576 return test_bit(bit, &irr);
577}
578
562static inline void 579static inline void
563ia64_set_lrr0 (unsigned long val) 580ia64_set_lrr0 (unsigned long val)
564{ 581{
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 313cad0628d0..0b210abbe003 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -658,15 +658,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
658 return isrv.status; 658 return isrv.status;
659} 659}
660 660
661/* Flush all the processor and platform level instruction and/or data caches */ 661extern s64 ia64_sal_cache_flush (u64 cache_type);
662static inline s64
663ia64_sal_cache_flush (u64 cache_type)
664{
665 struct ia64_sal_retval isrv;
666 SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
667 return isrv.status;
668}
669
670 662
671/* Initialize all the processor and platform level instruction and data caches */ 663/* Initialize all the processor and platform level instruction and data caches */
672static inline s64 664static inline s64
diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h
index f50da3d91d07..01e5b4103235 100644
--- a/include/asm-ia64/sn/bte.h
+++ b/include/asm-ia64/sn/bte.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. 6 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
7 */ 7 */
8 8
9 9
@@ -100,13 +100,28 @@
100#define BTE_LNSTAT_STORE(_bte, _x) \ 100#define BTE_LNSTAT_STORE(_bte, _x) \
101 HUB_S(_bte->bte_base_addr, (_x)) 101 HUB_S(_bte->bte_base_addr, (_x))
102#define BTE_SRC_STORE(_bte, _x) \ 102#define BTE_SRC_STORE(_bte, _x) \
103 HUB_S(_bte->bte_source_addr, (_x)) 103({ \
104 u64 __addr = ((_x) & ~AS_MASK); \
105 if (is_shub2()) \
106 __addr = SH2_TIO_PHYS_TO_DMA(__addr); \
107 HUB_S(_bte->bte_source_addr, __addr); \
108})
104#define BTE_DEST_STORE(_bte, _x) \ 109#define BTE_DEST_STORE(_bte, _x) \
105 HUB_S(_bte->bte_destination_addr, (_x)) 110({ \
111 u64 __addr = ((_x) & ~AS_MASK); \
112 if (is_shub2()) \
113 __addr = SH2_TIO_PHYS_TO_DMA(__addr); \
114 HUB_S(_bte->bte_destination_addr, __addr); \
115})
106#define BTE_CTRL_STORE(_bte, _x) \ 116#define BTE_CTRL_STORE(_bte, _x) \
107 HUB_S(_bte->bte_control_addr, (_x)) 117 HUB_S(_bte->bte_control_addr, (_x))
108#define BTE_NOTIF_STORE(_bte, _x) \ 118#define BTE_NOTIF_STORE(_bte, _x) \
109 HUB_S(_bte->bte_notify_addr, (_x)) 119({ \
120 u64 __addr = ia64_tpa((_x) & ~AS_MASK); \
121 if (is_shub2()) \
122 __addr = SH2_TIO_PHYS_TO_DMA(__addr); \
123 HUB_S(_bte->bte_notify_addr, __addr); \
124})
110 125
111#define BTE_START_TRANSFER(_bte, _len, _mode) \ 126#define BTE_START_TRANSFER(_bte, _len, _mode) \
112 is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \ 127 is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h
index a3431372c6e7..60a51a406eec 100644
--- a/include/asm-ia64/sn/intr.h
+++ b/include/asm-ia64/sn/intr.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#ifndef _ASM_IA64_SN_INTR_H 9#ifndef _ASM_IA64_SN_INTR_H
@@ -11,26 +11,26 @@
11 11
12#include <linux/rcupdate.h> 12#include <linux/rcupdate.h>
13 13
14#define SGI_UART_VECTOR (0xe9) 14#define SGI_UART_VECTOR 0xe9
15 15
16/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */ 16/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */
17#define SGI_XPC_ACTIVATE (0x30) 17#define SGI_XPC_ACTIVATE 0x30
18#define SGI_II_ERROR (0x31) 18#define SGI_II_ERROR 0x31
19#define SGI_XBOW_ERROR (0x32) 19#define SGI_XBOW_ERROR 0x32
20#define SGI_PCIASIC_ERROR (0x33) 20#define SGI_PCIASIC_ERROR 0x33
21#define SGI_ACPI_SCI_INT (0x34) 21#define SGI_ACPI_SCI_INT 0x34
22#define SGI_TIOCA_ERROR (0x35) 22#define SGI_TIOCA_ERROR 0x35
23#define SGI_TIO_ERROR (0x36) 23#define SGI_TIO_ERROR 0x36
24#define SGI_TIOCX_ERROR (0x37) 24#define SGI_TIOCX_ERROR 0x37
25#define SGI_MMTIMER_VECTOR (0x38) 25#define SGI_MMTIMER_VECTOR 0x38
26#define SGI_XPC_NOTIFY (0xe7) 26#define SGI_XPC_NOTIFY 0xe7
27 27
28#define IA64_SN2_FIRST_DEVICE_VECTOR (0x3c) 28#define IA64_SN2_FIRST_DEVICE_VECTOR 0x3c
29#define IA64_SN2_LAST_DEVICE_VECTOR (0xe6) 29#define IA64_SN2_LAST_DEVICE_VECTOR 0xe6
30 30
31#define SN2_IRQ_RESERVED (0x1) 31#define SN2_IRQ_RESERVED 0x1
32#define SN2_IRQ_CONNECTED (0x2) 32#define SN2_IRQ_CONNECTED 0x2
33#define SN2_IRQ_SHARED (0x4) 33#define SN2_IRQ_SHARED 0x4
34 34
35// The SN PROM irq struct 35// The SN PROM irq struct
36struct sn_irq_info { 36struct sn_irq_info {
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index e68a80853d5d..9ca642cad338 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -8,7 +8,7 @@
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 * 10 *
11 * Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved. 11 * Copyright (c) 2005-2006 Silicon Graphics, Inc. All rights reserved.
12 */ 12 */
13 13
14 14
@@ -27,14 +27,12 @@ extern int sn_prom_feature_available(int id);
27 * "false" for new features. 27 * "false" for new features.
28 * 28 *
29 * Use: 29 * Use:
30 * if (sn_prom_feature_available(PRF_FEATURE_XXX)) 30 * if (sn_prom_feature_available(PRF_XXX))
31 * ... 31 * ...
32 */ 32 */
33 33
34/* 34#define PRF_PAL_CACHE_FLUSH_SAFE 0
35 * Example: feature XXX 35#define PRF_DEVICE_FLUSH_LIST 1
36 */
37#define PRF_FEATURE_XXX 0
38 36
39 37
40 38
@@ -51,7 +49,7 @@ extern int sn_prom_feature_available(int id);
51 * 49 *
52 * By default, features are disabled unless explicitly enabled. 50 * By default, features are disabled unless explicitly enabled.
53 */ 51 */
54#define OSF_MCA_SLV_TO_OS_INIT_SLV 0 52#define OSF_MCA_SLV_TO_OS_INIT_SLV 0
55#define OSF_FEAT_LOG_SBES 1 53#define OSF_FEAT_LOG_SBES 1
56 54
57#endif /* _ASM_IA64_SN_FEATURE_SETS_H */ 55#endif /* _ASM_IA64_SN_FEATURE_SETS_H */
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 80c5a234e259..062538715623 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -249,32 +249,7 @@ extern void ia64_load_extra (struct task_struct *task);
249# define switch_to(prev,next,last) __switch_to(prev, next, last) 249# define switch_to(prev,next,last) __switch_to(prev, next, last)
250#endif 250#endif
251 251
252/*
253 * On IA-64, we don't want to hold the runqueue's lock during the low-level context-switch,
254 * because that could cause a deadlock. Here is an example by Erich Focht:
255 *
256 * Example:
257 * CPU#0:
258 * schedule()
259 * -> spin_lock_irq(&rq->lock)
260 * -> context_switch()
261 * -> wrap_mmu_context()
262 * -> read_lock(&tasklist_lock)
263 *
264 * CPU#1:
265 * sys_wait4() or release_task() or forget_original_parent()
266 * -> write_lock(&tasklist_lock)
267 * -> do_notify_parent()
268 * -> wake_up_parent()
269 * -> try_to_wake_up()
270 * -> spin_lock_irq(&parent_rq->lock)
271 *
272 * If the parent's rq happens to be on CPU#0, we'll wait for the rq->lock
273 * of that CPU which will not be released, because there we wait for the
274 * tasklist_lock to become available.
275 */
276#define __ARCH_WANT_UNLOCKED_CTXSW 252#define __ARCH_WANT_UNLOCKED_CTXSW
277
278#define ARCH_HAS_PREFETCH_SWITCH_STACK 253#define ARCH_HAS_PREFETCH_SWITCH_STACK
279#define ia64_platform_is(x) (strcmp(x, platform_name) == 0) 254#define ia64_platform_is(x) (strcmp(x, platform_name) == 0)
280 255
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index 412ef8e493a8..3ee19dfa46df 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -102,6 +102,13 @@ void build_cpu_to_node_map(void);
102 102
103#endif /* CONFIG_NUMA */ 103#endif /* CONFIG_NUMA */
104 104
105#ifdef CONFIG_SMP
106#define topology_physical_package_id(cpu) (cpu_data(cpu)->socket_id)
107#define topology_core_id(cpu) (cpu_data(cpu)->core_id)
108#define topology_core_siblings(cpu) (cpu_core_map[cpu])
109#define topology_thread_siblings(cpu) (cpu_sibling_map[cpu])
110#endif
111
105#include <asm-generic/topology.h> 112#include <asm-generic/topology.h>
106 113
107#endif /* _ASM_IA64_TOPOLOGY_H */ 114#endif /* _ASM_IA64_TOPOLOGY_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-15 13:55:51 -0500