23 files changed, 247 insertions, 76 deletions

diff --git a/include/asm-ia64/Kbuild b/include/asm-ia64/Kbuild
index 15818a18bc52..4a1e48b9f403 100644
--- a/include/asm-ia64/Kbuild
+++ b/include/asm-ia64/Kbuild
@@ -10,7 +10,6 @@ header-y += intrinsics.h
 header-y += perfmon_default_smpl.h
 header-y += ptrace_offsets.h
 header-y += rse.h
-header-y += setup.h
 header-y += ucontext.h
 
 unifdef-y += perfmon.h
diff --git a/include/asm-ia64/checksum.h b/include/asm-ia64/checksum.h
index 1f230ff8ea81..2b78582cbd61 100644
--- a/include/asm-ia64/checksum.h
+++ b/include/asm-ia64/checksum.h
@@ -10,23 +10,21 @@
  * This is a version of ip_compute_csum() optimized for IP headers,
  * which always checksum on 4 octet boundaries.
  */
-extern unsigned short ip_fast_csum (unsigned char * iph, unsigned int ihl);
+extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
 
 /*
  * Computes the checksum of the TCP/UDP pseudo-header returns a 16-bit
  * checksum, already complemented
  */
-extern unsigned short int csum_tcpudp_magic (unsigned long saddr,
-                                             unsigned long daddr,
+extern __sum16 csum_tcpudp_magic (__be32 saddr, __be32 daddr,
                                              unsigned short len,
                                              unsigned short proto,
-                                             unsigned int sum);
+                                             __wsum sum);
 
-extern unsigned int csum_tcpudp_nofold (unsigned long saddr,
-                                        unsigned long daddr,
+extern __wsum csum_tcpudp_nofold (__be32 saddr, __be32 daddr,
                                         unsigned short len,
                                         unsigned short proto,
-                                        unsigned int sum);
+                                        __wsum sum);
 
 /*
  * Computes the checksum of a memory block at buff, length len,
@@ -40,8 +38,7 @@ extern unsigned int csum_tcpudp_nofold (unsigned long saddr,
  *
  * it's best to have buff aligned on a 32-bit boundary
  */
-extern unsigned int csum_partial (const unsigned char * buff, int len,
-                                  unsigned int sum);
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
 
 /*
  * Same as csum_partial, but copies from src while it checksums.
@@ -49,28 +46,34 @@ extern unsigned int csum_partial (const unsigned char * buff, int len,
  * Here it is even more important to align src and dst on a 32-bit (or
  * even better 64-bit) boundary.
  */
-extern unsigned int csum_partial_copy_from_user (const char *src, char *dst,
-                                                 int len, unsigned int sum,
+extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+                                                 int len, __wsum sum,
                                                  int *errp);
 
-extern unsigned int csum_partial_copy_nocheck (const char *src, char *dst,
-                                               int len, unsigned int sum);
+extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
+                                               int len, __wsum sum);
 
 /*
  * This routine is used for miscellaneous IP-like checksums, mainly in
  * icmp.c
  */
-extern unsigned short ip_compute_csum (unsigned char *buff, int len);
+extern __sum16 ip_compute_csum(const void *buff, int len);
 
 /*
  * Fold a partial checksum without adding pseudo headers.
  */
-static inline unsigned short
-csum_fold (unsigned int sum)
+static inline __sum16 csum_fold(__wsum csum)
 {
+        u32 sum = (__force u32)csum;
         sum = (sum & 0xffff) + (sum >> 16);
         sum = (sum & 0xffff) + (sum >> 16);
-        return ~sum;
+        return (__force __sum16)~sum;
 }
 
+#define _HAVE_ARCH_IPV6_CSUM    1
+struct in6_addr;
+extern unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
+        struct in6_addr *daddr, __u32 len, unsigned short proto,
+        unsigned int csum);
+
 #endif /* _ASM_IA64_CHECKSUM_H */
diff --git a/include/asm-ia64/device.h b/include/asm-ia64/device.h
new file mode 100644
index 000000000000..3db6daf7f251
--- /dev/null
+++ b/include/asm-ia64/device.h
@@ -0,0 +1,15 @@
+/*
+ * Arch specific extensions to struct device
+ *
+ * This file is released under the GPLv2
+ */
+#ifndef _ASM_IA64_DEVICE_H
+#define _ASM_IA64_DEVICE_H
+
+struct dev_archdata {
+#ifdef CONFIG_ACPI
+        void    *acpi_handle;
+#endif
+};
+
+#endif /* _ASM_IA64_DEVICE_H */
diff --git a/include/asm-ia64/dma-mapping.h b/include/asm-ia64/dma-mapping.h
index 99a8f8e1218c..ebd5887f4b1a 100644
--- a/include/asm-ia64/dma-mapping.h
+++ b/include/asm-ia64/dma-mapping.h
@@ -50,7 +50,8 @@ dma_set_mask (struct device *dev, u64 mask)
 extern int dma_get_cache_alignment(void);
 
 static inline void
-dma_cache_sync (void *vaddr, size_t size, enum dma_data_direction dir)
+dma_cache_sync (struct device *dev, void *vaddr, size_t size,
+        enum dma_data_direction dir)
 {
         /*
          * IA-64 is cache-coherent, so this is mostly a no-op.  However, we do need to
@@ -59,6 +60,6 @@ dma_cache_sync (void *vaddr, size_t size, enum dma_data_direction dir)
         mb();
 }
 
-#define dma_is_consistent(dma_handle)   (1)     /* all we do is coherent memory... */
+#define dma_is_consistent(d, h) (1)     /* all we do is coherent memory... */
 
 #endif /* _ASM_IA64_DMA_MAPPING_H */
diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h
index 07d77f3a8cbe..8a98a2654139 100644
--- a/include/asm-ia64/futex.h
+++ b/include/asm-ia64/futex.h
@@ -59,7 +59,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
         if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
                 return -EFAULT;
 
-        inc_preempt_count();
+        pagefault_disable();
 
         switch (op) {
         case FUTEX_OP_SET:
@@ -83,7 +83,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
                 ret = -ENOSYS;
         }
 
-        dec_preempt_count();
+        pagefault_enable();
 
         if (!ret) {
                 switch (cmp) {
diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h
index 43bfff6c6b87..6311e168cd34 100644
--- a/include/asm-ia64/io.h
+++ b/include/asm-ia64/io.h
@@ -32,7 +32,7 @@
  */
 #define IO_SPACE_LIMIT          0xffffffffffffffffUL
 
-#define MAX_IO_SPACES_BITS              4
+#define MAX_IO_SPACES_BITS              8
 #define MAX_IO_SPACES                   (1UL << MAX_IO_SPACES_BITS)
 #define IO_SPACE_BITS                   24
 #define IO_SPACE_SIZE                   (1UL << IO_SPACE_BITS)
@@ -417,6 +417,8 @@ __writeq (unsigned long val, volatile void __iomem *addr)
 # define outl_p         outl
 #endif
 
+# ifdef __KERNEL__
+
 extern void __iomem * ioremap(unsigned long offset, unsigned long size);
 extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
 
@@ -430,8 +432,6 @@ iounmap (volatile void __iomem *addr)
 #define dmi_iounmap(x,l) iounmap(x)
 #define dmi_alloc(l) kmalloc(l, GFP_ATOMIC)
 
-# ifdef __KERNEL__
-
 /*
  * String version of IO memory access ops:
  */
diff --git a/include/asm-ia64/kexec.h b/include/asm-ia64/kexec.h
new file mode 100644
index 000000000000..01c36b004747
--- /dev/null
+++ b/include/asm-ia64/kexec.h
@@ -0,0 +1,47 @@
+#ifndef _ASM_IA64_KEXEC_H
+#define _ASM_IA64_KEXEC_H
+
+
+/* Maximum physical address we can use pages from */
+#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
+/* Maximum address we can reach in physical address mode */
+#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
+/* Maximum address we can use for the control code buffer */
+#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
+
+#define KEXEC_CONTROL_CODE_SIZE (8192 + 8192 + 4096)
+
+/* The native architecture */
+#define KEXEC_ARCH KEXEC_ARCH_IA_64
+
+#define MAX_NOTE_BYTES 1024
+
+#define kexec_flush_icache_page(page) do { \
+                unsigned long page_addr = (unsigned long)page_address(page); \
+                flush_icache_range(page_addr, page_addr + PAGE_SIZE); \
+        } while(0)
+
+extern struct kimage *ia64_kimage;
+DECLARE_PER_CPU(u64, ia64_mca_pal_base);
+const extern unsigned int relocate_new_kernel_size;
+extern void relocate_new_kernel(unsigned long, unsigned long,
+                struct ia64_boot_param *, unsigned long);
+static inline void
+crash_setup_regs(struct pt_regs *newregs, struct pt_regs *oldregs)
+{
+}
+extern struct resource efi_memmap_res;
+extern struct resource boot_param_res;
+extern void kdump_smp_send_stop(void);
+extern void kdump_smp_send_init(void);
+extern void kexec_disable_iosapic(void);
+extern void crash_save_this_cpu(void);
+struct rsvd_region;
+extern unsigned long kdump_find_rsvd_region(unsigned long size,
+                struct rsvd_region *rsvd_regions, int n);
+extern void kdump_cpu_freeze(struct unw_frame_info *info, void *arg);
+extern int kdump_status[];
+extern atomic_t kdump_cpu_freezed;
+extern atomic_t kdump_in_progress;
+
+#endif /* _ASM_IA64_KEXEC_H */
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index 7ffbddf5306f..a3891eb3f217 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -36,6 +36,8 @@ typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val,
 typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val,
                                         u8 size);
 typedef void ia64_mv_migrate_t(struct task_struct * task);
+typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *);
+typedef void ia64_mv_kernel_launch_event_t(void);
 
 /* DMA-mapping interface: */
 typedef void ia64_mv_dma_init (void);
@@ -95,6 +97,11 @@ machvec_noop_task (struct task_struct *task)
 {
 }
 
+static inline void
+machvec_noop_bus (struct pci_bus *bus)
+{
+}
+
 extern void machvec_setup (char **);
 extern void machvec_timer_interrupt (int, void *);
 extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
@@ -159,6 +166,7 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
 #  define platform_migrate              ia64_mv.migrate
 #  define platform_setup_msi_irq        ia64_mv.setup_msi_irq
 #  define platform_teardown_msi_irq     ia64_mv.teardown_msi_irq
+#  define platform_pci_fixup_bus        ia64_mv.pci_fixup_bus
 # endif
 
 /* __attribute__((__aligned__(16))) is required to make size of the
@@ -210,6 +218,8 @@ struct ia64_machine_vector {
         ia64_mv_migrate_t *migrate;
         ia64_mv_setup_msi_irq_t *setup_msi_irq;
         ia64_mv_teardown_msi_irq_t *teardown_msi_irq;
+        ia64_mv_pci_fixup_bus_t *pci_fixup_bus;
+        ia64_mv_kernel_launch_event_t *kernel_launch_event;
 } __attribute__((__aligned__(16))); /* align attrib? see above comment */
 
 #define MACHVEC_INIT(name)                      \
@@ -257,6 +267,7 @@ struct ia64_machine_vector {
         platform_migrate,                       \
         platform_setup_msi_irq,                 \
         platform_teardown_msi_irq,              \
+        platform_pci_fixup_bus,                 \
 }
 
 extern struct ia64_machine_vector ia64_mv;
@@ -309,6 +320,9 @@ extern ia64_mv_dma_supported		swiotlb_dma_supported;
 #ifndef platform_tlb_migrate_finish
 # define platform_tlb_migrate_finish    machvec_noop_mm
 #endif
+#ifndef platform_kernel_launch_event
+# define platform_kernel_launch_event   machvec_noop
+#endif
 #ifndef platform_dma_init
 # define platform_dma_init              swiotlb_init
 #endif
@@ -416,5 +430,8 @@ extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size
 #ifndef platform_teardown_msi_irq
 # define platform_teardown_msi_irq      ((ia64_mv_teardown_msi_irq_t*)NULL)
 #endif
+#ifndef platform_pci_fixup_bus
+# define platform_pci_fixup_bus machvec_noop_bus
+#endif
 
 #endif /* _ASM_IA64_MACHVEC_H */
diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h
index c54b165b1c17..eaa2fce0fecd 100644
--- a/include/asm-ia64/machvec_sn2.h
+++ b/include/asm-ia64/machvec_sn2.h
@@ -67,8 +67,10 @@ extern ia64_mv_dma_sync_sg_for_device	sn_dma_sync_sg_for_device;
 extern ia64_mv_dma_mapping_error        sn_dma_mapping_error;
 extern ia64_mv_dma_supported            sn_dma_supported;
 extern ia64_mv_migrate_t                sn_migrate;
+extern ia64_mv_kernel_launch_event_t    sn_kernel_launch_event;
 extern ia64_mv_setup_msi_irq_t          sn_setup_msi_irq;
 extern ia64_mv_teardown_msi_irq_t       sn_teardown_msi_irq;
+extern ia64_mv_pci_fixup_bus_t          sn_pci_fixup_bus;
 
 
 /*
@@ -120,6 +122,7 @@ extern ia64_mv_teardown_msi_irq_t	sn_teardown_msi_irq;
 #define platform_dma_mapping_error              sn_dma_mapping_error
 #define platform_dma_supported          sn_dma_supported
 #define platform_migrate                sn_migrate
+#define platform_kernel_launch_event    sn_kernel_launch_event
 #ifdef CONFIG_PCI_MSI
 #define platform_setup_msi_irq          sn_setup_msi_irq
 #define platform_teardown_msi_irq       sn_teardown_msi_irq
@@ -127,6 +130,7 @@ extern ia64_mv_teardown_msi_irq_t	sn_teardown_msi_irq;
 #define platform_setup_msi_irq          ((ia64_mv_setup_msi_irq_t*)NULL)
 #define platform_teardown_msi_irq       ((ia64_mv_teardown_msi_irq_t*)NULL)
 #endif
+#define platform_pci_fixup_bus          sn_pci_fixup_bus
 
 #include <asm/sn/io.h>
 
diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h
index c3b1f862e6e7..c8df75901083 100644
--- a/include/asm-ia64/meminit.h
+++ b/include/asm-ia64/meminit.h
@@ -15,11 +15,12 @@
  *      - initrd (optional)
  *      - command line string
  *      - kernel code & data
+ *      - crash dumping code reserved region
  *      - Kernel memory map built from EFI memory map
  *
  * More could be added if necessary
  */
-#define IA64_MAX_RSVD_REGIONS 6
+#define IA64_MAX_RSVD_REGIONS 7
 
 struct rsvd_region {
         unsigned long start;    /* virtual address of beginning of element */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 947cb72b520e..485759ba9e36 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -101,7 +101,7 @@ do {						\
 
 #ifdef CONFIG_VIRTUAL_MEM_MAP
 extern int ia64_pfn_valid (unsigned long pfn);
-#elif defined(CONFIG_FLATMEM)
+#else
 # define ia64_pfn_valid(pfn) 1
 #endif
 
@@ -110,12 +110,11 @@ extern struct page *vmem_map;
 #ifdef CONFIG_DISCONTIGMEM
 # define page_to_pfn(page)      ((unsigned long) (page - vmem_map))
 # define pfn_to_page(pfn)       (vmem_map + (pfn))
+#else
+# include <asm-generic/memory_model.h>
 #endif
-#endif
-
-#if defined(CONFIG_FLATMEM) || defined(CONFIG_SPARSEMEM)
-/* FLATMEM always configures mem_map (mem_map = vmem_map if necessary) */
-#include <asm-generic/memory_model.h>
+#else
+# include <asm-generic/memory_model.h>
 #endif
 
 #ifdef CONFIG_FLATMEM
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 2c8fd92d0ece..bc768153f3c9 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -20,6 +20,8 @@
  * 00/05/24     eranian Updated to latest PAL spec, fix structures bugs, added
  * 00/05/25     eranian Support for stack calls, and static physical calls
  * 00/06/18     eranian Support for stacked physical calls
+ * 06/10/26     rja     Support for Intel Itanium Architecture Software Developer's
+ *                      Manual Rev 2.2 (Jan 2006)
  */
 
 /*
@@ -69,6 +71,8 @@
 #define PAL_PREFETCH_VISIBILITY 41      /* Make Processor Prefetches Visible */
 #define PAL_LOGICAL_TO_PHYSICAL 42      /* returns information on logical to physical processor mapping */
 #define PAL_CACHE_SHARED_INFO   43      /* returns information on caches shared by logical processor */
+#define PAL_GET_HW_POLICY       48      /* Get current hardware resource sharing policy */
+#define PAL_SET_HW_POLICY       49      /* Set current hardware resource sharing policy */
 
 #define PAL_COPY_PAL            256     /* relocate PAL procedures and PAL PMI */
 #define PAL_HALT_INFO           257     /* return the low power capabilities of processor */
@@ -80,6 +84,11 @@
 #define PAL_SET_PSTATE          263     /* set the P-state */
 #define PAL_BRAND_INFO          274     /* Processor branding information */
 
+#define PAL_GET_PSTATE_TYPE_LASTSET     0
+#define PAL_GET_PSTATE_TYPE_AVGANDRESET 1
+#define PAL_GET_PSTATE_TYPE_AVGNORESET  2
+#define PAL_GET_PSTATE_TYPE_INSTANT     3
+
 #ifndef __ASSEMBLY__
 
 #include <linux/types.h>
@@ -102,6 +111,7 @@ typedef s64				pal_status_t;
                                                  * cache without sideeffects
                                                  * and "restrict" was 1
                                                  */
+#define PAL_STATUS_REQUIRES_MEMORY      (-9)    /* Call requires PAL memory buffer */
 
 /* Processor cache level in the heirarchy */
 typedef u64                             pal_cache_level_t;
@@ -456,7 +466,9 @@ typedef struct pal_process_state_info_s {
                                                  * by the processor
                                                  */
 
-                        reserved2       : 11,
+                        se              : 1,    /* Shared error.  MCA in a
+                                                   shared structure */
+                        reserved2       : 10,
                         cc              : 1,    /* Cache check */
                         tc              : 1,    /* TLB check */
                         bc              : 1,    /* Bus check */
@@ -487,10 +499,12 @@ typedef struct pal_cache_check_info_s {
                                                  * error occurred
                                                  */
                         wiv             : 1,    /* Way field valid */
-                        reserved2       : 10,
+                        reserved2       : 1,
+                        dp              : 1,    /* Data poisoned on MBE */
+                        reserved3       : 8,
 
                         index           : 20,   /* Cache line index */
-                        reserved3       : 2,
+                        reserved4       : 2,
 
                         is              : 1,    /* instruction set (1 == ia32) */
                         iv              : 1,    /* instruction set field valid */
@@ -557,7 +571,7 @@ typedef struct pal_bus_check_info_s {
                         type            : 8,    /* Bus xaction type*/
                         sev             : 5,    /* Bus error severity*/
                         hier            : 2,    /* Bus hierarchy level */
-                        reserved1       : 1,
+                        dp              : 1,    /* Data poisoned on MBE */
                         bsi             : 8,    /* Bus error status
                                                  * info
                                                  */
@@ -764,7 +778,7 @@ struct ia64_pal_retval {
  * (generally 0) MUST be passed.  Reserved parameters are not optional
  * parameters.
  */
-extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64, u64);
+extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64);
 extern struct ia64_pal_retval ia64_pal_call_stacked (u64, u64, u64, u64);
 extern struct ia64_pal_retval ia64_pal_call_phys_static (u64, u64, u64, u64);
 extern struct ia64_pal_retval ia64_pal_call_phys_stacked (u64, u64, u64, u64);
@@ -774,14 +788,7 @@ extern void ia64_load_scratch_fpregs (struct ia64_fpreg *);
 #define PAL_CALL(iprv,a0,a1,a2,a3) do {                 \
         struct ia64_fpreg fr[6];                        \
         ia64_save_scratch_fpregs(fr);                   \
-        iprv = ia64_pal_call_static(a0, a1, a2, a3, 0); \
-        ia64_load_scratch_fpregs(fr);                   \
-} while (0)
-
-#define PAL_CALL_IC_OFF(iprv,a0,a1,a2,a3) do {          \
-        struct ia64_fpreg fr[6];                        \
-        ia64_save_scratch_fpregs(fr);                   \
-        iprv = ia64_pal_call_static(a0, a1, a2, a3, 1); \
+        iprv = ia64_pal_call_static(a0, a1, a2, a3);    \
         ia64_load_scratch_fpregs(fr);                   \
 } while (0)
 
@@ -841,7 +848,9 @@ typedef union pal_bus_features_u {
                 u64     pbf_req_bus_parking                     :       1;
                 u64     pbf_bus_lock_mask                       :       1;
                 u64     pbf_enable_half_xfer_rate               :       1;
-                u64     pbf_reserved2                           :       22;
+                u64     pbf_reserved2                           :       20;
+                u64     pbf_enable_shared_line_replace          :       1;
+                u64     pbf_enable_exclusive_line_replace       :       1;
                 u64     pbf_disable_xaction_queueing            :       1;
                 u64     pbf_disable_resp_err_check              :       1;
                 u64     pbf_disable_berr_check                  :       1;
@@ -1084,6 +1093,24 @@ ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio *
         return iprv.status;
 }
 
+/*
+ * Get the current hardware resource sharing policy of the processor
+ */
+static inline s64
+ia64_pal_get_hw_policy (u64 proc_num, u64 *cur_policy, u64 *num_impacted,
+                        u64 *la)
+{
+        struct ia64_pal_retval iprv;
+        PAL_CALL(iprv, PAL_GET_HW_POLICY, proc_num, 0, 0);
+        if (cur_policy)
+                *cur_policy = iprv.v0;
+        if (num_impacted)
+                *num_impacted = iprv.v1;
+        if (la)
+                *la = iprv.v2;
+        return iprv.status;
+}
+
 /* Make the processor enter HALT or one of the implementation dependent low
  * power states where prefetching and execution are suspended and cache and
  * TLB coherency is not maintained.
@@ -1119,10 +1146,10 @@ ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf)
 
 /* Get the current P-state information */
 static inline s64
-ia64_pal_get_pstate (u64 *pstate_index)
+ia64_pal_get_pstate (u64 *pstate_index, unsigned long type)
 {
         struct ia64_pal_retval iprv;
-        PAL_CALL_STK(iprv, PAL_GET_PSTATE, 0, 0, 0);
+        PAL_CALL_STK(iprv, PAL_GET_PSTATE, type, 0, 0);
         *pstate_index = iprv.v0;
         return iprv.status;
 }
@@ -1408,6 +1435,17 @@ ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints)
         return iprv.status;
 }
 
+/*
+ * Set the current hardware resource sharing policy of the processor
+ */
+static inline s64
+ia64_pal_set_hw_policy (u64 policy)
+{
+        struct ia64_pal_retval iprv;
+        PAL_CALL(iprv, PAL_SET_HW_POLICY, policy, 0, 0);
+        return iprv.status;
+}
+
 /* Cause the processor to enter SHUTDOWN state, where prefetching and execution are
  * suspended, but cause cache and TLB coherency to be maintained.
  * This is usually called in IA-32 mode.
@@ -1531,12 +1569,15 @@ typedef union pal_vm_info_1_u {
         } pal_vm_info_1_s;
 } pal_vm_info_1_u_t;
 
+#define PAL_MAX_PURGES          0xFFFF          /* all ones is means unlimited */
+
 typedef union pal_vm_info_2_u {
         u64                     pvi2_val;
         struct {
                 u64             impl_va_msb     : 8,
                                 rid_size        : 8,
-                                reserved        : 48;
+                                max_purges      : 16,
+                                reserved        : 32;
         } pal_vm_info_2_s;
 } pal_vm_info_2_u_t;
 
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index ef616fd4cb1b..825eb7d882e6 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -26,16 +26,18 @@ void pcibios_config_init(void);
 struct pci_dev;
 
 /*
- * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct correspondence
- * between device bus addresses and CPU physical addresses.  Platforms with a hardware I/O
- * MMU _must_ turn this off to suppress the bounce buffer handling code in the block and
- * network device layers.  Platforms with separate bus address spaces _must_ turn this off
- * and provide a device DMA mapping implementation that takes care of the necessary
+ * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
+ * correspondence between device bus addresses and CPU physical addresses.
+ * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
+ * bounce buffer handling code in the block and network device layers.
+ * Platforms with separate bus address spaces _must_ turn this off and provide
+ * a device DMA mapping implementation that takes care of the necessary
  * address translation.
  *
- * For now, the ia64 platforms which may have separate/multiple bus address spaces all
- * have I/O MMUs which support the merging of physically discontiguous buffers, so we can
- * use that as the sole factor to determine the setting of PCI_DMA_BUS_IS_PHYS.
+ * For now, the ia64 platforms which may have separate/multiple bus address
+ * spaces all have I/O MMUs which support the merging of physically
+ * discontiguous buffers, so we can use that as the sole factor to determine
+ * the setting of PCI_DMA_BUS_IS_PHYS.
  */
 extern unsigned long ia64_max_iommu_merge_mask;
 #define PCI_DMA_BUS_IS_PHYS     (ia64_max_iommu_merge_mask == ~0UL)
@@ -52,9 +54,6 @@ pcibios_penalize_isa_irq (int irq, int active)
         /* We don't do dynamic PCI IRQ allocation */
 }
 
-#define HAVE_ARCH_PCI_MWI 1
-extern int pcibios_prep_mwi (struct pci_dev *);
-
 #include <asm-generic/pci-dma-compat.h>
 
 /* pci_unmap_{single,page} is not a nop, thus... */
diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h
index 9cb68e9b377e..393e04c42a2c 100644
--- a/include/asm-ia64/pgalloc.h
+++ b/include/asm-ia64/pgalloc.h
@@ -60,7 +60,7 @@ static inline void *pgtable_quicklist_alloc(void)
 static inline void pgtable_quicklist_free(void *pgtable_entry)
 {
 #ifdef CONFIG_NUMA
-        unsigned long nid = page_to_nid(virt_to_page(pgtable_entry));
+        int nid = page_to_nid(virt_to_page(pgtable_entry));
 
         if (unlikely(nid != numa_node_id())) {
                 free_page((unsigned long)pgtable_entry);
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 0b210abbe003..d000689d9142 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 }
 
 extern s64 ia64_sal_cache_flush (u64 cache_type);
+extern void __init check_sal_cache_flush (void);
 
 /* Initialize all the processor and platform level instruction and data caches */
 static inline s64
diff --git a/include/asm-ia64/sn/acpi.h b/include/asm-ia64/sn/acpi.h
new file mode 100644
index 000000000000..2850a7ef5e71
--- /dev/null
+++ b/include/asm-ia64/sn/acpi.h
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
+ */
+
+#ifndef _ASM_IA64_SN_ACPI_H
+#define _ASM_IA64_SN_ACPI_H
+
+#include "acpi/acglobal.h"
+
+#define SN_ACPI_BASE_SUPPORT()   (acpi_gbl_DSDT->oem_revision >= 0x20101)
+
+#endif /* _ASM_IA64_SN_ACPI_H */
diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h
index 1d9efe541662..e715c794b186 100644
--- a/include/asm-ia64/sn/addrs.h
+++ b/include/asm-ia64/sn/addrs.h
@@ -136,9 +136,13 @@
  */
 #define TO_PHYS(x)              (TO_PHYS_MASK & (x))
 #define TO_CAC(x)               (CAC_BASE     | TO_PHYS(x))
+#ifdef CONFIG_SGI_SN
 #define TO_AMO(x)               (AMO_BASE     | TO_PHYS(x))
 #define TO_GET(x)               (GET_BASE     | TO_PHYS(x))
-
+#else
+#define TO_AMO(x)               ({ BUG(); x; })
+#define TO_GET(x)               ({ BUG(); x; })
+#endif
 
 /*
  * Covert from processor physical address to II/TIO physical address:
diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h
index eac3561574be..9fe89a93d880 100644
--- a/include/asm-ia64/sn/pcidev.h
+++ b/include/asm-ia64/sn/pcidev.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  */
 #ifndef _ASM_IA64_SN_PCI_PCIDEV_H
 #define _ASM_IA64_SN_PCI_PCIDEV_H
@@ -12,31 +12,29 @@
 
 /*
  * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to
- * the pcidev_info structs for all devices under a controller, we extend the
- * definition of pci_controller, via sn_pci_controller, to include a list
- * of pcidev_info.
+ * the pcidev_info structs for all devices under a controller, we keep a
+ * list of pcidev_info under pci_controller->platform_data.
  */
-struct sn_pci_controller {
-        struct pci_controller pci_controller;
+struct sn_platform_data {
+        void *provider_soft;
         struct list_head pcidev_info;
 };
 
-#define SN_PCI_CONTROLLER(dev) ((struct sn_pci_controller *) dev->sysdata)
+#define SN_PLATFORM_DATA(busdev) \
+        ((struct sn_platform_data *)(PCI_CONTROLLER(busdev)->platform_data))
 
 #define SN_PCIDEV_INFO(dev)     sn_pcidev_info_get(dev)
 
-#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \
-        (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
 /*
  * Given a pci_bus, return the sn pcibus_bussoft struct.  Note that
  * this only works for root busses, not for busses represented by PPB's.
  */
 
 #define SN_PCIBUS_BUSSOFT(pci_bus) \
-        ((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
+        ((struct pcibus_bussoft *)(SN_PLATFORM_DATA(pci_bus)->provider_soft))
 
 #define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \
-        (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
+        ((struct pcibus_info *)(SN_PLATFORM_DATA(pci_bus)->provider_soft))
 /*
  * Given a struct pci_dev, return the sn pcibus_bussoft struct.  Note
  * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due
@@ -72,8 +70,6 @@ extern void sn_irq_fixup(struct pci_dev *pci_dev,
                          struct sn_irq_info *sn_irq_info);
 extern void sn_irq_unfixup(struct pci_dev *pci_dev);
 extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *);
-extern void sn_pci_controller_fixup(int segment, int busnum,
-                                    struct pci_bus *bus);
 extern void sn_bus_store_sysdata(struct pci_dev *dev);
 extern void sn_bus_free_sysdata(void);
 extern void sn_generate_path(struct pci_bus *pci_bus, char *address);
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index 30dcfa442e53..bfdc36273ed4 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -44,8 +44,14 @@ extern int sn_prom_feature_available(int id);
  * Once enabled, a feature cannot be disabled.
  *
  * By default, features are disabled unless explicitly enabled.
+ *
+ * These defines must be kept in sync with the corresponding
+ * PROM definitions in feature_sets.h.
  */
 #define  OSF_MCA_SLV_TO_OS_INIT_SLV     0
 #define  OSF_FEAT_LOG_SBES              1
+#define  OSF_ACPI_ENABLE                2
+#define  OSF_PCISEGMENT_ENABLE          3
+
 
 #endif /* _ASM_IA64_SN_FEATURE_SETS_H */
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index ba826b3f75bb..2c4004eb5a68 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -77,6 +77,7 @@
 #define  SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST      0x02000058   // deprecated
 #define  SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST      0x0200005a
 
+#define SN_SAL_IOIF_INIT                           0x0200005f
 #define SN_SAL_HUB_ERROR_INTERRUPT                 0x02000060
 #define SN_SAL_BTE_RECOVER                         0x02000061
 #define SN_SAL_RESERVED_DO_NOT_USE                 0x02000062
@@ -87,6 +88,8 @@
 #define  SN_SAL_INJECT_ERROR                       0x02000067
 #define  SN_SAL_SET_CPU_NUMBER                     0x02000068
 
+#define  SN_SAL_KERNEL_LAUNCH_EVENT                0x02000069
+
 /*
  * Service-specific constants
  */
@@ -1154,4 +1157,11 @@ ia64_sn_set_cpu_number(int cpu)
         SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
         return rv.status;
 }
+static inline int
+ia64_sn_kernel_launch_event(void)
+{
+        struct ia64_sal_retval rv;
+        SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0);
+        return rv.status;
+}
 #endif /* _ASM_IA64_SN_SN_SAL_H */
diff --git a/include/asm-ia64/termbits.h b/include/asm-ia64/termbits.h
index b9e843f7dc42..4531a511bde5 100644
--- a/include/asm-ia64/termbits.h
+++ b/include/asm-ia64/termbits.h
@@ -26,6 +26,17 @@ struct termios {
         cc_t c_cc[NCCS];                /* control characters */
 };
 
+struct ktermios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
 /* c_cc characters */
 #define VINTR 0
 #define VQUIT 1
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index a6e38565ab4c..22ed6749557e 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -101,6 +101,7 @@ void build_cpu_to_node_map(void);
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_EXEC       \
                                 | SD_BALANCE_FORK       \
+                                | SD_SERIALIZE          \
                                 | SD_WAKE_BALANCE,      \
         .last_balance           = jiffies,              \
         .balance_interval       = 64,                   \
diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h
index 9adb51211c22..449c8c0fa2bd 100644
--- a/include/asm-ia64/uaccess.h
+++ b/include/asm-ia64/uaccess.h
@@ -389,7 +389,7 @@ xlate_dev_kmem_ptr (char * p)
         struct page *page;
         char * ptr;
 
-        page = virt_to_page((unsigned long)p >> PAGE_SHIFT);
+        page = virt_to_page((unsigned long)p);
         if (PageUncached(page))
                 ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET;
         else