3 files changed, 26 insertions, 19 deletions

diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h
index 491e9d1fc538..54e7637a326c 100644
--- a/include/asm-ia64/io.h
+++ b/include/asm-ia64/io.h
@@ -120,14 +120,6 @@ static inline void ___ia64_mmiowb(void)
         ia64_mfa();
 }
 
-static inline const unsigned long
-__ia64_get_io_port_base (void)
-{
-        extern unsigned long ia64_iobase;
-
-        return ia64_iobase;
-}
-
 static inline void*
 __ia64_mk_io_addr (unsigned long port)
 {
diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h
index 1093f35b3b90..a429fe225b07 100644
--- a/include/asm-ia64/iosapic.h
+++ b/include/asm-ia64/iosapic.h
@@ -75,6 +75,8 @@ extern int __devinit iosapic_init (unsigned long address,
                                     unsigned int gsi_base);
 #ifdef CONFIG_HOTPLUG
 extern int iosapic_remove (unsigned int gsi_base);
+#else
+#define iosapic_remove(gsi_base)                                (-EINVAL)
 #endif /* CONFIG_HOTPLUG */
 extern int gsi_to_vector (unsigned int gsi);
 extern int gsi_to_irq (unsigned int gsi);
@@ -102,9 +104,7 @@ extern void __devinit map_iosapic_to_node (unsigned int, int);
 #else
 #define iosapic_system_init(pcat_compat)                        do { } while (0)
 #define iosapic_init(address,gsi_base)                          (-EINVAL)
-#ifdef CONFIG_HOTPLUG
 #define iosapic_remove(gsi_base)                                (-ENODEV)
-#endif /* CONFIG_HOTPLUG */
 #define iosapic_register_intr(gsi,polarity,trigger)             (gsi)
 #define iosapic_unregister_intr(irq)                            do { } while (0)
 #define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger)  do { } while (0)
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h
index 909936f25512..d2430aa0d49d 100644
--- a/include/asm-ia64/spinlock.h
+++ b/include/asm-ia64/spinlock.h
@@ -93,7 +93,15 @@ _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
 # endif /* CONFIG_MCKINLEY */
 #endif
 }
+
 #define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0)
+
+/* Unlock by doing an ordered store and releasing the cacheline with nta */
+static inline void _raw_spin_unlock(spinlock_t *x) {
+        barrier();
+        asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x));
+}
+
 #else /* !ASM_SUPPORTED */
 #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
 # define _raw_spin_lock(x)                                                              \
@@ -109,16 +117,16 @@ do {											\
                 } while (ia64_spinlock_val);                                            \
         }                                                                               \
 } while (0)
+#define _raw_spin_unlock(x)     do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0)
 #endif /* !ASM_SUPPORTED */
 
 #define spin_is_locked(x)       ((x)->lock != 0)
-#define _raw_spin_unlock(x)     do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0)
 #define _raw_spin_trylock(x)    (cmpxchg_acq(&(x)->lock, 0, 1) == 0)
 #define spin_unlock_wait(x)     do { barrier(); } while ((x)->lock)
 
 typedef struct {
-        volatile unsigned int read_counter      : 31;
-        volatile unsigned int write_lock        :  1;
+        volatile unsigned int read_counter      : 24;
+        volatile unsigned int write_lock        :  8;
 #ifdef CONFIG_PREEMPT
         unsigned int break_lock;
 #endif
@@ -174,6 +182,13 @@ do {										\
         (result == 0);                                                          \
 })
 
+static inline void _raw_write_unlock(rwlock_t *x)
+{
+        u8 *y = (u8 *)x;
+        barrier();
+        asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" );
+}
+
 #else /* !ASM_SUPPORTED */
 
 #define _raw_write_lock(l)                                                              \
@@ -195,14 +210,14 @@ do {										\
         (ia64_val == 0);                                                \
 })
 
+static inline void _raw_write_unlock(rwlock_t *x)
+{
+        barrier();
+        x->write_lock = 0;
+}
+
 #endif /* !ASM_SUPPORTED */
 
 #define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
 
-#define _raw_write_unlock(x)                                                            \
-({                                                                                      \
-        smp_mb__before_clear_bit();     /* need barrier before releasing lock... */     \
-        clear_bit(31, (x));                                                             \
-})
-
 #endif /*  _ASM_IA64_SPINLOCK_H */